Computer Sciences Dept.

CS/ECE 252 Introduction to Computer Engineering

Fall 2011 Section 1
Instructor Guri Sohi
TAs Newsha Ardalani and Rebecca Lam

URL: http://www.cs.wisc.edu/~sohi/cs252/Fall2011/

Homework 4 // Due at lecture Wed, Oct 12

Primary contact for this homework: Rebecca Lam [rjlam@cs.wisc.edu]

You must do this homework in groups of two. Please write the full name and the student id of each member on every pages and staple multiple pages together. Only turn in ONE copy of homework per group.

Problem 1 (4 points)

Implement a full adder with a 3-to-8 decoder and two multi-input OR gates. Use the table of Figure 3.14 on p.62 of the textbook.

Problem 2 (4 points)

  1. Implement a 2-input NOR gate using one 2-to-1 mux and one NOT gate
  2. Implement a 2-input NOR gate using one 4-to-1 mux

Problem 3 (6 points)

Given that a certain machine has a clock frequency of 40MHz and takes 6 cycles to execute an instruction, find the following:

  1. Clock cycle period
  2. Instructions per second
  3. Suppose we have a program that has 268 instructions. How long will it take the program to run?

Problem 4 (8 points)

  1. Draw a state diagram for a finite state machine that outputs 1 when it recognizes the pattern "01101001". For instance, if we have an input of "01101001101001" we should get an output of "00000001000001". (This means that for the last 8 bits whenever it sees the pattern it outputs 1)
  2. Modify the state diagram from the previous part such that it will only accept input sequences that start with "00" and still recognizes the pattern "01101001" from part a. For instance, given an input sequence "0001101001" we will get an output of "0000000001" and for the input sequence "1001101001" we will get an output of "0000000000"

Problem 5 (6 points)

Suppose we have a machine in which every instruction has the following format:
OPCODE DR SR1 SR2 Unused bits (if any)

Where DR = Destination register, SR1 = Source Register 1, and SR2 = Source register 2.

  1. If the OPCODE section is 6 bits, how many opcodes can be represented?
  2. If there are 64 registers, how many total bits are neede to represent DR, SR1, and SR2?
  3. If we have a 32-bit instruction, 212 opcodes, and 168 registers, will we be able to represent all instructions? If so, how many bits will be unused? Give a reason for you answers.

Problem 6 (2 points)

Implement a gate-level circuit using NOT, AND, and OR gates that will implement an odd parity check for a 3-bit input. This means that when the input has an odd number of 1s, the output should be set to 0, and when the input has an even number of 1s, the output should be set to 1.

 
Computer Sciences | UW Home