Computer Sciences Dept.

CS/ECE 252 Introduction to Computer Engineering

Fall 2014 Section 2
Instructor Guri Sohi
TAs Lisa Ossian, Sujith Surendran, Minsub Shin

URL: http://www.cs.wisc.edu/~sohi/cs252/Fall2014/

Homework 4 [Due at lecture on Fri, Oct 10]

Primary contact for this homework: Sujith Surendran [sujiths at cs dot wisc dot edu]

You must do this homework alone. Please hand in the copy of the homework listing your section number, full name (as appear in Learn@UW) and UW ID. You must staple all pages of your homework together to receive full credit.

Problem 1 (3 points)


Fill in the truth table (Table 1) for the following combinational circuit that uses 4:1 multiplexer. A,B,C are inputs to this combinational circuit and the output of the combinational circuit is Z.



  A    B    C      Z    
  0    0    0         
  0    0    1         
  0    1    0         
  0    1    1         
  1    0    0         
  1    0    1         
  1    1    0         
  1    1    1         
          Table 1

Problem 2 (2 points)


Implement a logic circuit for a 2-input XOR gate using a decoder and a 2-input OR gate. The XOR gate takes inputs A, B and produces an output Z as per the following truth table:

     
  A    B      Z    
  0    0      0    
  0    1      1    
  1    0      1    
  1    1      0    


Problem 3 (9 points)


Consider a finite state machine (FSM) that recognizes the pattern "1000". The input to the FSM is a sequence of binary bits, one after the other. When the FSM receives 1000 as inputs in successive bits, it should output 1. Otherwise, the output should be 0.

For example
Input sequence: 1000010010000
FSM output:       0001000000010

  1. (4 points) Draw the state diagram for this FSM (Name the states as S0, S1, S2 etc).
  2. (1 point) How many flip flops are required to implement the circuit for this FSM?
  3. (2 points) Draw the output truth table for this FSM. (Use the same name for states as you specified in the state diagram)
  4. (2 points) Draw the next state logic truth table for this FSM. (Use the same name for states as you specified in the state diagram)


Problem 4 (2 points)


Consider a 512 MB memory with 16-bit address. What is the addressability of this memory?


Problem 5 (6 points)


Consider a machine which implements an ISA in which every instruction is 32 bits long and has the following format:

  Opcode    DR    SR    IMMVAL  

Where DR = Destination register, SR = Source Register, and IMMVAL = Immediate Value. The fields DR, SR are represented using the same number of bits.


If there are 126 opcodes and 64 registers,

  1. (2 points) What is the minimum number of bits required to represent the opcode in this instruction format?
  2. (2 points) What is the minimum number of bits required for the source register (SR) field?
  3. (2 points) If IMMVAL is a 2’s complement value, what is the range of values (in decimal) that can be represented using the immediate value field?


Problem 6 (4 point)


Given that an instruction takes 4 cycles to complete execution in a machine which has a clock period of 10 ns, find the following:

  1. Clock frequency of the machine
  2. Number of instructions that can be executed in one second


Problem 7 (2 points)


An RS latch is shown in the figure below. Assuming that the inputs to this R-S latch are changed every second (as shown in Table 2), specify what would be the value of "out" signal for each of these sets of inputs.





  Time (seconds)    0    1    2    3  
  S    1    1    0    1  
  R    0    1    1    1  
  out              
                        Table 2



Problem 8 (2 points)


What is the difference between a sequential circuit and a combinational circuit ?






 
Computer Sciences | UW Home