Solution for the Midterm Exam

Problem 1)

a)

b)

Problem 2)

i) T

ii) T

iii) F

iv) F

v) F

vi) F

Problem 3)

i) Easier to pipeline since address of next instruction can be calculated while decoding current instruction.

ii) datapath + control = processor,  memory, input, output

iii) No. of instructions * CPI * clock cycle time

iv) a) When the system is executing one task at a time, e.g. in a single or multi-cycle datapath.

b) When the system is executing more than one task at a time, e.g. in a pipelined datapath.

v) A computer where the instruction of the program are stored in memory; the CPU is assigned the task of fetching the instruction from memory, decoding them and executing them.

Problem 4)

i)  Hazard when instructions in 2 different pipeline stages(i.e. 2 different instructions) want to access the same resource in the same cycle. Can be handled by duplicating the resource.

ii) Possibility of incorrect operation due to a conditional branch instruction. Which instruction to execute after a branch is not known until outcome of branch is known.

iii) No. In addition to the 6-bit opcode, the R-type instructions make use of the bottom 6 bits of the instruction (the func field) to specify the ALU instruction. This allows for 2⁶ = 64 different opcodes for the ALU instructions for each combination of the opcode bits.

Problem 5)

a) It forwards the results of the parent instruction to it children (the dependent instructions) in EX stage. Now the following dependent instructions do not have to wait for the results to be written back to RF.

b)

c)

Add EX/MEM to EX bypass. It removes all RAW bubbles due to ALU instructions. LOAD-USE bubbles are not removed.

Problem 6)

i) Time on B = 50 + 50 / 6 = 58.33sec

SpeedUp = 100/58.33 = 1.714

ii) 1/(1-f + f/6) = 3

=> f = 0.8

=> 80% on machine A

20 + 80/6 = 20 + 13.33

FP = 13.33/33.33 = .4

=> 40% time on machine B

Problem 7)

Changes to the datapath

1) The mux on the input of RF would get an extra input from Instruction[25:21]. Hence the select lines for that mux now has to be of 2-bits.

2) The lower mux at the input of ALU would get a constant 1 as input and hence the select lines for that mux would be now of 3-bits.

3) Control has to generate a new condition called PCCondSrc which works as a select line for the 2:1 mux placed at the output Zero of the ALU.