cmpi $dest, $src1, Imm
Perform a comparison of a two's complement signed integer register to a sign-extended immediate.
Format
This is a RI format instrucion.
| 31 - 26 |
25 - 21 |
20 - 16 |
15 - 0 |
| 011110 |
dest |
src1 |
Immediate |
Functional Description
The cmpi instruction compares two operands, one stored in register src1
and another in an immediate field. The register operand is
interpreted as a twos complement signed integer. The 16-bit
immediate field is sign-extended to 32-bits. Based on this
comparison, the lowermost three bits of register dest are set, and
the remaining bits in the register are set to 0. The lowermost
bits are EQ(bit 0), LT (bit 1) and GT(bit 2). If register src1 and
the sign-extended immediate are equal, the EQ bit is set to 1,
otherwise 0. If register src1 is less than the sign-extended
immediate the LT bit is set to 1, otherwise the LT bit is set to
zero. If register src1 is greater than the sign-extended immediate
the GT bit is set to 1, otherwise it is set to 0.
if(src1 == SIGN_EXT(Imm)) dest[0] = 1;
else dest[0] = 0;
if(src1 < SIGN_EXT(Imm)) dest[1] = 1;
else dest[1] = 0;
if(src1 > SIGN_EXT(Imm)) dest[2] = 1;
else dest[2] = 0;
A[31:3] = 0;
Side Effects
None
Processor Mode
This is a user-level instruction.
Last modified: Sun Feb 25 12:46:53 CST 2001