lw $B, $C, Imm
Load a 32-bit word from memory.
Format
This is a RI format instrucion.
| 31-26 |
25-21 |
20-16 |
15-0 |
| 100 010 |
dest |
src1 |
Imm |
Functional Description
The load word instruction performs a 32-bit load from memory into register dest. The immediate field is sign-extended and added to register src1 to form a 32-bit virtual address. This 32-bit address is translated to a 22-bit physical address as described in the "Address Tranlation" section of the architecture definition.
dest = VIRT_MEM[src1 + SIGN_EXT(imm)];
Side Effects
If the virtual address is not aligned on a 4-byte block, or the
virtual address exceeds address space limits (discussed in the address
translation section of the architecture definition), the value 0x8 logically ORed the exception cause register, the address generated by the offending
reference is placed in the MEA register, the current PC is moved into
the exception PC (EPC) register. Control then traps to an operating
system handler.
Processor Mode
This is a user-level instruction.
Last modified: Fri Feb 23 02:56:02 CST 2001