sw $src1, $src2, Imm
Store a 32-bit word to memory.
Format
This is a SW format instrucion.
31-26 |
25-21 |
20-16 |
15-0 |
100 000 |
src1 |
src2 |
16-bit Immediate |
Functional Description
The sw instruction performs a 32-bit store of the contents of register src2 to memory. The immediate field added to register src1 to form a 32-bit virtual address. This 32-bit address is translated to a 22-bit physical address as described in the "Address Tranlation" section of the architecture definition.
VIRT_MEM[src1 + SIGN_EXT(Imm)] = src2;
Side Effects
If the virtual address is not aligned on a 4-byte block, or the
virtual address exceeds address space limits (discussed in the address
translation section of the architecture definition), the value 0x8 is
logically ORed with the exception cause register, the current PC is
moved into the exception PC (EPC) register, the address generated by
the offending reference is placed in the MEA register. Control
then traps to an operating system handler.
Processor Mode
This is a user-level instruction.
Last modified: Fri Feb 23 02:56:02 CST 2001