sem [					fmovdne		fmovde
	fmovdg		fmovdle		fmovdge		fmovdl
	fmovdgu		fmovdleu	fmovdcc		fmovdcs
	fmovdpos	fmovdneg	fmovdvc		fmovdvs	] {
    if(bpcc1) { if(cond_xcc) F8(rd,F8(rs2)); }
    else if(cond_icc) F8(rd,F8(rs2));
} where cond_xcc in [	(! CCR?bit(6) ) 	(CCR?bit(6) ) 	(!(CCR?bit(6) |(CCR?bit(7) ^ CCR?bit(5) ))) 	(CCR?bit(6) |(CCR?bit(7) ^ CCR?bit(5) )) 	(!(CCR?bit(7) ^ CCR?bit(5) )) 	(CCR?bit(7) ^ CCR?bit(5) ) 
	(!(CCR?bit(4) | CCR?bit(6) )) 	(CCR?bit(4) | CCR?bit(6) ) 	(! CCR?bit(4) ) 	(CCR?bit(4) ) 	(! CCR?bit(7) ) 	(CCR?bit(7) ) 	(! CCR?bit(5) ) 	(CCR?bit(5) ) 	],
	cond_icc in [	(! CCR?bit(2) ) 	(CCR?bit(2) ) 	(!(CCR?bit(2) |(CCR?bit(3) ^ CCR?bit(1) ))) 	(CCR?bit(2) |(CCR?bit(3) ^ CCR?bit(1) )) 	(!(CCR?bit(3) ^ CCR?bit(1) )) 	(CCR?bit(3) ^ CCR?bit(1) ) 
	(!(CCR?bit(0) | CCR?bit(2) )) 	(CCR?bit(0) | CCR?bit(2) ) 	(! CCR?bit(0) ) 	(CCR?bit(0) ) 	(! CCR?bit(3) ) 	(CCR?bit(3) ) 	(! CCR?bit(1) ) 	(CCR?bit(1) ) 	];