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decoder.hh
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30 
31 #ifndef __ARCH_ALPHA_DECODER_HH__
32 #define __ARCH_ALPHA_DECODER_HH__
33 
35 #include "arch/types.hh"
36 #include "cpu/static_inst.hh"
37 #include "sim/full_system.hh"
38 
39 namespace AlphaISA
40 {
41 
42 class ISA;
43 class Decoder
44 {
45  protected:
46  // The extended machine instruction being generated
48  bool instDone;
49 
50  public:
51  Decoder(ISA* isa = nullptr) : instDone(false)
52  {}
53 
54  void
56  { }
57 
58  void
60  {
61  instDone = false;
62  }
63 
64  // Use this to give data to the predecoder. This should be used
65  // when there is control flow.
66  void
67  moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
68  {
69  ext_inst = inst;
70  instDone = true;
71  if (FullSystem)
72  ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32);
73  }
74 
75  bool
77  {
78  return true;
79  }
80 
81  bool
83  {
84  return instDone;
85  }
86 
87  void takeOverFrom(Decoder * old) {}
88 
89  protected:
92 
93  public:
95 
101  {
102  return defaultCache.decode(this, mach_inst, addr);
103  }
104 
107  {
108  if (!instDone)
109  return NULL;
110  instDone = false;
111  return decode(ext_inst, nextPC.instAddr());
112  }
113 };
114 
115 } // namespace AlphaISA
116 
117 #endif // __ARCH_ALPHA_DECODER_HH__
bool needMoreBytes()
Definition: decoder.hh:76
StaticInstPtr decodeInst(ExtMachInst mach_inst)
void process()
Definition: decoder.hh:55
bool instReady()
Definition: decoder.hh:82
ip6_addr_t addr
Definition: inet.hh:335
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:146
Decoder(ISA *isa=nullptr)
Definition: decoder.hh:51
void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
Definition: decoder.hh:67
ExtMachInst ext_inst
Definition: decoder.hh:47
uint32_t MachInst
Definition: types.hh:40
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decoder.hh:100
Addr pc() const
Definition: types.hh:138
Addr instAddr() const
Returns the memory address the bytes of this instruction came from.
Definition: types.hh:60
StaticInstPtr decode(TheISA::Decoder *const decoder, TheISA::ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decode_cache.cc:42
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
uint64_t ExtMachInst
Definition: types.hh:41
void takeOverFrom(Decoder *old)
Definition: decoder.hh:87
StaticInstPtr decode(AlphaISA::PCState &nextPC)
Definition: decoder.hh:106
IntReg pc
Definition: remote_gdb.hh:91
static GenericISA::BasicDecodeCache defaultCache
A cache of decoded instruction objects.
Definition: decoder.hh:91

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