gem5
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Groups Pages
pl011.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2010-2015 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Copyright (c) 2005 The Regents of The University of Michigan
15  * All rights reserved.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions are
19  * met: redistributions of source code must retain the above copyright
20  * notice, this list of conditions and the following disclaimer;
21  * redistributions in binary form must reproduce the above copyright
22  * notice, this list of conditions and the following disclaimer in the
23  * documentation and/or other materials provided with the distribution;
24  * neither the name of the copyright holders nor the names of its
25  * contributors may be used to endorse or promote products derived from
26  * this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39  *
40  * Authors: Ali Saidi
41  * Andreas Sandberg
42  */
43 
44 
49 #ifndef __DEV_ARM_PL011_H__
50 #define __DEV_ARM_PL011_H__
51 
52 #include "dev/arm/amba_device.hh"
53 #include "dev/uart.hh"
54 
55 class BaseGic;
56 struct Pl011Params;
57 
58 class Pl011 : public Uart, public AmbaDevice
59 {
60  public:
61  Pl011(const Pl011Params *p);
62 
63  void serialize(CheckpointOut &cp) const override;
64  void unserialize(CheckpointIn &cp) override;
65 
66  public: // PioDevice
67  Tick read(PacketPtr pkt) override;
68  Tick write(PacketPtr pkt) override;
69 
70  public: // Uart
71  void dataAvailable() override;
72 
73 
74  protected: // Interrupt handling
76  void generateInterrupt();
77 
89  void setInterrupts(uint16_t ints, uint16_t mask);
96  void setInterruptMask(uint16_t mask) { setInterrupts(rawInt, mask); }
103  void raiseInterrupts(uint16_t ints) { setInterrupts(rawInt | ints, imsc); }
110  void clearInterrupts(uint16_t ints) { setInterrupts(rawInt & ~ints, imsc); }
111 
113  inline uint16_t maskInt() const { return rawInt & imsc; }
114 
117 
118  protected: // Registers
119  static const uint64_t AMBA_ID = ULL(0xb105f00d00341011);
120  static const int UART_DR = 0x000;
121  static const int UART_FR = 0x018;
122  static const int UART_FR_CTS = 0x001;
123  static const int UART_FR_RXFE = 0x010;
124  static const int UART_FR_TXFF = 0x020;
125  static const int UART_FR_RXFF = 0x040;
126  static const int UART_FR_TXFE = 0x080;
127  static const int UART_IBRD = 0x024;
128  static const int UART_FBRD = 0x028;
129  static const int UART_LCRH = 0x02C;
130  static const int UART_CR = 0x030;
131  static const int UART_IFLS = 0x034;
132  static const int UART_IMSC = 0x038;
133  static const int UART_RIS = 0x03C;
134  static const int UART_MIS = 0x040;
135  static const int UART_ICR = 0x044;
136 
137  static const uint16_t UART_RIINTR = 1 << 0;
138  static const uint16_t UART_CTSINTR = 1 << 1;
139  static const uint16_t UART_CDCINTR = 1 << 2;
140  static const uint16_t UART_DSRINTR = 1 << 3;
141  static const uint16_t UART_RXINTR = 1 << 4;
142  static const uint16_t UART_TXINTR = 1 << 5;
143  static const uint16_t UART_RTINTR = 1 << 6;
144  static const uint16_t UART_FEINTR = 1 << 7;
145  static const uint16_t UART_PEINTR = 1 << 8;
146  static const uint16_t UART_BEINTR = 1 << 9;
147  static const uint16_t UART_OEINTR = 1 << 10;
148 
149  uint16_t control;
150 
153  uint16_t fbrd;
154 
157  uint16_t ibrd;
158 
161  uint16_t lcrh;
162 
165  uint16_t ifls;
166 
168  uint16_t imsc;
169 
171  uint16_t rawInt;
172 
173  protected: // Configuration
175  BaseGic * const gic;
176 
178  const bool endOnEOT;
179 
181  const int intNum;
182 
184  const Tick intDelay;
185 };
186 
187 #endif //__DEV_ARM_PL011_H__
static const int UART_IFLS
Definition: pl011.hh:131
static const int UART_FBRD
Definition: pl011.hh:128
static const int UART_FR_TXFE
Definition: pl011.hh:126
uint16_t ibrd
integer baud rate divisor.
Definition: pl011.hh:157
static const int UART_RIS
Definition: pl011.hh:133
static const uint16_t UART_BEINTR
Definition: pl011.hh:146
uint16_t lcrh
Line control register.
Definition: pl011.hh:161
static const int UART_IBRD
Definition: pl011.hh:127
static const uint16_t UART_RTINTR
Definition: pl011.hh:143
uint16_t ifls
interrupt fifo level register.
Definition: pl011.hh:165
static const int UART_FR_CTS
Definition: pl011.hh:122
static const int UART_IMSC
Definition: pl011.hh:132
void setInterruptMask(uint16_t mask)
Convenience function to update the interrupt mask.
Definition: pl011.hh:96
static const uint64_t AMBA_ID
Definition: pl011.hh:119
static const int UART_FR_RXFE
Definition: pl011.hh:123
const int intNum
Interrupt number to generate.
Definition: pl011.hh:181
static const uint16_t UART_RIINTR
Definition: pl011.hh:137
Base class for UART.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pl011.cc:301
static const uint16_t UART_CTSINTR
Definition: pl011.hh:138
void clearInterrupts(uint16_t ints)
Convenience function to clear interrupts.
Definition: pl011.hh:110
static const uint16_t UART_RXINTR
Definition: pl011.hh:141
static const int UART_ICR
Definition: pl011.hh:135
void setInterrupts(uint16_t ints, uint16_t mask)
Assign new interrupt values and update interrupt signals.
Definition: pl011.cc:268
const Tick intDelay
Delay before interrupting.
Definition: pl011.hh:184
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
Definition: pl011.hh:58
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pl011.cc:286
uint64_t Tick
Tick count type.
Definition: types.hh:63
uint16_t rawInt
raw interrupt status register
Definition: pl011.hh:171
uint16_t control
Definition: pl011.hh:149
static const uint16_t UART_DSRINTR
Definition: pl011.hh:140
void raiseInterrupts(uint16_t ints)
Convenience function to raise a new interrupt.
Definition: pl011.hh:103
static const int UART_DR
Definition: pl011.hh:120
static const int UART_FR
Definition: pl011.hh:121
BaseGic *const gic
Gic to use for interrupting.
Definition: pl011.hh:175
static const uint16_t UART_OEINTR
Definition: pl011.hh:147
#define ULL(N)
uint64_t constant
Definition: types.hh:50
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:245
static const int UART_FR_TXFF
Definition: pl011.hh:124
static const uint16_t UART_CDCINTR
Definition: pl011.hh:139
static const uint16_t UART_TXINTR
Definition: pl011.hh:142
Pl011(const Pl011Params *p)
Definition: pl011.cc:57
static const uint16_t UART_PEINTR
Definition: pl011.hh:145
uint16_t imsc
interrupt mask register.
Definition: pl011.hh:168
std::ostream CheckpointOut
Definition: serialize.hh:67
void generateInterrupt()
Function to generate interrupt.
Definition: pl011.cc:256
EventWrapper< Pl011,&Pl011::generateInterrupt > intEvent
Wrapper to create an event out of the thing.
Definition: pl011.hh:116
uint16_t maskInt() const
Masked interrupt status register.
Definition: pl011.hh:113
static const int UART_FR_RXFF
Definition: pl011.hh:125
static const int UART_MIS
Definition: pl011.hh:134
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl011.cc:166
void dataAvailable() override
Inform the uart that there is data available.
Definition: pl011.cc:247
Bitfield< 3, 0 > mask
Definition: types.hh:64
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl011.cc:68
uint16_t fbrd
fractional baud rate divisor.
Definition: pl011.hh:153
Definition: uart.hh:47
Bitfield< 0 > p
const bool endOnEOT
Should the simulation end on an EOT.
Definition: pl011.hh:178
static const uint16_t UART_FEINTR
Definition: pl011.hh:144
static const int UART_CR
Definition: pl011.hh:130
static const int UART_LCRH
Definition: pl011.hh:129

Generated on Fri Jun 9 2017 13:03:45 for gem5 by doxygen 1.8.6