rename_map.hh

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/*
 * Copyright (c) 2015 ARM Limited
 * All rights reserved.
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Copyright (c) 2004-2005 The Regents of The University of Michigan
 * Copyright (c) 2013 Advanced Micro Devices, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 *
 * Authors: Kevin Lim
 *          Steve Reinhardt
 */

// Todo:  Create destructor.
// Have it so that there's a more meaningful name given to the variable
// that marks the beginning of the FP registers.

#ifndef __CPU_O3_RENAME_MAP_HH__
#define __CPU_O3_RENAME_MAP_HH__

#include <iostream>
#include <utility>
#include <vector>

#include "arch/types.hh"
#include "config/the_isa.hh"
#include "cpu/o3/free_list.hh"
#include "cpu/o3/regfile.hh"
#include "cpu/reg_class.hh"

class SimpleRenameMap
{
  public:

    typedef TheISA::RegIndex RegIndex;

  private:

    std::vector<PhysRegIndex> map;

    SimpleFreeList *freeList;

    RegIndex zeroReg;

  public:

    SimpleRenameMap();

    ~SimpleRenameMap() {};

    void init(unsigned size, SimpleFreeList *_freeList, RegIndex _zeroReg);

    typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo;

    RenameInfo rename(RegIndex arch_reg);

    PhysRegIndex lookup(RegIndex arch_reg) const
    {
        assert(arch_reg < map.size());
        return map[arch_reg];
    }

    void setEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
    {
        map[arch_reg] = phys_reg;
    }

    unsigned numFreeEntries() const { return freeList->numFreeRegs(); }
};


class UnifiedRenameMap
{
  private:

    SimpleRenameMap intMap;

    SimpleRenameMap floatMap;

    PhysRegFile *regFile;

    SimpleRenameMap ccMap;

  public:
    typedef TheISA::RegIndex RegIndex;

    typedef SimpleRenameMap::RenameInfo RenameInfo;

    UnifiedRenameMap() : regFile(nullptr) {};

    ~UnifiedRenameMap() {};

    void init(PhysRegFile *_regFile,
              RegIndex _intZeroReg,
              RegIndex _floatZeroReg,
              UnifiedFreeList *freeList);

    RenameInfo rename(RegIndex arch_reg);

    RenameInfo renameInt(RegIndex rel_arch_reg)
    {
        RenameInfo info = intMap.rename(rel_arch_reg);
        assert(regFile->isIntPhysReg(info.first));
        return info;
    }

    RenameInfo renameFloat(RegIndex rel_arch_reg)
    {
        RenameInfo info = floatMap.rename(rel_arch_reg);
        assert(regFile->isFloatPhysReg(info.first));
        return info;
    }

    RenameInfo renameCC(RegIndex rel_arch_reg)
    {
        RenameInfo info = ccMap.rename(rel_arch_reg);
        assert(regFile->isCCPhysReg(info.first));
        return info;
    }

    RenameInfo renameMisc(RegIndex rel_arch_reg)
    {
        // misc regs aren't really renamed, just remapped
        PhysRegIndex phys_reg = lookupMisc(rel_arch_reg);
        // Set the previous register to the same register; mainly it must be
        // known that the prev reg was outside the range of normal registers
        // so the free list can avoid adding it.
        return RenameInfo(phys_reg, phys_reg);
    }


    PhysRegIndex lookup(RegIndex arch_reg) const;

    PhysRegIndex lookupInt(RegIndex rel_arch_reg) const
    {
        PhysRegIndex phys_reg = intMap.lookup(rel_arch_reg);
        assert(regFile->isIntPhysReg(phys_reg));
        return phys_reg;
    }

    PhysRegIndex lookupFloat(RegIndex rel_arch_reg) const
    {
        PhysRegIndex phys_reg = floatMap.lookup(rel_arch_reg);
        assert(regFile->isFloatPhysReg(phys_reg));
        return phys_reg;
    }

    PhysRegIndex lookupCC(RegIndex rel_arch_reg) const
    {
        PhysRegIndex phys_reg = ccMap.lookup(rel_arch_reg);
        assert(regFile->isCCPhysReg(phys_reg));
        return phys_reg;
    }

    PhysRegIndex lookupMisc(RegIndex rel_arch_reg) const
    {
        // misc regs aren't really renamed, just given an index
        // beyond the range of actual physical registers
        PhysRegIndex phys_reg = rel_arch_reg + regFile->totalNumPhysRegs();
        return phys_reg;
    }

    void setEntry(RegIndex arch_reg, PhysRegIndex phys_reg);

    void setIntEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
    {
        assert(regFile->isIntPhysReg(phys_reg));
        intMap.setEntry(arch_reg, phys_reg);
    }

    void setFloatEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
    {
        assert(regFile->isFloatPhysReg(phys_reg));
        floatMap.setEntry(arch_reg, phys_reg);
    }

    void setCCEntry(RegIndex arch_reg, PhysRegIndex phys_reg)
    {
        assert(regFile->isCCPhysReg(phys_reg));
        ccMap.setEntry(arch_reg, phys_reg);
    }

    unsigned numFreeEntries() const
    {
        return std::min(intMap.numFreeEntries(), floatMap.numFreeEntries());
    }

    bool canRename(uint32_t intRegs, uint32_t floatRegs, uint32_t ccRegs) const
    {
        return intRegs <= intMap.numFreeEntries() &&
            floatRegs <= floatMap.numFreeEntries() &&
            ccRegs <= ccMap.numFreeEntries();
    }

};

#endif //__CPU_O3_RENAME_MAP_HH__