isa_traits.hh

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/*
 * Copyright (c) 2007 The Hewlett-Packard Development Company
 * All rights reserved.
 *
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 * licensed hereunder.  You may use the software subject to the license
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 *
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 * met: redistributions of source code must retain the above copyright
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 * Authors: Gabe Black
 */

#ifndef __ARCH_X86_ISATRAITS_HH__
#define __ARCH_X86_ISATRAITS_HH__

#include "arch/x86/types.hh"
#include "arch/x86/x86_traits.hh"
#include "base/compiler.hh"
#include "base/types.hh"

namespace LittleEndianGuest {}

namespace X86ISA
{
    //This makes sure the little endian version of certain functions
    //are used.
    using namespace LittleEndianGuest;

    // X86 does not have a delay slot
#define ISA_HAS_DELAY_SLOT 0

    // X86 NOP (XCHG rAX, rAX)
    //XXX This needs to be set to an intermediate instruction struct
    //which encodes this instruction

    const Addr PageShift = 12;
    const Addr PageBytes = ULL(1) << PageShift;

    // Memory accesses can be unaligned
    const bool HasUnalignedMemAcc = true;

    const bool CurThreadInfoImplemented = false;
    const int CurThreadInfoReg = -1;

    const ExtMachInst NoopMachInst M5_VAR_USED = {
        0x0,                            // No legacy prefixes.
        0x0,                            // No rex prefix.
        0x0,                            // No two / three byte escape sequence
        { OneByteOpcode, 0x90 },        // One opcode byte, 0x90.
        0x0, 0x0,                       // No modrm or sib.
        0, 0,                           // No immediate or displacement.
        8, 8, 8,                        // All sizes are 8.
        0,                              // Displacement size is 0.
        SixtyFourBitMode                // Behave as if we're in 64 bit
                                        // mode (this doesn't actually matter).
    };
}

#endif // __ARCH_X86_ISATRAITS_HH__