Homework 4
Show work for full credit.
- (6 points each)
Suppose we are using a five element byte array to form a circular queue (see the SAL code on page 189 of the text or the corresponding class handout). After the following sequence of events, show what is in the queue and indicate where variables "head" and "tail" point.
a.enqueue 'a', 'b', and 'c' dequeue two characters enqueue 'a', 'd', and 'e' dequeue three characters
b.enqueue 'c' and 'd' dequeue two characters enqueue 'a', 'c', 'b' and 'd' dequeue four characters
- (3 points)
Consider the following code sequence, where the content of $t1 at the
beginning is 0x10004321:
lw $t2, 15($t1) add $t1, $t1, 1 lw $t2, 14($t1) or $t1, $t1, 0x0001 lw $t2, 13($t1) sub $t1, $t1, 1 lb $t2, 12($t1)
Will this code sequence complete successfully? If one of the instructions generate an address alignment exception, specify which will fail, and explain why. - (3 points)
The first four arguments of a procedure are passed in registers $a0 ($4)
through $a3 ($7). Suppose that procedure A calls procedure B with
three arguments, and B then calls procedure C, with a single argument.
Procedure A allocates space in its activation record for the three
arguments it passes to procedure B, but does not store the
parameters there. B allocates space for only a single argument, which
it passes to C.
Before B calls C, it saves its three arguments in the space allocated by procedure A. Thus a procedure does not allocate space to save the parameters it was passed. Except for the way the space is allocated, are registers $a0-$a3 treated as caller- or callee-saved registers? Explain your answer. - (2 points) Should a local variable within a leaf procedure be placed in an $s register or a $t register? Briefly justify your answer.
- (6 points) Write a (small) set of MAL instructions which check if the instruction located at address ($t0) is a TAL add instruction. If so, that instruction is turned into a TAL sub instruction, but keeping the same arguments. If not, no action is performed.
- (2 points)
(A) Some assembly languages include a NOP instruction which does nothing (the CPU goes for the next instruction). We want our smart assembler to translate NOP into a single TAL instruction. Propose a solution.
(B) TAL does not include an unconditional branch (like MAL b). Find a TAL equivalent to the MAL b instruction, where the TAL translation has instructions that use only register or PC relative addressing modes for their operands. - (6 points)
For the following MAL code fragment, show a translation
to TAL instructions.
Give the TAL instructions in assembly language format,
not in machine code.
Assume that the assembler assigns
address 0x08000ab0 for variable
int1.and $s3, $t0, 0x5566 sw $a0, int1 putc $t4 - (7 points)
a. Give a MAL to TAL assembly language translation for the MAL instruction
Assume that the assembler has assignedsw $a1, int_variableint_variableto address 0x00401234.
b. Give machine code for the TAL translation produced in part (a). Give the machine code both in binary and in hexadecimal. - (3 points)
It is claimed that the following two TAL sequences are equivalent:
(A)
(B)lui $8, 0xMSlabel ori $8, $8, 0xLSlabel lw $8, 0($8) lui $8, 0xMSlabel lw $8, 0xLSlabel($8)
where MSlabel and LSlabel represent two 16 bit halves of a 32-bit address. Is that statement true? Why?
- (8 points) Execute the following program using the simulator SIM:
|
.data |
||
| AA: | .word | |
| BB: | .word AA | |
|
.text |
||
| __start: | lw $2, AA | (1) |
| lw $3, BB | (2) | |
| lw $4, 4($3) | (3) | |
| la $5, 4($3) | (4) | |
| done | (5) | |
After this code is executed, what values are stored in each of the registers? For all non-zero values, indicate which instruction last changed the value of the register. If a register was initially non-zero, indicate instruction (0) as the modifying instruction.