Venkatanathan Varadarajan (Venkat)

Research Projects

Robust scheduler, November 2012 - July 2014

Current state-of-the-art process or virtual machine schedulers are not designed with malicious behaving users in mind. Many high-class security attacks like cache side-channel attack, utilize vulnerabilities in the scheduler to extract confidential information from a victim. The aim of this project is to design a robust scheduler that reduce the effectiveness of such attacks with minimal performance overhead.

Exploiting heterogeneity in public clouds, June 2012 - October 2012

Public cloud providers have a simple pricing model of pay-per-hour of virtual CPU time used. Such cloud providers host these virtual CPUs on a varied set of physical CPUs that belong to different technology generations. The simple pricing model does not take into account the varied performance that are juiced out of these processors for the same CPU time. In this project, we looked at the idea of customer-controlled migration of virtual machines across physical hosts with the aim of reducing cost per unit work done by just using the start/stop interface facilitated by the cloud provider.

Resource-freeing attacks, January 2012 - October 2012

Multi-tenancy and pay-as-you-go pricing model is practiced by almost all of the infrastructure-as-a-service public clouds. This along with the well-known lack of perfect performance isolation gives rise to new class of security issues. In this project, we look at a particular way of interfering with neighboring virtual machine instances on the same physical host in order to improve one's own performance. This is possible because many essential hardware resources such as hardware managed caches are hard to manage in software and hence are not fairly shared between virtual machines.

FastRPC, August 2011 - December 2011

Crossing system boundary for inter-process communication has high cost and this cost is particularly unacceptable for applications that are highly sensitive to performance. We implemented a user-level library called FastRPC for the linux platform that goes along the same lines as the User-level Remote Procedure Call (URPC). In order to avoid the cost of crossing user-kernel boundary and optimizing for shared memory cache-coherent multiprocessor systems, we used shared memory pages between processes and synchronized them using Anderson's array based queue lock. After performance tuning of the library we were able to achieve a best case null rpc latency of  on a Intel Core i7.

Smart cache-coherence for shared memory multiprocessors, January 2011 - May 2011

Existing cache coherence protocols for shared-memory multiprocessors provide programmers with a convenient programming model, but do so at significant cost. All accesses to memory are carefully tracked so as to allow local caches at each processor to be kept coherent with each other. This coherence, however, is not always required, since the data accessed in a shared memory system is in fact often not shared, but private. In this project, we propose a Migration-Tolerant Smart Coherence (MTSC), an extension of the existing idea of Smart Coherence, which takes advantage of private memory access patterns to avoid the overheads of cache coherence on some memory accesses. The major innovation of MTSC is its ability to maintain its effectiveness even in the face of thread migration, a feature not found in existing Smart Coherence schemes.

Accelerators for filesystems and interconnection networks, January 2010 - May 2010

In this project, We explored the possibility of exploiting application-awareness for performance in filesystems and interconnect networks using reconfigurable hardware. For filesystems, we proposed the idea of using filesystem specific accelerator design to speed up frequent filesystem operations like directory search on FPGAs. We designed a prototype for the ext2 filesystem's directory search operation with tiers of caching of filesystem metadata to speed up the search. For interconnection network, we analyzed an existing algorithm for generating an optimal topology based on application's communication pattern. We collected the communication trace of various MPI based parallel applications and used for our analysis. We verified that the optimal topology generation algorithm does work for real-world MPI applications.