cacheSim is a cache simulator which simulates a cache based on its
input parameters. If you have used the other tools, it should
already be in your path.
It has four inputs:
It defines cache associativity. For example, associativity is 1 for
a direct-map cache or 2 for a 2-way set associativity cache.
Size: It defines cache size in bytes. For example, for the
direct-map cache designed in Hw 5, which has 256 sets of 4 16-byte
words, the size is 2048.
Block Size: It defines cache block size in bytes. For example, in Hw
5, each cache block is 4 2-byte words, therefore, cache block size
Input File: It is a trace file which is used as input of cacheSim.
example to simulate the direct-map cache designed in HW5, you should
use cacheSim as follows:
1 2048 8 ./mem1.addr
can use any of test traces and assign its path as the last input
parameter to cacheSim.
simulate 2-way set associative cache you have designed in Hw 5, you
should use cacheSim in this way:
2 4096 8 mem_2way7.addr
shows actions happening in the defined cache after running each line
of the trace input file. Example running:
cacheSim 1 2048 8 ./mem5.addr
Load Miss for Address 348
Load Miss for Address 2396 with Eviction
are the actions happening when running mem5.addr (one load to 348 and
one load to 2396)