CS/ECE 755: Discussion Session VII

  • "64KByte Sum-Addressed-Memory Cache with 1.6ns Cycle and 2.6ns latency", by R.Heald et.al (SUN Microelectronics)

  • "Fully Parallel 30-MHz, 2.5Mb CAM", by F.Shafai, et.al. (NORTEL)

    • See

    IEEE Journal of Solid-State Circuits, November 1998

    SUM

    CAM