gem5
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Groups Pages
decoder.cc
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2012-2014 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Copyright (c) 2012 Google
15  * All rights reserved.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions are
19  * met: redistributions of source code must retain the above copyright
20  * notice, this list of conditions and the following disclaimer;
21  * redistributions in binary form must reproduce the above copyright
22  * notice, this list of conditions and the following disclaimer in the
23  * documentation and/or other materials provided with the distribution;
24  * neither the name of the copyright holders nor the names of its
25  * contributors may be used to endorse or promote products derived from
26  * this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39  *
40  * Authors: Gabe Black
41  */
42 
43 #include "arch/arm/decoder.hh"
44 
45 #include "arch/arm/isa.hh"
46 #include "arch/arm/isa_traits.hh"
47 #include "arch/arm/utility.hh"
48 #include "base/trace.hh"
49 #include "debug/Decoder.hh"
50 
51 namespace ArmISA
52 {
53 
55 
57  : data(0), fpscrLen(0), fpscrStride(0), decoderFlavour(isa
58  ? isa->decoderFlavour()
59  : Enums::Generic)
60 {
61  reset();
62 }
63 
64 void
66 {
67  bigThumb = false;
68  offset = 0;
69  emi = 0;
70  instDone = false;
71  outOfBytes = true;
72  foundIt = false;
73 }
74 
75 void
77 {
78  // emi is typically ready, with some caveats below...
79  instDone = true;
80 
81  if (!emi.thumb) {
82  emi.instBits = data;
83  if (!emi.aarch64) {
84  emi.sevenAndFour = bits(data, 7) && bits(data, 4);
85  emi.isMisc = (bits(data, 24, 23) == 0x2 &&
86  bits(data, 20) == 0);
87  }
88  consumeBytes(4);
89  DPRINTF(Decoder, "Arm inst: %#x.\n", (uint64_t)emi);
90  } else {
91  uint16_t word = (data >> (offset * 8));
92  if (bigThumb) {
93  // A 32 bit thumb inst is half collected.
94  emi.instBits = emi.instBits | word;
95  bigThumb = false;
96  consumeBytes(2);
97  DPRINTF(Decoder, "Second half of 32 bit Thumb: %#x.\n",
98  emi.instBits);
99  } else {
100  uint16_t highBits = word & 0xF800;
101  if (highBits == 0xE800 || highBits == 0xF000 ||
102  highBits == 0xF800) {
103  // The start of a 32 bit thumb inst.
104  emi.bigThumb = 1;
105  if (offset == 0) {
106  // We've got the whole thing.
107  emi.instBits = (data >> 16) | (data << 16);
108  DPRINTF(Decoder, "All of 32 bit Thumb: %#x.\n",
109  emi.instBits);
110  consumeBytes(4);
111  } else {
112  // We only have the first half word.
114  "First half of 32 bit Thumb.\n");
115  emi.instBits = (uint32_t)word << 16;
116  bigThumb = true;
117  consumeBytes(2);
118  // emi not ready yet.
119  instDone = false;
120  }
121  } else {
122  // A 16 bit thumb inst.
123  consumeBytes(2);
124  emi.instBits = word;
125  // Set the condition code field artificially.
126  emi.condCode = COND_UC;
127  DPRINTF(Decoder, "16 bit Thumb: %#x.\n",
128  emi.instBits);
129  if (bits(word, 15, 8) == 0xbf &&
130  bits(word, 3, 0) != 0x0) {
131  foundIt = true;
132  itBits = bits(word, 7, 0);
134  "IT detected, cond = %#x, mask = %#x\n",
135  itBits.cond, itBits.mask);
136  }
137  }
138  }
139  }
140 }
141 
142 void
144 {
145  offset += numBytes;
146  assert(offset <= sizeof(MachInst) || emi.decoderFault);
147  if (offset == sizeof(MachInst))
148  outOfBytes = true;
149 }
150 
151 void
152 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
153 {
154  data = inst;
155  offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
156  emi.thumb = pc.thumb();
157  emi.aarch64 = pc.aarch64();
158  emi.fpscrLen = fpscrLen;
159  emi.fpscrStride = fpscrStride;
160 
161  const Addr alignment(pc.thumb() ? 0x1 : 0x3);
162  emi.decoderFault = static_cast<uint8_t>(
163  pc.instAddr() & alignment ? DecoderFault::UNALIGNED : DecoderFault::OK);
164 
165  outOfBytes = false;
166  process();
167 }
168 
171 {
172  if (!instDone)
173  return NULL;
174 
175  const int inst_size((!emi.thumb || emi.bigThumb) ? 4 : 2);
176  ExtMachInst this_emi(emi);
177 
178  pc.npc(pc.pc() + inst_size);
179  if (foundIt)
180  pc.nextItstate(itBits);
181  this_emi.itstate = pc.itstate();
182  pc.size(inst_size);
183 
184  emi = 0;
185  instDone = false;
186  foundIt = false;
187 
188  return decode(this_emi, pc.instAddr());
189 }
190 
191 }
uint32_t MachInst
Definition: types.hh:54
#define DPRINTF(x,...)
Definition: trace.hh:212
void consumeBytes(int numBytes)
Consume bytes by moving the offset into the data word and sanity check the results.
Definition: decoder.cc:143
Some registers alias with others, and therefore need to be translated.
Definition: isa.cc:67
No fault.
Definition: types.hh:631
void process()
Pre-decode an instruction from the current state of the decoder.
Definition: decoder.cc:76
ITSTATE itBits
Definition: decoder.hh:70
const char data[]
Definition: circlebuf.cc:43
MachInst data
Definition: decoder.hh:64
static GenericISA::BasicDecodeCache defaultCache
A cache of decoded instruction objects.
Definition: decoder.hh:78
bool outOfBytes
Definition: decoder.hh:67
Bitfield< 41, 40 > fpscrStride
Definition: types.hh:80
StaticInstPtr decode(ArmISA::PCState &pc)
Decode an instruction or fetch it from the code cache.
Definition: decoder.cc:170
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
uint64_t ExtMachInst
Definition: types.hh:41
void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
Feed data to the decoder.
Definition: decoder.cc:152
Bitfield< 39, 37 > fpscrLen
Definition: types.hh:81
GenericISA::SimplePCState< MachInst > PCState
Definition: types.hh:43
IntReg pc
Definition: remote_gdb.hh:91
Decoder(ISA *isa=nullptr)
Definition: decoder.cc:56
void reset()
Reset the decoders internal state.
Definition: decoder.cc:65
ExtMachInst emi
Definition: decoder.hh:63
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it...
Definition: bitfield.hh:67
Unaligned instruction fault.
Definition: types.hh:632

Generated on Fri Jun 9 2017 13:03:33 for gem5 by doxygen 1.8.6