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BaseCache::CacheSlavePort Class Reference

A cache slave port is used for the CPU-side port of the cache, and it is basically a simple timing port that uses a transmit list for responses to the CPU (or connected master). More...

#include <base.hh>

Inheritance diagram for BaseCache::CacheSlavePort:
QueuedSlavePort SlavePort BaseSlavePort Port

Public Member Functions

void setBlocked ()
 Do not accept any new requests. More...
 
void clearBlocked ()
 Return to normal operation and accept new requests. More...
 
bool isBlocked () const
 
- Public Member Functions inherited from QueuedSlavePort
 QueuedSlavePort (const std::string &name, MemObject *owner, RespPacketQueue &resp_queue, PortID id=InvalidPortID)
 Create a QueuedPort with a given name, owner, and a supplied implementation of a packet queue. More...
 
virtual ~QueuedSlavePort ()
 
void schedTimingResp (PacketPtr pkt, Tick when, bool force_order=false)
 Schedule the sending of a timing response. More...
 
bool checkFunctional (PacketPtr pkt)
 Check the list of buffered packets against the supplied functional request. More...
 
- Public Member Functions inherited from SlavePort
 SlavePort (const std::string &name, MemObject *owner, PortID id=InvalidPortID)
 Slave port. More...
 
virtual ~SlavePort ()
 
Tick sendAtomicSnoop (PacketPtr pkt)
 Send an atomic snoop request packet, where the data is moved and the state is updated in zero time, without interleaving with other memory accesses. More...
 
void sendFunctionalSnoop (PacketPtr pkt)
 Send a functional snoop request packet, where the data is instantly updated everywhere in the memory system, without affecting the current state of any block or moving the block. More...
 
bool sendTimingResp (PacketPtr pkt)
 Attempt to send a timing response to the master port by calling its corresponding receive function. More...
 
void sendTimingSnoopReq (PacketPtr pkt)
 Attempt to send a timing snoop request packet to the master port by calling its corresponding receive function. More...
 
void sendRetryReq ()
 Send a retry to the master port that previously attempted a sendTimingReq to this slave port and failed. More...
 
void sendRetrySnoopResp ()
 Send a retry to the master port that previously attempted a sendTimingSnoopResp to this slave port and failed. More...
 
bool isSnooping () const
 Find out if the peer master port is snooping or not. More...
 
void sendRangeChange () const
 Called by the owner to send a range change. More...
 
virtual AddrRangeList getAddrRanges () const =0
 Get a list of the non-overlapping address ranges the owner is responsible for. More...
 
- Public Member Functions inherited from BaseSlavePort
BaseMasterPortgetMasterPort () const
 
bool isConnected () const
 
- Public Member Functions inherited from Port
const std::string name () const
 Return port name (for DPRINTF). More...
 
PortID getId () const
 Get the port id. More...
 

Protected Member Functions

 CacheSlavePort (const std::string &_name, BaseCache *_cache, const std::string &_label)
 
- Protected Member Functions inherited from QueuedSlavePort
void recvRespRetry ()
 Called by the master port if sendTimingResp was called on this slave port (causing recvTimingResp to be called on the master port) and was unsuccesful. More...
 
- Protected Member Functions inherited from SlavePort
void unbind ()
 Called by the master port to unbind. More...
 
void bind (MasterPort &master_port)
 Called by the master port to bind. More...
 
virtual Tick recvAtomic (PacketPtr pkt)=0
 Receive an atomic request packet from the master port. More...
 
virtual void recvFunctional (PacketPtr pkt)=0
 Receive a functional request packet from the master port. More...
 
virtual bool recvTimingReq (PacketPtr pkt)=0
 Receive a timing request from the master port. More...
 
virtual bool recvTimingSnoopResp (PacketPtr pkt)
 Receive a timing snoop response from the master port. More...
 
- Protected Member Functions inherited from BaseSlavePort
 BaseSlavePort (const std::string &name, MemObject *owner, PortID id=InvalidPortID)
 
virtual ~BaseSlavePort ()
 
- Protected Member Functions inherited from Port
 Port (const std::string &_name, MemObject &_owner, PortID _id)
 Abstract base class for ports. More...
 
virtual ~Port ()
 Virtual destructor due to inheritance. More...
 

Protected Attributes

RespPacketQueue queue
 A normal packet queue used to store responses. More...
 
bool blocked
 
bool mustSendRetry
 
- Protected Attributes inherited from QueuedSlavePort
RespPacketQueuerespQueue
 Packet queue used to store outgoing responses. More...
 
- Protected Attributes inherited from BaseSlavePort
BaseMasterPort_baseMasterPort
 
- Protected Attributes inherited from Port
const PortID id
 A numeric identifier to distinguish ports in a vector, and set to InvalidPortID in case this port is not part of a vector. More...
 
MemObjectowner
 A reference to the MemObject that owns this port. More...
 

Private Member Functions

void processSendRetry ()
 

Private Attributes

EventWrapper< CacheSlavePort,&CacheSlavePort::processSendRetrysendRetryEvent
 

Detailed Description

A cache slave port is used for the CPU-side port of the cache, and it is basically a simple timing port that uses a transmit list for responses to the CPU (or connected master).

In addition, it has the functionality to block the port for incoming requests. If blocked, the port will issue a retry once unblocked.

Definition at line 151 of file base.hh.

Constructor & Destructor Documentation

BaseCache::CacheSlavePort::CacheSlavePort ( const std::string &  _name,
BaseCache _cache,
const std::string &  _label 
)
protected

Definition at line 61 of file base.cc.

Member Function Documentation

void BaseCache::CacheSlavePort::clearBlocked ( )

Return to normal operation and accept new requests.

Definition at line 116 of file base.cc.

References BaseCache::blocked, curTick(), and DPRINTF.

Referenced by BaseCache::clearBlocked().

bool BaseCache::CacheSlavePort::isBlocked ( ) const
inline

Definition at line 162 of file base.hh.

References blocked.

void BaseCache::CacheSlavePort::processSendRetry ( )
private

Definition at line 128 of file base.cc.

References DPRINTF.

void BaseCache::CacheSlavePort::setBlocked ( )

Do not accept any new requests.

Definition at line 101 of file base.cc.

References blocked, EventManager::deschedule(), DPRINTF, mustSendRetry, Port::owner, and sendRetryEvent.

Referenced by BaseCache::setBlocked().

Member Data Documentation

bool BaseCache::CacheSlavePort::blocked
protected

Definition at line 172 of file base.hh.

Referenced by isBlocked(), and setBlocked().

bool BaseCache::CacheSlavePort::mustSendRetry
protected

Definition at line 174 of file base.hh.

Referenced by setBlocked().

RespPacketQueue BaseCache::CacheSlavePort::queue
protected

A normal packet queue used to store responses.

Definition at line 170 of file base.hh.

EventWrapper<CacheSlavePort, &CacheSlavePort::processSendRetry> BaseCache::CacheSlavePort::sendRetryEvent
private

Definition at line 181 of file base.hh.

Referenced by setBlocked().


The documentation for this class was generated from the following files:

Generated on Fri Jun 9 2017 13:04:02 for gem5 by doxygen 1.8.6