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gic_v2m.cc
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1 /*
2  * Copyright (c) 2013 ARM Limited
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37  * Authors: Matt Evans
38  */
39 
59 #include "dev/arm/gic_v2m.hh"
60 
61 #include "base/bitunion.hh"
62 #include "base/intmath.hh"
63 #include "debug/Checkpoint.hh"
64 #include "debug/GICV2M.hh"
65 #include "dev/io_device.hh"
66 #include "mem/packet.hh"
67 #include "mem/packet_access.hh"
68 
69 Gicv2m *
70 Gicv2mParams::create()
71 {
72  return new Gicv2m(this);
73 }
74 
76 Gicv2mFrameParams::create()
77 {
78  return new Gicv2mFrame(this);
79 }
80 
82  : PioDevice(p), pioDelay(p->pio_delay), frames(p->frames), gic(p->gic)
83 {
84  // Assert SPI ranges start at 32
85  for (int i = 0; i < frames.size(); i++) {
86  if (frames[i]->spi_base < 32)
87  fatal("Gicv2m: Frame %d's SPI base (%d) is not in SPI space\n",
88  i, frames[i]->spi_base);
89  }
90  unsigned int x = frames.size();
91  fatal_if(!isPowerOf2(x), "Gicv2m: The v2m shim must be configured with "
92  "a power-of-two number of frames\n");
94 }
95 
98 {
99  AddrRangeList ranges;
100  for (int i = 0; i < frames.size(); i++) {
101  ranges.push_back(RangeSize(frames[i]->addr, FRAME_SIZE));
102  }
103  return ranges;
104 }
105 
106 Tick
108 {
109  int frame = frameFromAddr(pkt->getAddr());
110 
111  assert(frame >= 0);
112 
113  Addr offset = pkt->getAddr() - frames[frame]->addr;
114 
115  switch (offset) {
116  case MSI_TYPER:
117  pkt->set<uint32_t>((frames[frame]->spi_base << 16) |
118  frames[frame]->spi_len);
119  break;
120 
121  case PER_ID4:
122  pkt->set<uint32_t>(0x4 | ((4+log2framenum) << 4));
123  // Nr of 4KB blocks used by component. This is messy as frames are 64K
124  // (16, ie 2^4) and we should assert we're given a Po2 number of frames.
125  break;
126  default:
127  DPRINTF(GICV2M, "GICv2m: Read of unk reg %#x\n", offset);
128  pkt->set<uint32_t>(0);
129  };
130 
131  pkt->makeAtomicResponse();
132 
133  return pioDelay;
134 }
135 
136 Tick
138 {
139  int frame = frameFromAddr(pkt->getAddr());
140 
141  assert(frame >= 0);
142 
143  Addr offset = pkt->getAddr() - frames[frame]->addr;
144 
145  if (offset == MSI_SETSPI_NSR) {
146  /* Is payload SPI number within range? */
147  uint32_t m = pkt->get<uint32_t>();
148  if (m >= frames[frame]->spi_base &&
149  m < (frames[frame]->spi_base + frames[frame]->spi_len)) {
150  DPRINTF(GICV2M, "GICv2m: Frame %d raising MSI %d\n", frame, m);
151  gic->sendInt(m);
152  }
153  } else {
154  DPRINTF(GICV2M, "GICv2m: Write of unk reg %#x\n", offset);
155  }
156 
157  pkt->makeAtomicResponse();
158 
159  return pioDelay;
160 }
161 
162 int
164 {
165  for (int i = 0; i < frames.size(); i++) {
166  if (a >= frames[i]->addr && a < (frames[i]->addr + FRAME_SIZE))
167  return i;
168  }
169  return -1;
170 }
#define DPRINTF(x,...)
Definition: trace.hh:212
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:398
void set(T v, ByteOrder endian)
Set the value in the data pointer to v using the specified endianness.
int frameFromAddr(Addr a) const
Determine which frame a PIO access lands in.
Definition: gic_v2m.cc:163
Bitfield< 7 > i
Definition: miscregs.hh:1378
Bitfield< 0 > m
Definition: miscregs.hh:1577
BaseGic * gic
Gic to which we fire interrupts.
Definition: gic_v2m.hh:91
Bitfield< 8 > a
Definition: miscregs.hh:1377
ip6_addr_t addr
Definition: inet.hh:335
static const int PER_ID4
Definition: gic_v2m.hh:82
Bitfield< 23, 0 > offset
Definition: types.hh:149
static const int MSI_SETSPI_NSR
Definition: gic_v2m.hh:81
static const int FRAME_SIZE
Definition: gic_v2m.hh:78
T get(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness.
Gicv2mParams Params
Definition: gic_v2m.hh:97
Ultimately this class should be embedded in the Gicv2m class, but this confuses Python as 'Gicv2m::Fr...
Definition: gic_v2m.hh:62
virtual void sendInt(uint32_t num)=0
Post an interrupt from a device that is connected to the GIC.
void makeAtomicResponse()
Definition: packet.hh:857
Gicv2m(const Params *p)
Definition: gic_v2m.cc:81
uint64_t Tick
Tick count type.
Definition: types.hh:63
std::vector< Gicv2mFrame * > frames
A set of configured hardware frames.
Definition: gic_v2m.hh:88
virtual Tick read(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:107
#define fatal(...)
Definition: misc.hh:163
bool isPowerOf2(const T &n)
Definition: intmath.hh:73
This device is the base class which all devices senstive to an address range inherit from...
Definition: io_device.hh:84
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
virtual Tick write(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:137
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:245
int floorLog2(unsigned x)
Definition: intmath.hh:100
Declaration of the Packet class.
virtual AddrRangeList getAddrRanges() const
Return the address ranges used by the Gicv2m This is the set of frame addresses.
Definition: gic_v2m.cc:97
Implementiation of a GICv2m MSI shim.
fatal_if(p->js_features.size() > 16,"Too many job slot feature registers specified (%i)\n", p->js_features.size())
const Tick pioDelay
Latency for an MMIO operation.
Definition: gic_v2m.hh:85
Bitfield< 0 > p
Bitfield< 1 > x
Definition: types.hh:105
static const int MSI_TYPER
Definition: gic_v2m.hh:80
unsigned int log2framenum
Count of number of configured frames, as log2(frames)
Definition: gic_v2m.hh:94
Addr getAddr() const
Definition: packet.hh:639

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