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misc.hh File Reference
#include <cassert>
#include <cstdlib>
#include <iostream>
#include <utility>
#include "base/compiler.hh"
#include "base/cprintf.hh"

Go to the source code of this file.

Classes

class  Logger
 
class  ExitLogger
 

Macros

#define exit_message(logger, code,...)
 
#define panic(...)
 
#define fatal(...)
 
#define panic_if(cond,...)
 Conditional panic macro that checks the supplied condition and only panics if the condition is true and allows the programmer to specify diagnostic printout. More...
 
#define fatal_if(cond,...)
 Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condition is true and allows the programmer to specify diagnostic printout. More...
 
#define base_message(logger,...)   logger.print(__FUNCTION__, __FILE__, __LINE__, __VA_ARGS__)
 
#define base_message_once(...)
 
#define warn(...)   base_message(::Logger::get(::Logger::WARN), __VA_ARGS__)
 
#define inform(...)   base_message(::Logger::get(::Logger::INFO), __VA_ARGS__)
 
#define hack(...)   base_message(::Logger::get(::Logger::HACK), __VA_ARGS__)
 
#define warn_once(...)   base_message_once(::Logger::get(::Logger::WARN), __VA_ARGS__)
 
#define inform_once(...)   base_message_once(::Logger::get(::Logger::INFO), __VA_ARGS__)
 
#define hack_once(...)   base_message_once(::Logger::get(::Logger::HACK), __VA_ARGS__)
 
#define warn_if(cond,...)
 Conditional warning macro that checks the supplied condition and only prints a warning if the condition is true. More...
 
#define chatty_assert(cond,...)
 The chatty assert macro will function like a normal assert, but will allow the specification of additional, helpful material to aid debugging why the assertion actually failed. More...
 

Macro Definition Documentation

#define base_message (   logger,
  ... 
)    logger.print(__FUNCTION__, __FILE__, __LINE__, __VA_ARGS__)

Definition at line 201 of file misc.hh.

#define base_message_once (   ...)
Value:
do { \
static bool once = false; \
if (!once) { \
base_message(__VA_ARGS__); \
once = true; \
} \
} while (0)
#define base_message(logger,...)
Definition: misc.hh:201
if(it_gpu==gpuTypeMap.end())
Definition: gpu_nomali.cc:75

Definition at line 210 of file misc.hh.

#define chatty_assert (   cond,
  ... 
)
Value:
do { \
if (!(cond)) \
panic("assert(" # cond ") failed: %s", csprintf(__VA_ARGS__)); \
} while (0)
#define panic(...)
Definition: misc.hh:153
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
if(it_gpu==gpuTypeMap.end())
Definition: gpu_nomali.cc:75
cond
Definition: types.hh:63

The chatty assert macro will function like a normal assert, but will allow the specification of additional, helpful material to aid debugging why the assertion actually failed.

Like the normal assertion, the chatty_assert will not be active in fast builds.

Parameters
condCondition that is checked; if false -> assert
...Printf-based format string with arguments, extends printout.NDEBUG

Definition at line 259 of file misc.hh.

Referenced by Cache::access(), StridePrefetcher::PCTable::allocateNewContext(), Cache::handleFill(), Cache::handleSnoop(), VoltageDomain::perfLevel(), VoltageDomain::sanitiseVoltages(), MemChecker::WriteCluster::startWrite(), VoltageDomain::voltage(), and Cache::writebackBlk().

#define exit_message (   logger,
  code,
  ... 
)
Value:
do { \
logger.print(__FUNCTION__, __FILE__, __LINE__, __VA_ARGS__); \
if (code < 0) \
::abort(); \
::exit(code); \
} while (0)
Bitfield< 3 > exit
Definition: misc.hh:849
if(it_gpu==gpuTypeMap.end())
Definition: gpu_nomali.cc:75

Definition at line 137 of file misc.hh.

#define fatal (   ...)
Value:
__VA_ARGS__)
static Logger & get(LogLevel ll)
Get a Logger corresponding to a specific log level.
Definition: misc.cc:56
#define exit_message(logger, code,...)
Definition: misc.hh:137

Definition at line 163 of file misc.hh.

Referenced by Histogram::add(), LabelMap::addLabel(), AddrRange::AddrRange(), CacheRecorder::aggregateRecords(), System::allocPhysPages(), AlphaSystem::AlphaSystem(), ArmSystem::ArmSystem(), arrayParamIn(), HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >::AtomicInstBase(), BaseSetAssoc::BaseSetAssoc(), BaseSimpleCPU::BaseSimpleCPU(), BiModeBP::BiModeBP(), MasterPort::bind(), Scheduler::bindList(), BrigObject::BrigObject(), RegAddrOperand< RegOperandType >::calcUniform(), HsailISA::Call::Call(), CheckpointIn::CheckpointIn(), Scheduler::chooseWave(), MipsISA::Interrupts::clear(), MipsISA::Interrupts::clearAll(), SrcClockDomain::clockPeriod(), cloneFunc(), OutputDirectory::close(), AbstractController::collateStats(), HsailISA::compare(), GPUStaticInst::completeAcc(), ComputeUnit::ComputeUnit(), HsailISA::constructAtomic(), CopyEngine::CopyEngine(), CowDiskImage::CowDiskImage(), PhysicalMemory::createBackingStore(), HsaObject::createHsaObject(), OutputDirectory::createSubdirectory(), FaultModel::declare_router(), Minor::Decode::Decode(), HsailISA::decodeAtomicHelper(), HsailISA::decodeLd(), HsailISA::decodeLd2(), HsailISA::decodeLda(), HsailISA::decodeSt(), DefaultBTB::DefaultBTB(), DefaultCommit< Impl >::DefaultCommit(), DefaultDecode< Impl >::DefaultDecode(), DefaultFetch< Impl >::DefaultFetch(), DefaultIEW< Impl >::DefaultIEW(), DefaultRename< Impl >::DefaultRename(), DerivedClockDomain::DerivedClockDomain(), Shader::doFunctionalAccess(), MinorCPU::drainResume(), DRAMCtrl::DRAMCtrl(), DramRotGen::DramRotGen(), DRAMSim2Wrapper::DRAMSim2Wrapper(), Stats::dump(), ElfObject::ElfObject(), Stats::enable(), AbstractController::enqueuePrefetch(), EtherTapStub::EtherTapStub(), GPUStaticInst::execAtomic(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), GPUStaticInst::execAtomicAcq(), GPUStaticInst::execLdAcq(), HsailISA::Call::execPseudoInst(), GPUStaticInst::execSt(), KernelLaunchStaticInst::execute(), Minor::Execute::Execute(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::execute(), HsailISA::MemFence::execute(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execute(), HsailISA::Call::execute(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execute(), DRAMSim2Wrapper::extractConfig(), FALRU::FALRU(), FaultModel::fault_prob(), FaultModel::fault_vector(), Minor::Fetch1::Fetch1(), Minor::Fetch2::Fetch2(), BaseXBar::findPort(), findRegDataType(), Process::fixupStackFault(), FlashDevice::FlashDevice(), FullO3CPU< Impl >::FullO3CPU(), Network::functionalRead(), Network::functionalWrite(), GarnetSyntheticTraffic::GarnetSyntheticTraffic(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::generateDisassembly(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::generateDisassembly(), GarnetSyntheticTraffic::generatePkt(), NetworkInterface::get_vnet(), getBrigDataTypeBytes(), DRAMPower::getDataRate(), Minor::LSQ::SpecialDataRequest::getHeadPacket(), System::getMasterId(), System::getMasterName(), MemObject::getMasterPort(), ExternalMaster::getMasterPort(), ComputeUnit::getMasterPort(), ArmISA::TableWalker::getMasterPort(), LdsState::getRefCounter(), HsailCode::getSize(), MemObject::getSlavePort(), ExternalSlave::getSlavePort(), LdsState::getSlavePort(), AlphaISA::getTargetThread(), SparcISA::getTargetThread(), AlphaISA::getVirtProcNum(), SparcISA::getVirtProcNum(), Gicv2m::Gicv2m(), Minor::Execute::handleMemResponse(), if(), AddrMapper::init(), MemCheckerMonitor::init(), CommMonitor::init(), BaseKvmCPU::init(), MinorCPU::init(), ExternalMaster::init(), ExternalSlave::init(), DRAMSim2::init(), TrafficGen::init(), SerialLink::init(), Bridge::init(), HsailCode::init(), RegOrImmOperand< RegOperand, T >::init(), BaseCache::init(), RegAddrOperand< RegOperandType >::init(), NoRegAddrOperand::init(), ListOperand::init(), FunctionRefOperand::init(), DRAMCtrl::init(), RegOrImmOperand< RegOperand, T >::init_from_vect(), GPUStaticInst::initiateAcc(), Process::initState(), FreebsdArmSystem::initState(), LinuxArmSystem::initState(), X86System::initState(), ArmSystem::initState(), System::initState(), BaseRegOperand::initWithStrOffset(), RiscvISA::TLB::insert(), MipsISA::TLB::insert(), PowerISA::TLB::insert(), GenericISA::M5DebugFault::invoke(), ClDriver::ioctl(), AddrMapper::isSnooping(), Kvm::Kvm(), HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >::LdInstBase(), SymbolTable::load(), PseudoInst::loadsymbol(), LocalBP::LocalBP(), RoutingUnit::lookupRoutingTable(), X86ISA::I8259::lowerInterruptPin(), Minor::LSQ::LSQ(), GPUDynInst::makeAtomicOpFunctor(), MultiLevelPageTable< ISAOps >::map(), FuncPageTable::map(), GenericArmPciHost::mapPciInterrupt(), HsailISA::MemFence::MemFence(), SETranslatingPortProxy::memsetBlob(), MinorCPU::MinorCPU(), mkutctime(), mmapImpl(), Trace::NativeTrace::NativeTrace(), NoArchPageTable::NoArchPageTable(), TrafficGen::noProgress(), objParamIn(), Stats::Text::open(), paramIn(), TrafficGen::parseConfig(), PciDevice::PciDevice(), Minor::Pipeline::Pipeline(), ArmISA::PMU::PMU(), MipsISA::Interrupts::post(), Process::Process(), BrigObject::processDirectives(), DRAMCtrl::Rank::processRefreshEvent(), X86ISA::I8259::raiseInterruptPin(), RangeAddrMapper::RangeAddrMapper(), A9SCU::read(), SETranslatingPortProxy::readBlob(), RubySystem::readCompressedTrace(), readlinkFunc(), HsailISA::GPUISA::readMiscReg(), PowerISA::ISA::readMiscReg(), PowerISA::ISA::readMiscRegNoEffect(), SETranslatingPortProxy::readString(), RealViewOsc::RealViewOsc(), RubyPort::MemSlavePort::recvFunctional(), LdsState::CuSidePort::recvFunctional(), TLBCoalescer::MemSidePort::recvFunctional(), StubSlavePort::recvFunctionalSnoop(), BaseXBar::recvRangeChange(), TLBCoalescer::CpuSidePort::recvRespRetry(), TLBCoalescer::MemSidePort::recvRespRetry(), LdsState::CuSidePort::recvRetry(), StubSlavePort::recvTimingSnoopResp(), Terminal::regDataAvailCallback(), RealViewCtrl::registerDevice(), System::registerThreadContext(), LdsState::releaseSpace(), MultiLevelPageTable< ISAOps >::remap(), OutputDirectory::remove(), reqScopeToHSAScope(), reqSegmentToHSASegment(), Stats::reset(), SatCounter::SatCounter(), Scheduler::Scheduler(), SlavePort::sendRangeChange(), ComputeUnit::sendRequest(), RubySystem::serialize(), MipsISA::Interrupts::serialize(), GpuDispatcher::serialize(), Serializable::serializeAll(), PhysicalMemory::serializeStore(), Set::Set(), MessageBuffer::setConsumer(), OutputDirectory::setDirectory(), PowerISA::ISA::setMiscReg(), PowerISA::ISA::setMiscRegNoEffect(), GPUDynInst::setRequestFlags(), Set::setSize(), X86ISA::I8259::signalInterrupt(), SimPoint::SimPoint(), simulate(), SparcSystem::SparcSystem(), MathExprPowerModel::startup(), AlphaBackdoor::startup(), HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >::StInstBase(), StoreSet::StoreSet(), Process::syscall(), System::System(), GarnetSyntheticTraffic::tick(), X86ISA::TLB::TLB(), SparcISA::TLB::TLB(), TournamentBP::TournamentBP(), X86ISA::GpuTLB::translate(), PowerISA::TLB::translateAtomic(), ElfObject::tryFile(), UFSHostDevice::UFSHostDevice(), unimplementedFunc(), MultiLevelPageTable< ISAOps >::unmap(), MipsISA::Interrupts::unserialize(), X86ISA::TLB::unserialize(), Cache::unserialize(), PhysicalMemory::unserializeStore(), BaseKvmCPU::verifyMemoryMode(), AtomicSimpleCPU::verifyMemoryMode(), TimingSimpleCPU::verifyMemoryMode(), FullO3CPU< Impl >::verifyMemoryMode(), MipsISA::vtophys(), ArmISA::vtophys(), PowerISA::vtophys(), RiscvISA::vtophys(), CpuLocalTimer::Timer::watchdogAtZero(), System::workItemEnd(), SETranslatingPortProxy::writeBlob(), RubySystem::writeCompressedTrace(), HsailISA::GPUISA::writeMiscReg(), X86ISA::IntelMP::FloatingPointer::writeOut(), and SETranslatingPortProxy::writeString().

#define fatal_if (   cond,
  ... 
)
Value:
do { \
if ((cond)) { \
fatal("fatal condition " # cond " occurred: %s", \
csprintf(__VA_ARGS__)); \
} \
} while (0)
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
#define fatal(...)
Definition: misc.hh:163
if(it_gpu==gpuTypeMap.end())
Definition: gpu_nomali.cc:75
cond
Definition: types.hh:63

Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condition is true and allows the programmer to specify diagnostic printout.

Useful to replace if + fatal, or if + print + assert, etc.

Parameters
condCondition that is checked; if true -> fatal
...Printf-based format string with arguments, extends printout.

Definition at line 192 of file misc.hh.

#define hack (   ...)    base_message(::Logger::get(::Logger::HACK), __VA_ARGS__)
#define hack_once (   ...)    base_message_once(::Logger::get(::Logger::HACK), __VA_ARGS__)
#define inform (   ...)    base_message(::Logger::get(::Logger::INFO), __VA_ARGS__)
#define inform_once (   ...)    base_message_once(::Logger::get(::Logger::INFO), __VA_ARGS__)

Definition at line 228 of file misc.hh.

#define panic (   ...)
Value:
__VA_ARGS__)
static Logger & get(LogLevel ll)
Get a Logger corresponding to a specific log level.
Definition: misc.cc:56
#define exit_message(logger, code,...)
Definition: misc.hh:137

Definition at line 153 of file misc.hh.

Referenced by IdeDisk::abortDma(), MipsISA::RemoteGDB::acc(), PowerISA::RemoteGDB::acc(), AlphaISA::RemoteGDB::acc(), RiscvISA::RemoteGDB::acc(), Terminal::accept(), VncServer::accept(), TapListener::accept(), GDBListener::accept(), AbstractMemory::access(), GpuDispatcher::accessUserVar(), PyEvent::acquireImpl(), DRAMCtrl::activateBank(), FuncUnit::addCapability(), CheckTable::addCheck(), System::addFuncEventOrPanic(), System::addKernelFuncEventOrPanic(), InstructionQueue< Impl >::addToProducers(), ArmISA::ArmStaticInst::advSIMDFPAccessTrap64(), CacheMemory::allocate(), KvmVM::allocMemSlot(), AlphaSystem::AlphaSystem(), IGbE::DescCache< T >::areaChanged(), AlphaProcess::argsInit(), PosixKvmTimer::arm(), HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >::AtomicInstBase(), PerfKvmCounter::attach(), Stats::Info::baseCheck(), BaseKvmCPU::BaseKvmCPU(), DefaultFetch< Impl >::branchCount(), StaticInst::branchTarget(), X86ISA::buildIntResponse(), PerfectCacheMemory< ENTRY >::cacheProbe(), CacheRecorder::CacheRecorder(), T1000::calcPciConfigAddr(), Malta::calcPciConfigAddr(), T1000::calcPciIOAddr(), Malta::calcPciIOAddr(), T1000::calcPciMemAddr(), Malta::calcPciMemAddr(), PosixKvmTimer::calcResolution(), ArmISA::canReadAArch64SysReg(), ArmISA::canWriteAArch64SysReg(), VirtDescriptor::chainRead(), VirtDescriptor::chainWrite(), CopyEngine::CopyEngineChannel::channelRead(), CopyEngine::CopyEngineChannel::channelWrite(), Trace::ArmNativeTrace::check(), PacketFifo::check(), X86ISA::X86MicroopBase::checkCondition(), Kvm::checkExtension(), RubyTester::checkForDeadlock(), Packet::checkFunctional(), PowerISA::Interrupts::checkInterrupts(), RiscvISA::Interrupts::checkInterrupts(), AlphaISA::Interrupts::checkInterrupts(), ArmISA::TLB::checkPermissions(), ArmISA::Interrupts::checkRaw(), DRAMCtrl::chooseNext(), OFSchedulingPolicy::chooseWave(), RRSchedulingPolicy::chooseWave(), PowerISA::Interrupts::clear(), RiscvISA::Interrupts::clear(), MipsISA::Interrupts::clear(), AlphaISA::Interrupts::clear(), ArmISA::Interrupts::clear(), SparcISA::ISA::clear(), X86ISA::Interrupts::clear(), ArmISA::ISA::clear64(), PowerISA::Interrupts::clearAll(), RiscvISA::Interrupts::clearAll(), X86ISA::Interrupts::clearAll(), TsunamiCChip::clearIPI(), MaltaCChip::clearIPI(), TsunamiCChip::clearITI(), MaltaCChip::clearITI(), T1000::clearPciInt(), Platform::clearPciInt(), Malta::clearPciInt(), Cache::cmpAndSwap(), KvmVM::coalesceMMIO(), DefaultCommit< Impl >::commitHead(), Minor::Execute::commitInst(), ThreadContext::compare(), StaticInst::completeAcc(), GPUCoalescer::completeIssue(), MemTest::completeRequest(), MipsISA::ISA::configCP(), connectPorts(), VirtIO9PSocket::connectSocket(), ArmISA::copyMiscRegs(), MipsISA::copyMiscRegs(), PacketFifo::copyout(), KvmVM::createDevice(), KvmVM::createIRQChip(), ProtoInputStream::createStreams(), KvmVM::createVCPU(), Kvm::createVM(), GenericTimerMem::ctrlRead(), GenericTimerMem::ctrlWrite(), Linux::ThreadInfo::curThreadInfo(), VncServer::data(), MinorCPU::dbg_vtophys(), FaultModel::declare_router(), X86ISA::decodeAddr(), DRAMCtrl::decodeAddr(), DefaultDecode< Impl >::decodeInsts(), ArmISA::decodeMrsMsrBankedReg(), ArmISA::decodePhysAddrRange64(), PowerISA::StackTrace::decodePrologue(), RiscvISA::StackTrace::decodePrologue(), PowerISA::StackTrace::decodeSave(), RiscvISA::StackTrace::decodeSave(), PowerISA::StackTrace::decodeStack(), RiscvISA::StackTrace::decodeStack(), DefaultFetch< Impl >::DefaultFetch(), KvmVM::delayedStartup(), X86KvmCPU::deliverInterrupts(), RiscvISA::TLB::demapPage(), MipsISA::TLB::demapPage(), PowerISA::TLB::demapPage(), SparcISA::TLB::demapPage(), ArmISA::TLB::demapPage(), Sinic::Device::devIntrClear(), NSGigE::devIntrClear(), Sinic::Device::devIntrPost(), NSGigE::devIntrPost(), OutputDirectory::directory(), ListenSocket::disableAll(), PosixKvmTimer::disarm(), BaseKvmCPU::discardPendingSignal(), IdeController::dispatchAccess(), X86ISA::Decoder::doDisplacementState(), IdeDisk::doDmaTransfer(), ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doLongDescriptor(), ArmISA::TableWalker::doLongDescriptorWrapper(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), ArmISA::FpOp::doOp(), X86ISA::Decoder::doPrefixState(), X86ISA::Decoder::doVexOpcodeState(), BaseKvmCPU::drain(), ProfileNode::dump(), CheckerCPU::dumpAndExit(), StaticInst::eaComp(), ArmISA::DataAbort::ec(), NSGigE::eepromKick(), ElfObject::ElfObject(), ArmISA::ELIs64(), PerfKvmCounter::enableSignals(), ArmISA::encodePhysAddrRange64(), WireBuffer::enqueue(), MessageBuffer::enqueue(), TCPIface::establishConnection(), MathExpr::eval(), DecoderFaultInst::execute(), TraceCPU::ElasticDataGen::execute(), DefaultIEW< Impl >::executeInsts(), LSQUnit< Impl >::executeLoad(), DecoderFaultInst::faultName(), CopyEngine::CopyEngineChannel::fetchDescComplete(), MicrocodeRom::fetchMicroop(), StaticInst::fetchMicroop(), System::fixFuncEventAddr(), Debug::Flag::Flag(), ArmISA::ISA::flattenIntIndex(), ArmISA::flattenIntRegModeIndex(), ArmISA::ISA::flattenMiscIndex(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), MipsISA::fpConvert(), FullO3CPU< Impl >::FullO3CPU(), AbstractMemory::functionalAccess(), Iob::generateIpi(), Pl390::genSwiMask(), SRegOperand::get(), Packet::get(), BaseKvmCPU::getAndFormatOneReg(), AlphaISA::getArgument(), SparcISA::getArgument(), MipsISA::getArgument(), X86ISA::getArgument(), PowerISA::getArgument(), ArmISA::getArgument(), KvmDevice::getAttrPtr(), EmbeddedPython::getCode(), Minor::Execute::getCommittingThread(), VirtIODeviceBase::getCurrentQueue(), AbstractCacheEntry::getDataBlk(), X86KvmCPU::getDebugRegisters(), Message::getDestination(), CheckerCPU::getEA(), SimpleExecContext::getEA(), EtherBus::getEthPort(), EtherTapBase::getEthPort(), EtherLink::getEthPort(), Sinic::Device::getEthPort(), NSGigE::getEthPort(), IGbE::getEthPort(), ArmISA::ArmFault::getFaultAddrReg64(), BaseKvmCPU::getFPUState(), ArmISA::AbortFault< T >::getFsr(), ArmISA::ISA::getGenericTimer(), X86ISA::IntDevice::getIntAddrRange(), PowerISA::Interrupts::getInterrupt(), RiscvISA::Interrupts::getInterrupt(), ArmISA::Interrupts::getInterrupt(), X86ISA::Interrupts::getInterrupt(), Minor::Execute::getIssuingThread(), ArmLinuxProcessBits::getLinuxDesc(), RubyDirectedTester::getMasterPort(), RubyTester::getMasterPort(), BaseSlavePort::getMasterPort(), RubyPort::getMasterPort(), CopyEngine::getMasterPort(), TLBCoalescer::getMasterPort(), X86ISA::GpuTLB::getMasterPort(), ComputeUnit::getMasterPort(), X86ISA::getMem(), Message::getMessageSize(), X86KvmCPU::getMSRs(), BaseKvmCPU::getOneReg(), BaseKvmCPU::getRegisters(), BaseArmKvmCPU::getRegList(), ArmKvmCPU::getRegList(), Minor::Decode::getScheduledThread(), Minor::Fetch2::getScheduledThread(), Minor::Fetch1::getScheduledThread(), ElfObject::getSections(), BaseMasterPort::getSlavePort(), RubyPort::getSlavePort(), TLBCoalescer::getSlavePort(), X86ISA::GpuTLB::getSlavePort(), BaseKvmCPU::getSpecialRegisters(), MathExprPowerModel::getStatValue(), ArmISA::ArmFault::getSyndromeReg64(), X86KvmCPU::getVCpuEvents(), ArmISA::ArmFault::getVector64(), BaseTags::getWayAllocationMax(), X86KvmCPU::getXCRs(), X86KvmCPU::getXSave(), NoMaliGpu::gpuPanic(), FullO3CPU< O3CPUImpl >::halt(), GenericISA::handleGenericIprRead(), GenericISA::handleGenericIprWrite(), X86KvmCPU::handleIOMiscReg32(), GenericISA::handleIprRead(), GenericISA::handleIprWrite(), BaseKvmCPU::handleKvmExit(), BaseKvmCPU::handleKvmExitException(), BaseKvmCPU::handleKvmExitFailEntry(), BaseKvmCPU::handleKvmExitHypercall(), BaseKvmCPU::handleKvmExitIO(), BaseKvmCPU::handleKvmExitUnknown(), Checker< Impl >::handlePendingInt(), SparcProcess::handleTrap(), KvmDevice::hasAttr(), HexFile::HexFile(), Shader::hostWakeUp(), IdeController::IdeController(), IdeDisk::IdeDisk(), DefaultRename< Impl >::incrFullStat(), IndirectPredictor::IndirectPredictor(), System::init(), X86ISA::IntDevice::init(), PioDevice::init(), DistIface::Sync::init(), DmaDevice::init(), AbstractMemory::init(), TraceCPU::FixedRetryGen::init(), TraceGen::InputStream::init(), TraceCPU::ElasticDataGen::init(), PowerISA::initCPU(), RiscvISA::initCPU(), InvalidateGenerator::initiate(), StaticInst::initiateAcc(), ExecContext::initiateMemRead(), AtomicSimpleCPU::initiateMemRead(), PseudoInst::initParam(), AlphaSystem::initState(), LinuxX86System::initState(), LinuxAlphaSystem::initState(), TraceCPU::FixedRetryGen::InputStream::InputStream(), TraceCPU::ElasticDataGen::InputStream::InputStream(), AlphaISA::TLB::insert(), MemDepUnit< MemDepPred, Impl >::insert(), Trie< Addr, X86ISA::TlbEntry >::insert(), MemDepUnit< MemDepPred, Impl >::insertNonSpec(), installSignalHandler(), AddrRange::intersects(), IdeDisk::intrClear(), IdeDisk::intrPost(), FaultBase::invoke(), UnimpFault::invoke(), SparcISA::SparcFaultBase::invoke(), X86ISA::X86FaultBase::invoke(), GenericISA::M5DebugFault::invoke(), GenericPageTableFault::invoke(), RiscvISA::RiscvFault::invoke(), MipsISA::MipsFaultBase::invoke(), GenericAlignmentFault::invoke(), AlphaISA::ArithmeticFault::invoke(), X86ISA::X86Abort::invoke(), MipsISA::SoftResetFault::invoke(), MipsISA::NonMaskableInterrupt::invoke(), X86ISA::UnimpInstFault::invoke(), AlphaISA::NDtbMissFault::invoke(), ArmISA::ArmFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), X86ISA::InvalidOpcode::invoke(), AlphaISA::ItbPageFault::invoke(), ArmISA::UndefinedInstruction::invoke(), X86ISA::PageFault::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::ArmFault::invoke64(), RiscvISA::RiscvFault::invoke_se(), RiscvISA::UnknownInstFault::invoke_se(), RiscvISA::UnimplementedFault::invoke_se(), RiscvISA::IllegalFrmFault::invoke_se(), BaseKvmCPU::ioctl(), BaseKvmCPU::ioctlRun(), ArmISA::isBigEndian64(), PowerISA::StackTrace::isEntry(), RiscvISA::StackTrace::isEntry(), ArmISA::PMU::isFiltered(), MipsISA::isNan(), MipsISA::isQnan(), MipsISA::isSnan(), AddrRange::isSubset(), X86ISA::GpuTLB::issueTLBLookup(), Kvm::Kvm(), BaseArmKvmCPU::kvmArmVCpuInit(), ArmKvmCPU::kvmArmVCpuInit(), BaseKvmCPU::kvmInterrupt(), BaseKvmCPU::kvmNonMaskableInterrupt(), HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >::LdInstBase(), ListenSocket::listen(), TCPIface::listen(), HexFile::loadSections(), ElfObject::loadSomeSymbols(), UnifiedRenameMap::lookup(), ListenSocket::loopbackOnly(), X86ISA::IntDevice::lowerInterruptPin(), UFSHostDevice::LUNSignal(), m5Main(), GenericISA::m5PageFault(), X86ISA::m5PageFault(), GenericISA::m5Syscall(), HsailISA::Call::MagicPanic(), main(), RubyPortProxy::makeRequest(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), ObjectFile::mapSize(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), X86ISA::X86StaticInst::merge(), Network::MessageSizeType_to_int(), PerfKvmCounter::mmapPerf(), MultiBitSelBloomFilter::MultiBitSelBloomFilter(), RiscvISA::ProcessInfo::name(), PowerISA::ProcessInfo::name(), GenericISA::M5DebugFault::name(), MemTest::noRequest(), MemTest::noResponse(), RawDiskImage::notifyFork(), ArmISA::TableWalker::LongDescriptor::offsetBits(), NoMaliGpu::onInterrupt(), VirtIODeviceBase::onNotify(), Stats::Text::open(), RawDiskImage::open(), CowDiskImage::open(), m5_twin32_t::operator uint32_t(), m5_twin64_t::operator uint64_t(), ArmISA::opModeToEL(), ArmISA::TableWalker::L1Descriptor::paddr(), ArmISA::TableWalker::pageSizeNtoStatBin(), PseudoInst::panicFsOnlyPseudoInst(), T1000::pciToDma(), Malta::pciToDma(), IdeDisk::pciToDma(), Check::performCallback(), PerfKvmCounter::period(), ArmISA::TableWalker::L1Descriptor::pfn(), X86ISA::X86StaticInst::pick(), RiscvISA::ProcessInfo::pid(), PowerISA::ProcessInfo::pid(), Pl111::pixelConverter(), IGbE::RxDescCache::pktComplete(), IGbE::TxDescCache::pktComplete(), PosixKvmTimer::PosixKvmTimer(), PowerISA::Interrupts::post(), RiscvISA::Interrupts::post(), MipsISA::Interrupts::post(), AlphaISA::Interrupts::post(), ArmISA::Interrupts::post(), X86ISA::Interrupts::post(), T1000::postPciInt(), Platform::postPciInt(), Malta::postPciInt(), MaltaCChip::postRTC(), Sinic::Device::prepareIO(), ArmISA::ArmStaticInst::printCondition(), PowerISA::PowerStaticInst::printReg(), X86ISA::X86StaticInst::printSegment(), ArmISA::ArmStaticInst::printShiftOperand(), Intel8254Timer::Counter::CounterEvent::process(), Linux::KernelPanicEvent::process(), DumpStatsPCEvent::process(), PanicPCEvent::process(), LdsState::process(), X86ISA::Decoder::process(), Pl050::processCommand(), X86ISA::PS2Mouse::processData(), X86ISA::PS2Keyboard::processData(), BrigObject::processDirectives(), RiscvISA::ProcessInfo::ProcessInfo(), PowerISA::ProcessInfo::ProcessInfo(), X86ISA::ProcessInfo::ProcessInfo(), AlphaISA::ProcessInfo::ProcessInfo(), ArmISA::ProcessInfo::ProcessInfo(), SparcISA::ISA::processTickCompare(), ProtoInputStream::ProtoInputStream(), ProtoOutputStream::ProtoOutputStream(), PseudoInst::pseudoInst(), ArmISA::purifyTaggedAddr(), X86ISA::IntDevice::raiseInterruptPin(), PciVirtIO::read(), X86ISA::I8237::read(), MmDisk::read(), SimpleDisk::read(), NoMaliGpu::read(), Pl011::read(), AmbaFake::read(), BadDevice::read(), A9SCU::read(), IsaFake::read(), TsunamiPChip::read(), X86ISA::Cmos::read(), X86ISA::I8254::read(), RawDiskImage::read(), TsunamiCChip::read(), MaltaCChip::read(), X86ISA::I82094AA::read(), Uart8250::read(), CopyEngine::CopyEngineChannel::read(), Trace::NativeTrace::read(), AlphaBackdoor::read(), PL031::read(), Sp804::Timer::read(), MaltaIO::read(), TsunamiIO::read(), Terminal::read(), EnergyCtrl::read(), Iob::read(), CowDiskImage::read(), CpuLocalTimer::Timer::read(), VirtIOBlock::read(), Sp804::read(), Pl050::read(), ProtoInputStream::read(), Intel8254Timer::Counter::read(), CpuLocalTimer::read(), MuxingKvmGic::read(), VirtDescriptor::read(), CopyEngine::read(), VGic::read(), X86ISA::Interrupts::read(), VncServer::read(), X86ISA::I8042::read(), Sinic::Device::read(), GenericTimerMem::read(), NSGigE::read(), PerfKvmCounter::read(), Pl111::read(), Pl390::read(), LSQUnit< Impl >::read(), IGbE::read(), VirtIO9PProxy::readAll(), UFSHostDevice::readCallback(), SimpleThread::readCCReg(), SimpleThread::readCCRegFlat(), IdeDisk::readCommand(), IdeController::readConfig(), PciDevice::readConfig(), VirtIODeviceBase::readConfig(), VirtIODeviceBase::readConfigBlob(), IdeDisk::readControl(), Pl390::readCpu(), VGic::readCtrl(), MC146818::readData(), IdeDisk::readDisk(), Pl390::readDistributor(), PseudoInst::readfile(), SparcISA::ISA::readFSReg(), Iob::readIob(), AlphaISA::ISA::readIpr(), Iob::readJBus(), ExecContext::readMem(), TimingSimpleCPU::readMem(), ArmISA::ISA::readMiscReg(), SparcISA::ISA::readMiscReg(), ArmISA::PMU::readMiscRegInt(), SparcISA::ISA::readMiscRegNoEffect(), X86ISA::Interrupts::readReg(), HDLcd::readReg(), BaseO3DynInst< Impl >::readRegOtherThread(), CheckerCPU::readRegOtherThread(), SimpleExecContext::readRegOtherThread(), VGic::readVCpu(), Wavefront::ready(), MessageSlavePort::recvAtomic(), RubyPort::MemSlavePort::recvAtomic(), RubyPort::PioSlavePort::recvAtomic(), MasterPort::recvAtomicSnoop(), CopyEngine::CopyEngineChannel::recvCommand(), RubyPort::MemSlavePort::recvFunctional(), RubyPort::PioSlavePort::recvFunctional(), MasterPort::recvFunctionalSnoop(), X86ISA::IntDevice::recvMessage(), X86ISA::Interrupts::recvMessage(), RubyDirectedTester::CpuPort::recvReqRetry(), RubyTester::CpuPort::recvReqRetry(), System::SystemPort::recvReqRetry(), AtomicSimpleCPU::AtomicCPUPort::recvReqRetry(), CoherentXBar::SnoopRespPort::recvReqRetry(), X86ISA::IntDevice::recvResponse(), MasterPort::recvRetrySnoopResp(), TCPIface::recvTCP(), SimpleTimingPort::recvTimingReq(), RubyPort::MemSlavePort::recvTimingReq(), RubyPort::PioSlavePort::recvTimingReq(), System::SystemPort::recvTimingResp(), AbstractController::recvTimingResp(), AtomicSimpleCPU::AtomicCPUPort::recvTimingResp(), AddrMapper::recvTimingResp(), CoherentXBar::SnoopRespPort::recvTimingResp(), CommMonitor::recvTimingResp(), Cache::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), MasterPort::recvTimingSnoopReq(), SlavePort::recvTimingSnoopResp(), PerfKvmCounter::refresh(), PyEvent::releaseImpl(), PCEvent::remove(), PollQueue::remove(), Trie< Addr, X86ISA::TlbEntry >::remove(), EventQueue::remove(), Event::removeItem(), UnifiedRenameMap::rename(), DefaultRename< Impl >::renameDestRegs(), DefaultRename< Impl >::renameSrcRegs(), BasePixelPump::renderLine(), System::replaceThreadContext(), TsunamiCChip::reqIPI(), MaltaCChip::reqIPI(), DistIface::SyncSwitch::requestCkpt(), DistIface::SyncSwitch::requestExit(), DistIface::SyncSwitch::requestStopSync(), BankedArray::reserve(), Sinic::Device::reset(), IdeDisk::reset(), CopyEngine::CopyEngineChannel::restartStateMachine(), Sinic::Device::rxFilter(), Sinic::Device::rxKick(), NSGigE::rxKick(), SafeRead(), SafeWrite(), PacketQueue::schedSendTiming(), PollQueue::schedule(), DRAMCtrl::Rank::schedulePowerEvent(), UFSHostDevice::SCSIResume(), UFSHostDevice::SCSIStart(), DmaPort::sendDma(), Pl390::sendInt(), ComputeUnit::sendRequest(), VirtIO9PBase::sendRMsg(), TCPIface::sendTCP(), ArmISA::PTE::serialize(), Random::serialize(), Sinic::Device::serialize(), VirtIO9PProxy::serverDataReady(), Packet::set(), AlphaSystem::setAlphaAccess(), KvmDevice::setAttrPtr(), Intel8254Timer::Counter::setBCD(), SimpleThread::setCCReg(), SimpleThread::setCCRegFlat(), IdeDisk::setController(), X86ISA::Interrupts::setCPU(), X86KvmCPU::setCPUID(), X86KvmCPU::setDebugRegisters(), LinuxMipsSystem::setDelayLoop(), IdeController::setDmaComplete(), CheckerCPU::setEA(), SimpleExecContext::setEA(), UnifiedRenameMap::setEntry(), BaseKvmCPU::setFPUState(), VncInput::setFrameBuffer(), SparcISA::ISA::setFSReg(), VirtIODeviceBase::setGuestFeatures(), Stats::InfoAccess::setInfo(), AlphaISA::ISA::setIpr(), KvmVM::setIRQLine(), X86ISA::ISA::setMiscReg(), ArmISA::PMU::setMiscReg(), ArmISA::ISA::setMiscReg(), SparcISA::ISA::setMiscRegNoEffect(), Intel8254Timer::Counter::setMode(), X86KvmCPU::setMSRs(), Stats::Info::setName(), BaseKvmCPU::setOneReg(), EtherInt::setPeer(), X86ISA::Interrupts::setReg(), BaseKvmCPU::setRegisters(), BaseO3DynInst< Impl >::setRegOtherThread(), CheckerCPU::setRegOtherThread(), SimpleExecContext::setRegOtherThread(), Intel8254Timer::Counter::setRW(), BaseKvmCPU::setSignalMask(), BaseKvmCPU::setSpecialRegisters(), setThreadArea32Func(), Intel8254Timer::Counter::CounterEvent::setTo(), KvmVM::setTSSAddress(), PollQueue::setupAsyncIO(), BaseKvmCPU::setupSignalHandler(), KvmVM::setUserMemoryRegion(), X86KvmCPU::setVCpuEvents(), BaseTags::setWayAllocationMax(), X86KvmCPU::setXCRs(), X86KvmCPU::setXSave(), ArmISA::TableWalker::DescriptorBase::shareable(), X86ISA::I82094AA::signalInterrupt(), X86ISA::IntDevice::signalInterrupt(), X86ISA::X86StaticInst::signedPick(), BaseO3DynInst< Impl >::simPalCheck(), RawDiskImage::size(), DefaultRename< Impl >::skidInsert(), PowerISA::skipFunction(), RiscvISA::skipFunction(), X86ISA::skipFunction(), NetDest::smallestElement(), Set::smallestElement(), VirtIO9PSocket::socketDisconnect(), ArmISA::SPAlignmentCheckEnabled(), SparcSystem::SparcSystem(), LSQUnit< Impl >::squash(), PowerISA::StackTrace::StackTrace(), RiscvISA::StackTrace::StackTrace(), PerfKvmCounter::start(), DistIface::SyncEvent::start(), IdeDisk::startCommand(), VirtIO9PDiod::startDiod(), IdeDisk::startDma(), BaseKvmCPU::startup(), LinuxArmSystem::startup(), X86ISA::Walker::WalkerState::stepWalk(), HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >::StInstBase(), PerfKvmCounter::stop(), swap_byte(), BaseO3DynInst< Impl >::syscall(), Minor::ExecContext::syscall(), SimpleExecContext::syscall(), ArmISA::Interrupts::takeInt(), ArmISA::TLB::takeOverFrom(), RiscvISA::ProcessInfo::task(), PowerISA::ProcessInfo::task(), TCPIface::TCPIface(), ArmISA::testPredicate(), ArmISA::TableWalker::DescriptorBase::texcb(), BaseKvmCPU::tick(), GenericTimerMem::timerRead(), GenericTimerMem::timerWrite(), ArmISA::TableWalker::toLookupLevel(), SparcISA::StackTrace::trace(), PowerISA::StackTrace::trace(), RiscvISA::StackTrace::trace(), AlphaISA::StackTrace::trace(), UFSHostDevice::transferDone(), PageTableBase::translate(), GenericTLB::translateAtomic(), RiscvISA::TLB::translateData(), MipsISA::TLB::translateData(), SparcISA::TLB::translateData(), RiscvISA::TLB::translateFunctional(), MipsISA::TLB::translateFunctional(), X86ISA::TLB::translateFunctional(), AlphaISA::TLB::translateFunctional(), PowerISA::TLB::translateFunctional(), SparcISA::TLB::translateFunctional(), RiscvISA::TLB::translateInst(), MipsISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), BaseRemoteGDB::trap(), ElfObject::tryFile(), SETranslatingPortProxy::tryWriteBlob(), SparcISA::TLB::TteRead(), Sinic::Device::txKick(), NSGigE::txKick(), MasterPort::unbind(), ArmISA::PTE::unserialize(), Random::unserialize(), SparcISA::TLB::unserialize(), GenericTimerMem::unserialize(), ObjectFile::updateBias(), VirtDescriptor::updateChain(), PowerISA::Interrupts::updateIntrInfo(), RiscvISA::Interrupts::updateIntrInfo(), ArmISA::ISA::updateRegMap(), IdeDisk::updateState(), ArmKvmCPU::updateTCStateCoProc(), PowerISA::TlbEntry::updateVaddr(), SparcISA::VAddr::VAddr(), ArmISA::VAddr::VAddr(), Checker< Impl >::validateState(), Checker< Impl >::verify(), ArmISA::vfpFpToFixed(), ArmISA::vfpSFixedToFpD(), ArmISA::vfpSFixedToFpS(), ArmISA::vfpUFixedToFpD(), ArmISA::vfpUFixedToFpS(), ArmISA::VldMultOp64::VldMultOp64(), ArmISA::VstMultOp64::VstMultOp64(), ArmISA::vtophys(), SparcISA::vtophys(), X86ISA::vtophys(), AlphaISA::vtophys(), Sequencer::wakeup(), GPUCoalescer::wakeup(), ArmISA::TableWalker::walk(), PciVirtIO::write(), X86ISA::I8237::write(), SimpleDisk::write(), MmDisk::write(), DumbTOD::write(), NoMaliGpu::write(), Pl011::write(), AmbaFake::write(), BadDevice::write(), TsunamiPChip::write(), X86ISA::Cmos::write(), IsaFake::write(), X86ISA::I8254::write(), RawDiskImage::write(), TsunamiCChip::write(), X86ISA::I82094AA::write(), MaltaCChip::write(), Uart8250::write(), CopyEngine::CopyEngineChannel::write(), AlphaBackdoor::write(), Sp804::Timer::write(), MaltaIO::write(), PL031::write(), TsunamiIO::write(), Terminal::write(), EnergyCtrl::write(), Iob::write(), CowDiskImage::write(), CpuLocalTimer::Timer::write(), I2CBus::write(), VirtIOBlock::write(), Sp804::write(), CpuLocalTimer::write(), MuxingKvmGic::write(), CopyEngine::write(), VGic::write(), VirtDescriptor::write(), X86ISA::Interrupts::write(), VncServer::write(), X86ISA::I8042::write(), Sinic::Device::write(), GenericTimerMem::write(), NSGigE::write(), Pl111::write(), Pl390::write(), IGbE::write(), UFSHostDevice::write(), VirtIO9PProxy::writeAll(), IdeDisk::writeCommand(), IdeController::writeConfig(), PciDevice::writeConfig(), NSGigE::writeConfig(), IGbE::writeConfig(), VirtIODeviceBase::writeConfig(), VirtIODeviceBase::writeConfigBlob(), Intel8254Timer::writeControl(), IdeDisk::writeControl(), Pl390::writeCpu(), VGic::writeCtrl(), MC146818::writeData(), IdeDisk::writeDisk(), Pl390::writeDistributor(), PseudoInst::writefile(), Iob::writeIob(), Iob::writeJBus(), IGbE::RxDescCache::writePacket(), HDLcd::writeReg(), VGic::writeVCpu(), X86KvmCPU::X86KvmCPU(), RiscvISA::StackTrace::~StackTrace(), and PowerISA::StackTrace::~StackTrace().

#define panic_if (   cond,
  ... 
)
Value:
do { \
if ((cond)) { \
panic("panic condition " # cond " occurred: %s", \
csprintf(__VA_ARGS__)); \
} \
} while (0)
#define panic(...)
Definition: misc.hh:153
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
if(it_gpu==gpuTypeMap.end())
Definition: gpu_nomali.cc:75
cond
Definition: types.hh:63

Conditional panic macro that checks the supplied condition and only panics if the condition is true and allows the programmer to specify diagnostic printout.

Useful to replace if + panic, or if + print + assert, etc.

Parameters
condCondition that is checked; if true -> panic
...Printf-based format string with arguments, extends printout.

Definition at line 174 of file misc.hh.

#define warn (   ...)    base_message(::Logger::get(::Logger::WARN), __VA_ARGS__)

Definition at line 219 of file misc.hh.

Referenced by __get_hostname(), MemChecker::WriteCluster::abortWrite(), ListenSocket::accept(), TCPIface::accept(), VncServer::accept(), DtbObject::addBootCmdLine(), System::allocPhysPages(), ArmSystem::ArmSystem(), VncServer::checkProtocolVersion(), VncServer::checkSecurity(), checkSeg(), TsunamiCChip::clearIPI(), DVFSHandler::clkPeriodAtPerfLevel(), MemChecker::ByteTracker::completeRead(), MemTest::completeRequest(), MemChecker::WriteCluster::completeWrite(), TCPIface::connect(), HDLcd::createDmaEngine(), KvmVM::createIRQChip(), GenericTimerMem::ctrlRead(), GenericTimerMem::ctrlWrite(), VncServer::data(), ArmKvmCPU::decodeCoProcReg(), ArmISA::decodeCP14Reg(), GenericTLB::demapPage(), PerfKvmCounter::detach(), NSGigE::devIntrPost(), DistEtherLink::DistEtherLink(), Pl111::dmaDone(), X86ISA::doCpuid(), doGzipLoad(), BaseKvmCPU::doMMIOAccess(), DRAMCtrl::DRAMCtrl(), DramGen::DramGen(), CheckerCPU::dumpAndExit(), dumpDmesgEntry(), WarnUnimplemented::execute(), Minor::Execute::Execute(), TraceGen::exit(), faccessatFunc(), fallocateFunc(), FaultModel::fault_prob(), FaultModel::fault_vector(), fcntl64Func(), fcntlFunc(), DefaultFetch< Impl >::finishTranslation(), ArmISA::ISA::flattenMiscIndex(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), fstatat64Func(), futexFunc(), Iob::generateIpi(), X86KvmCPU::getMsrIntersection(), getrlimitFunc(), getrusageFunc(), PowerModel::getStaticPower(), MathExprPowerModel::getStatValue(), MipsISA::haltThread(), MC146818::handleEvent(), BaseKvmCPU::handleKvmExitIRQWindowOpen(), MipsISA::handleLockedWrite(), RiscvISA::handleLockedWrite(), AlphaISA::handleLockedWrite(), ArmISA::handleLockedWrite(), SparcProcess::handleTrap(), ignoreFunc(), HsailCode::init(), CoherentXBar::init(), initSignals(), FreebsdArmSystem::initState(), LinuxArmSystem::initState(), Minor::LSQ::StoreBuffer::insert(), RiscvISA::TLB::insertAt(), MipsISA::TLB::insertAt(), PowerISA::TLB::insertAt(), GenericISA::M5DebugFault::invoke(), ioctlFunc(), Ps2::keySymToPs2(), EcoffObject::loadGlobalSymbols(), EcoffObject::loadLocalSymbols(), main(), MaltaCChip::MaltaCChip(), mmapImpl(), mremapFunc(), BaseKvmCPU::notifyFork(), KvmVM::notifyFork(), VirtIOBlock::RequestQueue::onNotifyDescriptor(), openImpl(), OperatingSystem::openSpecialFile(), Linux::openSpecialFile(), optParamIn(), AddrOperandBase::parseAddr(), TrafficGen::parseConfig(), DVFSHandler::perfLevel(), PhysRegFile::PhysRegFile(), power(), Linux::DmesgDumpEvent::process(), BaseRemoteGDB::InputEvent::process(), X86ISA::PS2Mouse::processData(), BrigObject::processDirectives(), PseudoInst::pseudoInst(), EtherSwitch::Interface::PortFifo::push(), Minor::Queue< Minor::ForwardInstData, ReportTraitsAdaptor< Minor::ForwardInstData >, BubbleTraitsAdaptor< Minor::ForwardInstData > >::push(), ClockedObject::pwrState(), HDLcd::pxlFrameDone(), DistIface::rankParam(), IsaFake::read(), VirtIOBlock::read(), Pl050::read(), RealViewCtrl::read(), RealViewTemperatureSensor::read(), readlinkatFunc(), CheckerCPU::readMem(), ArmISA::DummyISADevice::readMiscReg(), ArmISA::ISA::readMiscReg(), GenericTimer::readMiscReg(), ArmISA::PMU::readMiscRegInt(), RiscvISA::ISA::readMiscRegNoEffect(), X86ISA::I82094AA::readReg(), CacheMemory::recordRequestType(), MemCheckerMonitor::recvTimingResp(), Cache::recvTimingSnoopReq(), renameatFunc(), BasePixelPump::renderPixels(), TsunamiCChip::reqIPI(), DistIface::SyncNode::requestCkpt(), DistIface::SyncNode::requestExit(), X86ISA::I8259::requestInterrupt(), Minor::Queue< Minor::ForwardInstData, ReportTraitsAdaptor< Minor::ForwardInstData >, BubbleTraitsAdaptor< Minor::ForwardInstData > >::reserve(), MipsISA::restoreThread(), Process::revokeThreadContext(), schedBreak(), Process::serialize(), VirtIO9PProxy::serialize(), Cache::serialize(), Trace::setDebugLogger(), VncServer::setEncodings(), RiscvISA::ISA::setMiscReg(), ArmISA::DummyISADevice::setMiscReg(), ArmISA::PMU::setMiscReg(), ArmISA::ISA::setMiscReg(), GenericTimer::setMiscReg(), VncServer::setPixelFormat(), X86ISA::Interrupts::setReg(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), setuidFunc(), DistIface::sizeParam(), DefaultRename< Impl >::skidInsert(), VoltageDomain::startup(), EnergyCtrl::startup(), statfsFunc(), GenericTimerMem::timerRead(), GenericTimerMem::timerWrite(), PowerISA::TlbEntry::TlbEntry(), RiscvISA::TlbEntry::TlbEntry(), MipsISA::TlbEntry::TlbEntry(), AlphaISA::TlbEntry::TlbEntry(), ArmISA::TlbEntry::TlbEntry(), BaseRemoteGDB::trap(), ElfObject::tryFile(), UFSHostDevice::UFSHostDevice(), unlinkatFunc(), Process::unserialize(), EtherLink::Link::unserialize(), DVFSHandler::unserialize(), GenericTimer::unserialize(), VirtIO9PProxy::unserialize(), Globals::unserialize(), TrafficGen::update(), ArmISA::PMU::updateCounter(), ArmKvmCPU::updateKvmStateCoProc(), ArmKvmCPU::updateKvmStateMisc(), ArmKvmCPU::updateKvmStateVFP(), ArmKvmCPU::updateTCStateCoProc(), ArmKvmCPU::updateTCStateMisc(), ArmKvmCPU::updateTCStateVFP(), Checker< Impl >::validateExecution(), Checker< Impl >::validateInst(), DVFSHandler::validDomainID(), Checker< Impl >::verify(), DVFSHandler::voltageAtPerfLevel(), PciVirtIO::write(), X86ISA::Speaker::write(), A9SCU::write(), IsaFake::write(), VirtIOBlock::write(), Pl050::write(), RealViewCtrl::write(), X86ISA::I8042::write(), IGbE::write(), Pl390::writeCpu(), Pl390::writeDistributor(), CheckerCPU::writeMem(), writeOutString(), X86ISA::I82094AA::writeReg(), X86KvmCPU::X86KvmCPU(), and MipsISA::yieldThread().

#define warn_if (   cond,
  ... 
)
Value:
do { \
if ((cond)) \
warn(__VA_ARGS__); \
} while (0)
#define warn(...)
Definition: misc.hh:219
if(it_gpu==gpuTypeMap.end())
Definition: gpu_nomali.cc:75
cond
Definition: types.hh:63

Conditional warning macro that checks the supplied condition and only prints a warning if the condition is true.

Useful to replace if + warn.

Parameters
condCondition that is checked; if true -> warn
...Printf-based format string with arguments, extends printout.

Definition at line 241 of file misc.hh.

Referenced by ElfObject::ElfObject(), exitSimLoop(), PowerModel::getDynamicPower(), ArmISA::TableWalker::memAttrsAArch64(), and DrainManager::resume().

#define warn_once (   ...)    base_message_once(::Logger::get(::Logger::WARN), __VA_ARGS__)

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