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malta.cc
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1 /*
2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * Authors: Ali Saidi
29  * Rick Strong
30  */
31 
36 #include "dev/mips/malta.hh"
37 
38 #include <deque>
39 #include <string>
40 #include <vector>
41 
42 #include "config/the_isa.hh"
43 #include "cpu/intr_control.hh"
44 #include "debug/Malta.hh"
45 #include "dev/mips/malta_cchip.hh"
46 #include "dev/mips/malta_io.hh"
47 #include "dev/terminal.hh"
48 #include "params/Malta.hh"
49 #include "sim/system.hh"
50 
51 using namespace std;
52 using namespace TheISA;
53 
55  : Platform(p), system(p->system)
56 {
57  for (int i = 0; i < Malta::Max_CPUs; i++)
58  intr_sum_type[i] = 0;
59 }
60 
61 void
63 {
64  //see {Linux-src}/arch/mips/mips-boards/sim/sim_setup.c
65  io->postIntr(0x10/*HW4*/);
66 }
67 
68 void
70 {
71  //FIXME: implement clearConsoleInt()
72  io->clearIntr(0x10/*HW4*/);
73 }
74 
75 void
77 {
78  panic("Malta::postPciInt() has not been implemented.");
79 }
80 
81 void
83 {
84  panic("Malta::clearPciInt() has not been implemented.");
85 }
86 
87 Addr
88 Malta::pciToDma(Addr pciAddr) const
89 {
90  panic("Malta::pciToDma() has not been implemented.");
91 }
92 
93 void
95 {
97 }
98 
99 void
101 {
103 }
104 
105 Malta *
106 MaltaParams::create()
107 {
108  return new Malta(this);
109 }
Emulation of the Malta CChip CSRs.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: malta.cc:100
Bitfield< 7 > i
Definition: miscregs.hh:1378
#define panic(...)
Definition: misc.hh:153
virtual Addr pciToDma(Addr pciAddr) const
Definition: malta.cc:88
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: malta.cc:94
system
Definition: isa.cc:226
void postIntr(uint8_t interrupt)
Post an Interrupt to the CPU.
Definition: malta_io.cc:101
void clearIntr(uint8_t interrupt)
Clear an Interrupt to the CPU.
Definition: malta_io.cc:108
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
Definition: malta.cc:82
static const int Max_CPUs
Max number of CPUs in a Malta.
Definition: malta.hh:60
#define SERIALIZE_ARRAY(member, size)
Definition: serialize.hh:158
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
Definition: malta.cc:76
MaltaIO * io
Pointer to the MaltaIO device which has the RTC.
Definition: malta.hh:66
Top level class for Malta Chipset emulation.
Definition: malta.hh:56
#define UNSERIALIZE_ARRAY(member, size)
Definition: serialize.hh:161
std::ostream CheckpointOut
Definition: serialize.hh:67
void clearConsoleInt() override
Clear a posted CPU interrupt (id=55)
Definition: malta.cc:69
Malta(const Params *p)
Definition: malta.cc:54
MaltaParams Params
Constructor for the Malta Class.
Definition: malta.hh:84
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
Definition: malta.cc:62
Bitfield< 0 > p
int intr_sum_type[Malta::Max_CPUs]
Definition: malta.hh:74
Malta I/O Space mapping including RTC/timer interrupts.
Declaration of top level class for the Malta chipset.

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