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pl111.cc
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1 /*
2  * Copyright (c) 2010-2012, 2015 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Authors: William Wang
38  * Ali Saidi
39  */
40 
41 #include "dev/arm/pl111.hh"
42 
43 #include "base/output.hh"
44 #include "base/trace.hh"
45 #include "base/vnc/vncinput.hh"
46 #include "debug/PL111.hh"
47 #include "debug/Uart.hh"
48 #include "dev/arm/amba_device.hh"
49 #include "dev/arm/base_gic.hh"
50 #include "mem/packet.hh"
51 #include "mem/packet_access.hh"
52 #include "sim/system.hh"
53 
54 // clang complains about std::set being overloaded with Packet::set if
55 // we open up the entire namespace std
56 using std::vector;
57 
58 // initialize clcd registers
60  : AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
61  lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
62  lcdRis(0), lcdMis(0),
63  clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
64  clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
65  clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
66  pixelClock(p->pixel_clock),
67  converter(PixelConverter::rgba8888_le), fb(LcdMaxWidth, LcdMaxHeight),
68  vnc(p->vnc), bmp(&fb), pic(NULL),
69  width(LcdMaxWidth), height(LcdMaxHeight),
70  bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
71  waterMark(0), dmaPendingNum(0), readEvent(this), fillFifoEvent(this),
72  dmaDoneEventAll(maxOutstandingDma, this),
73  dmaDoneEventFree(maxOutstandingDma),
74  intEvent(this), enableCapture(p->enable_capture)
75 {
76  pioSize = 0xFFFF;
77 
78  dmaBuffer = new uint8_t[buffer_size];
79 
80  memset(lcdPalette, 0, sizeof(lcdPalette));
81  memset(cursorImage, 0, sizeof(cursorImage));
82  memset(dmaBuffer, 0, buffer_size);
83 
84  for (int i = 0; i < maxOutstandingDma; ++i)
86 
87  if (vnc)
89 }
90 
92 {
93  delete[] dmaBuffer;
94 }
95 
96 // read registers and frame buffer
97 Tick
99 {
100  // use a temporary data since the LCD registers are read/written with
101  // different size operations
102 
103  uint32_t data = 0;
104 
105  assert(pkt->getAddr() >= pioAddr &&
106  pkt->getAddr() < pioAddr + pioSize);
107 
108  Addr daddr = pkt->getAddr() - pioAddr;
109 
110  DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
111 
112  switch (daddr) {
113  case LcdTiming0:
114  data = lcdTiming0;
115  break;
116  case LcdTiming1:
117  data = lcdTiming1;
118  break;
119  case LcdTiming2:
120  data = lcdTiming2;
121  break;
122  case LcdTiming3:
123  data = lcdTiming3;
124  break;
125  case LcdUpBase:
126  data = lcdUpbase;
127  break;
128  case LcdLpBase:
129  data = lcdLpbase;
130  break;
131  case LcdControl:
132  data = lcdControl;
133  break;
134  case LcdImsc:
135  data = lcdImsc;
136  break;
137  case LcdRis:
138  data = lcdRis;
139  break;
140  case LcdMis:
141  data = lcdMis;
142  break;
143  case LcdIcr:
144  panic("LCD register at offset %#x is Write-Only\n", daddr);
145  break;
146  case LcdUpCurr:
147  data = curAddr;
148  break;
149  case LcdLpCurr:
150  data = curAddr;
151  break;
152  case ClcdCrsrCtrl:
153  data = clcdCrsrCtrl;
154  break;
155  case ClcdCrsrConfig:
156  data = clcdCrsrConfig;
157  break;
158  case ClcdCrsrPalette0:
159  data = clcdCrsrPalette0;
160  break;
161  case ClcdCrsrPalette1:
162  data = clcdCrsrPalette1;
163  break;
164  case ClcdCrsrXY:
165  data = clcdCrsrXY;
166  break;
167  case ClcdCrsrClip:
168  data = clcdCrsrClip;
169  break;
170  case ClcdCrsrImsc:
171  data = clcdCrsrImsc;
172  break;
173  case ClcdCrsrIcr:
174  panic("CLCD register at offset %#x is Write-Only\n", daddr);
175  break;
176  case ClcdCrsrRis:
177  data = clcdCrsrRis;
178  break;
179  case ClcdCrsrMis:
180  data = clcdCrsrMis;
181  break;
182  default:
183  if (readId(pkt, AMBA_ID, pioAddr)) {
184  // Hack for variable size accesses
185  data = pkt->get<uint32_t>();
186  break;
187  } else if (daddr >= CrsrImage && daddr <= 0xBFC) {
188  // CURSOR IMAGE
189  int index;
190  index = (daddr - CrsrImage) >> 2;
191  data= cursorImage[index];
192  break;
193  } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
194  // LCD Palette
195  int index;
196  index = (daddr - LcdPalette) >> 2;
197  data = lcdPalette[index];
198  break;
199  } else {
200  panic("Tried to read CLCD register at offset %#x that "
201  "doesn't exist\n", daddr);
202  break;
203  }
204  }
205 
206  switch(pkt->getSize()) {
207  case 1:
208  pkt->set<uint8_t>(data);
209  break;
210  case 2:
211  pkt->set<uint16_t>(data);
212  break;
213  case 4:
214  pkt->set<uint32_t>(data);
215  break;
216  default:
217  panic("CLCD controller read size too big?\n");
218  break;
219  }
220 
221  pkt->makeAtomicResponse();
222  return pioDelay;
223 }
224 
225 // write registers and frame buffer
226 Tick
228 {
229  // use a temporary data since the LCD registers are read/written with
230  // different size operations
231  //
232  uint32_t data = 0;
233 
234  switch(pkt->getSize()) {
235  case 1:
236  data = pkt->get<uint8_t>();
237  break;
238  case 2:
239  data = pkt->get<uint16_t>();
240  break;
241  case 4:
242  data = pkt->get<uint32_t>();
243  break;
244  default:
245  panic("PL111 CLCD controller write size too big?\n");
246  break;
247  }
248 
249  assert(pkt->getAddr() >= pioAddr &&
250  pkt->getAddr() < pioAddr + pioSize);
251 
252  Addr daddr = pkt->getAddr() - pioAddr;
253 
254  DPRINTF(PL111, " write register %#x value %#x size=%d\n", daddr,
255  pkt->get<uint8_t>(), pkt->getSize());
256 
257  switch (daddr) {
258  case LcdTiming0:
259  lcdTiming0 = data;
260  // width = 16 * (PPL+1)
261  width = (lcdTiming0.ppl + 1) << 4;
262  break;
263  case LcdTiming1:
264  lcdTiming1 = data;
265  // height = LPP + 1
266  height = (lcdTiming1.lpp) + 1;
267  break;
268  case LcdTiming2:
269  lcdTiming2 = data;
270  break;
271  case LcdTiming3:
272  lcdTiming3 = data;
273  break;
274  case LcdUpBase:
275  lcdUpbase = data;
276  DPRINTF(PL111, "####### Upper panel base set to: %#x #######\n", lcdUpbase);
277  break;
278  case LcdLpBase:
279  warn_once("LCD dual screen mode not supported\n");
280  lcdLpbase = data;
281  DPRINTF(PL111, "###### Lower panel base set to: %#x #######\n", lcdLpbase);
282  break;
283  case LcdControl:
284  int old_lcdpwr;
285  old_lcdpwr = lcdControl.lcdpwr;
286  lcdControl = data;
287 
288  DPRINTF(PL111, "LCD power is:%d\n", lcdControl.lcdpwr);
289 
290  // LCD power enable
291  if (lcdControl.lcdpwr && !old_lcdpwr) {
293  DPRINTF(PL111, " lcd size: height %d width %d\n", height, width);
294  waterMark = lcdControl.watermark ? 8 : 4;
295  startDma();
296  }
297  break;
298  case LcdImsc:
299  lcdImsc = data;
300  if (lcdImsc.vcomp)
301  panic("Interrupting on vcomp not supported\n");
302 
303  lcdMis = lcdImsc & lcdRis;
304 
305  if (!lcdMis)
306  gic->clearInt(intNum);
307 
308  break;
309  case LcdRis:
310  panic("LCD register at offset %#x is Read-Only\n", daddr);
311  break;
312  case LcdMis:
313  panic("LCD register at offset %#x is Read-Only\n", daddr);
314  break;
315  case LcdIcr:
316  lcdRis = lcdRis & ~data;
317  lcdMis = lcdImsc & lcdRis;
318 
319  if (!lcdMis)
320  gic->clearInt(intNum);
321 
322  break;
323  case LcdUpCurr:
324  panic("LCD register at offset %#x is Read-Only\n", daddr);
325  break;
326  case LcdLpCurr:
327  panic("LCD register at offset %#x is Read-Only\n", daddr);
328  break;
329  case ClcdCrsrCtrl:
330  clcdCrsrCtrl = data;
331  break;
332  case ClcdCrsrConfig:
334  break;
335  case ClcdCrsrPalette0:
337  break;
338  case ClcdCrsrPalette1:
340  break;
341  case ClcdCrsrXY:
342  clcdCrsrXY = data;
343  break;
344  case ClcdCrsrClip:
345  clcdCrsrClip = data;
346  break;
347  case ClcdCrsrImsc:
348  clcdCrsrImsc = data;
349  break;
350  case ClcdCrsrIcr:
351  clcdCrsrIcr = data;
352  break;
353  case ClcdCrsrRis:
354  panic("CLCD register at offset %#x is Read-Only\n", daddr);
355  break;
356  case ClcdCrsrMis:
357  panic("CLCD register at offset %#x is Read-Only\n", daddr);
358  break;
359  default:
360  if (daddr >= CrsrImage && daddr <= 0xBFC) {
361  // CURSOR IMAGE
362  int index;
363  index = (daddr - CrsrImage) >> 2;
365  break;
366  } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
367  // LCD Palette
368  int index;
369  index = (daddr - LcdPalette) >> 2;
370  lcdPalette[index] = data;
371  break;
372  } else {
373  panic("Tried to write PL111 register at offset %#x that "
374  "doesn't exist\n", daddr);
375  break;
376  }
377  }
378 
379  pkt->makeAtomicResponse();
380  return pioDelay;
381 }
382 
385 {
386  unsigned rw, gw, bw;
387  unsigned offsets[3];
388 
389  switch (lcdControl.lcdbpp) {
390  case bpp24:
391  rw = gw = bw = 8;
392  offsets[0] = 0;
393  offsets[1] = 8;
394  offsets[2] = 16;
395  break;
396 
397  case bpp16m565:
398  rw = 5;
399  gw = 6;
400  bw = 5;
401  offsets[0] = 0;
402  offsets[1] = 5;
403  offsets[2] = 11;
404  break;
405 
406  default:
407  panic("Unimplemented video mode\n");
408  }
409 
410  if (lcdControl.bgr) {
411  return PixelConverter(
413  offsets[2], offsets[1], offsets[0],
414  rw, gw, bw,
416  } else {
417  return PixelConverter(
419  offsets[0], offsets[1], offsets[2],
420  rw, gw, bw,
422  }
423 }
424 
425 void
427 {
428  if (lcdControl.lcdbpp == bpp24) {
429  bytesPerPixel = 4;
430  } else if (lcdControl.lcdbpp == bpp16m565) {
431  bytesPerPixel = 2;
432  }
433 
434  fb.resize(width, height);
436 
437  // Workaround configuration bugs where multiple display
438  // controllers are attached to the same VNC server by reattaching
439  // enabled devices. This isn't ideal, but works as long as only
440  // one display controller is active at a time.
441  if (lcdControl.lcdpwr && vnc)
442  vnc->setFrameBuffer(&fb);
443 }
444 
445 void
447 {
448  if (dmaPendingNum != 0 || readEvent.scheduled())
449  return;
450  readFramebuffer();
451 }
452 
453 void
455 {
456  // initialization for dma read from frame buffer to dma buffer
457  uint32_t length = height * width;
458  if (startAddr != lcdUpbase)
460 
461  // Updating base address, interrupt if we're supposed to
462  lcdRis.baseaddr = 1;
463  if (!intEvent.scheduled())
465 
466  curAddr = 0;
467  startTime = curTick();
468 
469  maxAddr = static_cast<Addr>(length * bytesPerPixel);
470 
471  DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
472 
473  fillFifo();
474 }
475 
476 void
478 {
479  while ((dmaPendingNum < maxOutstandingDma) && (maxAddr >= curAddr + dmaSize )) {
480  // concurrent dma reads need different dma done events
481  // due to assertion in scheduling state
482  ++dmaPendingNum;
483 
484  assert(!dmaDoneEventFree.empty());
486  dmaDoneEventFree.pop_back();
487  assert(!event->scheduled());
488 
489  // We use a uncachable request here because the requests from the CPU
490  // will be uncacheable as well. If we have uncacheable and cacheable
491  // requests in the memory system for the same address it won't be
492  // pleased
496  curAddr += dmaSize;
497  }
498 }
499 
500 void
502 {
503  DPRINTF(PL111, "DMA Done\n");
504 
505  Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
506 
507  --dmaPendingNum;
508 
509  if (maxAddr == curAddr && !dmaPendingNum) {
510  if ((curTick() - startTime) > maxFrameTime) {
511  warn("CLCD controller buffer underrun, took %d ticks when should"
512  " have taken %d\n", curTick() - startTime, maxFrameTime);
513  lcdRis.underflow = 1;
514  if (!intEvent.scheduled())
516  }
517 
518  assert(!readEvent.scheduled());
520  if (vnc)
521  vnc->setDirty();
522 
523  if (enableCapture) {
524  DPRINTF(PL111, "-- write out frame buffer into bmp\n");
525 
526  if (!pic)
527  pic = simout.create(csprintf("%s.framebuffer.bmp", sys->name()),
528  true);
529 
530  assert(pic);
531  pic->stream()->seekp(0);
532  bmp.write(*pic->stream());
533  }
534 
535  // schedule the next read based on when the last frame started
536  // and the desired fps (i.e. maxFrameTime), we turn the
537  // argument into a relative number of cycles in the future
538  if (lcdControl.lcden)
540  curTick() +
541  maxFrameTime)));
542  }
543 
545  return;
546 
547  if (!fillFifoEvent.scheduled())
549 }
550 
551 void
553 {
554  DPRINTF(PL111, "Serializing ARM PL111\n");
555 
556  uint32_t lcdTiming0_serial = lcdTiming0;
557  SERIALIZE_SCALAR(lcdTiming0_serial);
558 
559  uint32_t lcdTiming1_serial = lcdTiming1;
560  SERIALIZE_SCALAR(lcdTiming1_serial);
561 
562  uint32_t lcdTiming2_serial = lcdTiming2;
563  SERIALIZE_SCALAR(lcdTiming2_serial);
564 
565  uint32_t lcdTiming3_serial = lcdTiming3;
566  SERIALIZE_SCALAR(lcdTiming3_serial);
567 
570 
571  uint32_t lcdControl_serial = lcdControl;
572  SERIALIZE_SCALAR(lcdControl_serial);
573 
574  uint8_t lcdImsc_serial = lcdImsc;
575  SERIALIZE_SCALAR(lcdImsc_serial);
576 
577  uint8_t lcdRis_serial = lcdRis;
578  SERIALIZE_SCALAR(lcdRis_serial);
579 
580  uint8_t lcdMis_serial = lcdMis;
581  SERIALIZE_SCALAR(lcdMis_serial);
582 
585 
592 
593  uint8_t clcdCrsrImsc_serial = clcdCrsrImsc;
594  SERIALIZE_SCALAR(clcdCrsrImsc_serial);
595 
596  uint8_t clcdCrsrIcr_serial = clcdCrsrIcr;
597  SERIALIZE_SCALAR(clcdCrsrIcr_serial);
598 
599  uint8_t clcdCrsrRis_serial = clcdCrsrRis;
600  SERIALIZE_SCALAR(clcdCrsrRis_serial);
601 
602  uint8_t clcdCrsrMis_serial = clcdCrsrMis;
603  SERIALIZE_SCALAR(clcdCrsrMis_serial);
604 
608 
616 
617  Tick int_event_time = 0;
618  Tick read_event_time = 0;
619  Tick fill_fifo_event_time = 0;
620 
621  if (readEvent.scheduled())
622  read_event_time = readEvent.when();
623  if (fillFifoEvent.scheduled())
624  fill_fifo_event_time = fillFifoEvent.when();
625  if (intEvent.scheduled())
626  int_event_time = intEvent.when();
627 
628  SERIALIZE_SCALAR(read_event_time);
629  SERIALIZE_SCALAR(fill_fifo_event_time);
630  SERIALIZE_SCALAR(int_event_time);
631 
632  vector<Tick> dma_done_event_tick;
633  dma_done_event_tick.resize(maxOutstandingDma);
634  for (int x = 0; x < maxOutstandingDma; x++) {
635  dma_done_event_tick[x] = dmaDoneEventAll[x].scheduled() ?
636  dmaDoneEventAll[x].when() : 0;
637  }
638  SERIALIZE_CONTAINER(dma_done_event_tick);
639 }
640 
641 void
643 {
644  DPRINTF(PL111, "Unserializing ARM PL111\n");
645 
646  uint32_t lcdTiming0_serial;
647  UNSERIALIZE_SCALAR(lcdTiming0_serial);
648  lcdTiming0 = lcdTiming0_serial;
649 
650  uint32_t lcdTiming1_serial;
651  UNSERIALIZE_SCALAR(lcdTiming1_serial);
652  lcdTiming1 = lcdTiming1_serial;
653 
654  uint32_t lcdTiming2_serial;
655  UNSERIALIZE_SCALAR(lcdTiming2_serial);
656  lcdTiming2 = lcdTiming2_serial;
657 
658  uint32_t lcdTiming3_serial;
659  UNSERIALIZE_SCALAR(lcdTiming3_serial);
660  lcdTiming3 = lcdTiming3_serial;
661 
664 
665  uint32_t lcdControl_serial;
666  UNSERIALIZE_SCALAR(lcdControl_serial);
667  lcdControl = lcdControl_serial;
668 
669  uint8_t lcdImsc_serial;
670  UNSERIALIZE_SCALAR(lcdImsc_serial);
671  lcdImsc = lcdImsc_serial;
672 
673  uint8_t lcdRis_serial;
674  UNSERIALIZE_SCALAR(lcdRis_serial);
675  lcdRis = lcdRis_serial;
676 
677  uint8_t lcdMis_serial;
678  UNSERIALIZE_SCALAR(lcdMis_serial);
679  lcdMis = lcdMis_serial;
680 
683 
690 
691  uint8_t clcdCrsrImsc_serial;
692  UNSERIALIZE_SCALAR(clcdCrsrImsc_serial);
693  clcdCrsrImsc = clcdCrsrImsc_serial;
694 
695  uint8_t clcdCrsrIcr_serial;
696  UNSERIALIZE_SCALAR(clcdCrsrIcr_serial);
697  clcdCrsrIcr = clcdCrsrIcr_serial;
698 
699  uint8_t clcdCrsrRis_serial;
700  UNSERIALIZE_SCALAR(clcdCrsrRis_serial);
701  clcdCrsrRis = clcdCrsrRis_serial;
702 
703  uint8_t clcdCrsrMis_serial;
704  UNSERIALIZE_SCALAR(clcdCrsrMis_serial);
705  clcdCrsrMis = clcdCrsrMis_serial;
706 
710 
718 
719  Tick int_event_time = 0;
720  Tick read_event_time = 0;
721  Tick fill_fifo_event_time = 0;
722 
723  UNSERIALIZE_SCALAR(read_event_time);
724  UNSERIALIZE_SCALAR(fill_fifo_event_time);
725  UNSERIALIZE_SCALAR(int_event_time);
726 
727  if (int_event_time)
728  schedule(intEvent, int_event_time);
729  if (read_event_time)
730  schedule(readEvent, read_event_time);
731  if (fill_fifo_event_time)
732  schedule(fillFifoEvent, fill_fifo_event_time);
733 
734  vector<Tick> dma_done_event_tick;
735  dma_done_event_tick.resize(maxOutstandingDma);
736  UNSERIALIZE_CONTAINER(dma_done_event_tick);
737  dmaDoneEventFree.clear();
738  for (int x = 0; x < maxOutstandingDma; x++) {
739  if (dma_done_event_tick[x])
740  schedule(dmaDoneEventAll[x], dma_done_event_tick[x]);
741  else
742  dmaDoneEventFree.push_back(&dmaDoneEventAll[x]);
743  }
744  assert(maxOutstandingDma - dmaDoneEventFree.size() == dmaPendingNum);
745 
746  if (lcdControl.lcdpwr) {
749  if (vnc)
750  vnc->setDirty();
751  }
752 }
753 
754 void
756 {
757  DPRINTF(PL111, "Generate Interrupt: lcdImsc=0x%x lcdRis=0x%x lcdMis=0x%x\n",
758  (uint32_t)lcdImsc, (uint32_t)lcdRis, (uint32_t)lcdMis);
759  lcdMis = lcdImsc & lcdRis;
760 
761  if (lcdMis.underflow || lcdMis.baseaddr || lcdMis.vcomp || lcdMis.ahbmaster) {
762  gic->sendInt(intNum);
763  DPRINTF(PL111, " -- Generated\n");
764  }
765 }
766 
769 {
770  AddrRangeList ranges;
771  ranges.push_back(RangeSize(pioAddr, pioSize));
772  return ranges;
773 }
774 
775 Pl111 *
776 Pl111Params::create()
777 {
778  return new Pl111(this);
779 }
780 
781 
#define DPRINTF(x,...)
Definition: trace.hh:212
static const int LcdMis
Definition: pl111.hh:75
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:398
uint32_t clcdCrsrPalette1
Definition: pl111.hh:239
static const int LcdTiming2
Definition: pl111.hh:68
OutputDirectory simout
Definition: output.cc:65
static const int dmaSize
Definition: pl111.hh:98
static const int CrsrImage
Definition: pl111.hh:80
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:64
void set(T v, ByteOrder endian)
Set the value in the data pointer to v using the specified endianness.
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
Definition: pl111.hh:254
Bitfield< 30, 0 > index
uint32_t clcdCrsrCtrl
Cursor control register.
Definition: pl111.hh:232
static const int LcdIcr
Definition: pl111.hh:76
static const int LcdLpBase
Definition: pl111.hh:71
virtual void clearInt(uint32_t num)=0
Clear an interrupt from a device that is connected to the GIC.
InterruptReg lcdMis
Masked interrupt status register.
Definition: pl111.hh:221
VncInput * vnc
VNC server.
Definition: pl111.hh:266
Bitfield< 7 > i
Definition: miscregs.hh:1378
AmbaDmaDeviceParams Params
Definition: amba_device.hh:111
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition: output.cc:206
#define panic(...)
Definition: misc.hh:153
void resize(unsigned width, unsigned height)
Resize the frame buffer.
Definition: framebuffer.cc:143
Cycles ticksToCycles(Tick t) const
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Definition: pl111.cc:768
EventWrapper< Pl111,&Pl111::readFramebuffer > readEvent
DMA framebuffer read event.
Definition: pl111.hh:328
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pl111.cc:642
virtual void setDirty()
The frame buffer uses this call to notify the vnc server that the frame buffer has been updated and a...
Definition: vncinput.cc:91
static const int LcdTiming1
Definition: pl111.hh:67
static const int buffer_size
Definition: pl111.hh:101
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:98
void copyIn(const uint8_t *fb, const PixelConverter &conv)
Fill the frame buffer with pixel data from an external buffer of the same width and height as this fr...
Definition: framebuffer.cc:167
static const int LcdTiming0
ARM PL111 register map.
Definition: pl111.hh:66
bool scheduled() const
Determine if the current event is scheduled.
Definition: eventq.hh:381
uint32_t waterMark
DMA FIFO watermark.
Definition: pl111.hh:299
Pl111(const Params *p)
Definition: pl111.cc:59
uint16_t height
Frame buffer height - lines per panel.
Definition: pl111.hh:278
#define warn_once(...)
Definition: misc.hh:226
void updateVideoParams()
Send updated parameters to the vnc server.
Definition: pl111.cc:426
static const int LcdImsc
Definition: pl111.hh:73
virtual void setFrameBuffer(const FrameBuffer *rfb)
Set the address of the frame buffer we are going to show.
Definition: vncinput.cc:74
Addr maxAddr
Frame buffer max address.
Definition: pl111.hh:293
static const int ClcdCrsrConfig
Definition: pl111.hh:82
PixelConverter converter
Definition: pl111.hh:262
void dmaDone()
DMA done event.
Definition: pl111.cc:501
static const int LcdTiming3
Definition: pl111.hh:69
TimingReg1 lcdTiming1
Vertical axis panel control register.
Definition: pl111.hh:197
static const int LcdPalette
Definition: pl111.hh:79
uint32_t lcdUpbase
Upper panel frame base address register.
Definition: pl111.hh:206
STL vector class.
Definition: stl.hh:40
T get(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness.
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
Definition: pl111.hh:257
const char data[]
Definition: circlebuf.cc:43
#define warn(...)
Definition: misc.hh:219
InterruptReg lcdRis
Raw interrupt status register - const.
Definition: pl111.hh:218
EventWrapper< Pl111,&Pl111::generateInterrupt > intEvent
Wrapper to create an event out of the interrupt.
Definition: pl111.hh:357
uint32_t clcdCrsrXY
Cursor XY position register.
Definition: pl111.hh:242
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:145
TimingReg3 lcdTiming3
Line end control register.
Definition: pl111.hh:203
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
#define SERIALIZE_CONTAINER(member)
Definition: serialize.hh:164
ControlReg lcdControl
Control register.
Definition: pl111.hh:212
Tick curTick()
The current simulated tick.
Definition: core.hh:47
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
static const int LcdControl
Definition: pl111.hh:72
Tick pixelClock
Pixel clock.
Definition: pl111.hh:260
void startDma()
start the dmas off after power is enabled
Definition: pl111.cc:446
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
Tick when() const
Get the time that the event is scheduled.
Definition: eventq.hh:397
virtual void sendInt(uint32_t num)=0
Post an interrupt from a device that is connected to the GIC.
void makeAtomicResponse()
Definition: packet.hh:857
Definition: pl111.hh:61
uint64_t Tick
Tick count type.
Definition: types.hh:63
static const int ClcdCrsrXY
Definition: pl111.hh:85
uint32_t clcdCrsrClip
Cursor clip position register.
Definition: pl111.hh:245
The request is to an uncacheable address.
Definition: request.hh:114
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
Definition: pl111.hh:225
static const int ClcdCrsrClip
Definition: pl111.hh:86
#define SERIALIZE_ARRAY(member, size)
Definition: serialize.hh:158
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
Definition: pl111.hh:350
static const int ClcdCrsrRis
Definition: pl111.hh:89
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
Definition: pl111.hh:248
DmaDoneEvent(Pl111 *_obj)
Event wrapper for dmaDone()
Definition: pl111.hh:180
static const int LcdUpCurr
Definition: pl111.hh:77
Addr curAddr
Frame buffer current address.
Definition: pl111.hh:296
static const int ClcdCrsrPalette1
Definition: pl111.hh:84
uint32_t lcdLpbase
Lower panel frame base address register.
Definition: pl111.hh:209
Bitmap bmp
Helper to write out bitmaps.
Definition: pl111.hh:269
void fillFifo()
fillFIFO event
Definition: pl111.cc:477
#define UNSERIALIZE_CONTAINER(member)
Definition: serialize.hh:167
bool readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
Definition: amba_device.cc:74
uint8_t bytesPerPixel
Bytes per pixel.
Definition: pl111.hh:281
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
BaseGic * gic
Definition: amba_device.hh:108
System * sys
Definition: io_device.hh:87
static const int maxOutstandingDma
Definition: pl111.hh:99
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:245
Bitfield< 10, 5 > event
static const int LcdLpCurr
Definition: pl111.hh:78
Bitfield< 15, 8 > vector
Definition: intmessage.hh:45
Tick startTime
Start time for frame buffer dma read.
Definition: pl111.hh:287
static const uint64_t AMBA_ID
Definition: pl111.hh:64
static const int CrsrImageSize
Definition: pl111.hh:93
static const int ClcdCrsrMis
Definition: pl111.hh:90
uint32_t clcdCrsrConfig
Cursor configuration register.
Definition: pl111.hh:235
Implementiation of a PL111 CLCD controller.
RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, uint8_t *data, Tick delay, Request::Flags flag=0)
Definition: dma_device.cc:149
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:143
#define UNSERIALIZE_ARRAY(member, size)
Definition: serialize.hh:161
static const int LcdUpBase
Definition: pl111.hh:70
uint32_t dmaPendingNum
Number of pending dma reads.
Definition: pl111.hh:302
void write(std::ostream &bmp) const
Write the frame buffer data into the provided ostream.
Definition: bitmap.cc:93
Declaration of a VNC input.
virtual const std::string name() const
Definition: sim_object.hh:117
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism...
Definition: pl111.hh:229
Base class for ARM GIC implementations.
Declaration of the Packet class.
std::ostream CheckpointOut
Definition: serialize.hh:67
PixelConverter pixelConverter() const
Definition: pl111.cc:384
static const int ClcdCrsrIcr
Definition: pl111.hh:88
InterruptReg lcdImsc
Interrupt mask set/clear register.
Definition: pl111.hh:215
Bitfield< 9 > fb
Definition: miscregs.hh:1472
Addr startAddr
Frame buffer base address.
Definition: pl111.hh:290
EventWrapper< Pl111,&Pl111::fillFifo > fillFifoEvent
Fill fifo.
Definition: pl111.hh:331
Bitfield< 4 > width
Definition: miscregs.hh:1383
static const int ClcdCrsrCtrl
Definition: pl111.hh:81
void schedule(Event &event, Tick when)
Definition: eventq.hh:728
Bitfield< 31 > rw
Definition: miscregs.hh:1449
~Pl111()
Definition: pl111.cc:91
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
Definition: pl111.hh:251
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:227
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pl111.cc:552
TimingReg0 lcdTiming0
Horizontal axis panel control register.
Definition: pl111.hh:191
TimingReg2 lcdTiming2
Clock and signal polarity control register.
Definition: pl111.hh:200
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
Definition: pl111.hh:353
uint8_t length
Definition: inet.hh:334
uint32_t clcdCrsrPalette0
Cursor palette registers.
Definition: pl111.hh:238
DmaPort dmaPort
Definition: dma_device.hh:157
void readFramebuffer()
DMA framebuffer read.
Definition: pl111.cc:454
Configurable RGB pixel converter.
Definition: framebuffer.hh:91
unsigned getSize() const
Definition: packet.hh:649
void generateInterrupt()
Function to generate interrupt.
Definition: pl111.cc:755
bool enableCapture
Definition: pl111.hh:359
Bitfield< 0 > p
Bitfield< 1 > x
Definition: types.hh:105
static const int ClcdCrsrPalette0
Definition: pl111.hh:83
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
Definition: pl111.hh:284
OutputStream * pic
Picture of what the current frame buffer looks like.
Definition: pl111.hh:272
static const int ClcdCrsrImsc
Definition: pl111.hh:87
uint16_t width
Frame buffer width - pixels per line.
Definition: pl111.hh:275
static const int LcdRis
Definition: pl111.hh:74
static const int LcdPaletteSize
Definition: pl111.hh:92
Addr getAddr() const
Definition: packet.hh:639
FrameBuffer fb
Definition: pl111.hh:263

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