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pl111.hh
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24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Authors: William Wang
38  * Ali Saidi
39  */
40 
41 
46 #ifndef __DEV_ARM_PL111_HH__
47 #define __DEV_ARM_PL111_HH__
48 
49 #include <fstream>
50 #include <memory>
51 
52 #include "base/bitmap.hh"
53 #include "base/framebuffer.hh"
54 #include "base/output.hh"
55 #include "dev/arm/amba_device.hh"
56 #include "params/Pl111.hh"
57 #include "sim/serialize.hh"
58 
59 class VncInput;
60 
61 class Pl111: public AmbaDmaDevice
62 {
63  protected:
64  static const uint64_t AMBA_ID = ULL(0xb105f00d00141111);
66  static const int LcdTiming0 = 0x000;
67  static const int LcdTiming1 = 0x004;
68  static const int LcdTiming2 = 0x008;
69  static const int LcdTiming3 = 0x00C;
70  static const int LcdUpBase = 0x010;
71  static const int LcdLpBase = 0x014;
72  static const int LcdControl = 0x018;
73  static const int LcdImsc = 0x01C;
74  static const int LcdRis = 0x020;
75  static const int LcdMis = 0x024;
76  static const int LcdIcr = 0x028;
77  static const int LcdUpCurr = 0x02C;
78  static const int LcdLpCurr = 0x030;
79  static const int LcdPalette = 0x200;
80  static const int CrsrImage = 0x800;
81  static const int ClcdCrsrCtrl = 0xC00;
82  static const int ClcdCrsrConfig = 0xC04;
83  static const int ClcdCrsrPalette0 = 0xC08;
84  static const int ClcdCrsrPalette1 = 0xC0C;
85  static const int ClcdCrsrXY = 0xC10;
86  static const int ClcdCrsrClip = 0xC14;
87  static const int ClcdCrsrImsc = 0xC20;
88  static const int ClcdCrsrIcr = 0xC24;
89  static const int ClcdCrsrRis = 0xC28;
90  static const int ClcdCrsrMis = 0xC2C;
91 
92  static const int LcdPaletteSize = 128;
93  static const int CrsrImageSize = 256;
94 
95  static const int LcdMaxWidth = 1024; // pixels per line
96  static const int LcdMaxHeight = 768; // lines per panel
97 
98  static const int dmaSize = 8; // 64 bits
99  static const int maxOutstandingDma = 16; // 16 deep FIFO of 64 bits
100 
101  static const int buffer_size = LcdMaxWidth * LcdMaxHeight * sizeof(uint32_t);
102 
103  enum LcdMode {
104  bpp1 = 0,
112  };
113 
114  BitUnion8(InterruptReg)
115  Bitfield<1> underflow;
116  Bitfield<2> baseaddr;
117  Bitfield<3> vcomp;
118  Bitfield<4> ahbmaster;
119  EndBitUnion(InterruptReg)
120 
121  BitUnion32(TimingReg0)
122  Bitfield<7,2> ppl;
123  Bitfield<15,8> hsw;
124  Bitfield<23,16> hfp;
125  Bitfield<31,24> hbp;
126  EndBitUnion(TimingReg0)
127 
128  BitUnion32(TimingReg1)
129  Bitfield<9,0> lpp;
130  Bitfield<15,10> vsw;
131  Bitfield<23,16> vfp;
132  Bitfield<31,24> vbp;
133  EndBitUnion(TimingReg1)
134 
135  BitUnion32(TimingReg2)
136  Bitfield<4,0> pcdlo;
137  Bitfield<5> clksel;
138  Bitfield<10,6> acb;
139  Bitfield<11> avs;
140  Bitfield<12> ihs;
141  Bitfield<13> ipc;
142  Bitfield<14> ioe;
143  Bitfield<25,16> cpl;
144  Bitfield<26> bcd;
145  Bitfield<31,27> pcdhi;
146  EndBitUnion(TimingReg2)
147 
148  BitUnion32(TimingReg3)
149  Bitfield<6,0> led;
150  Bitfield<16> lee;
151  EndBitUnion(TimingReg3)
152 
153  BitUnion32(ControlReg)
154  Bitfield<0> lcden;
155  Bitfield<3,1> lcdbpp;
156  Bitfield<4> lcdbw;
157  Bitfield<5> lcdtft;
158  Bitfield<6> lcdmono8;
159  Bitfield<7> lcddual;
160  Bitfield<8> bgr;
161  Bitfield<9> bebo;
162  Bitfield<10> bepo;
163  Bitfield<11> lcdpwr;
164  Bitfield<13,12> lcdvcomp;
165  Bitfield<16> watermark;
166  EndBitUnion(ControlReg)
167 
174  class DmaDoneEvent : public Event
175  {
176  private:
177  Pl111 &obj;
178 
179  public:
181  : Event(), obj(*_obj) {}
182 
183  void process() {
184  obj.dmaDoneEventFree.push_back(this);
185  obj.dmaDone();
186  }
187 
188  const std::string name() const {
189  return obj.name() + ".DmaDoneEvent";
190  }
191  };
192 
194  TimingReg0 lcdTiming0;
195 
197  TimingReg1 lcdTiming1;
198 
200  TimingReg2 lcdTiming2;
201 
203  TimingReg3 lcdTiming3;
204 
206  uint32_t lcdUpbase;
207 
209  uint32_t lcdLpbase;
210 
212  ControlReg lcdControl;
213 
215  InterruptReg lcdImsc;
216 
218  InterruptReg lcdRis;
219 
221  InterruptReg lcdMis;
222 
226 
230 
232  uint32_t clcdCrsrCtrl;
233 
235  uint32_t clcdCrsrConfig;
236 
240 
242  uint32_t clcdCrsrXY;
243 
245  uint32_t clcdCrsrClip;
246 
248  InterruptReg clcdCrsrImsc;
249 
251  InterruptReg clcdCrsrIcr;
252 
254  InterruptReg clcdCrsrRis;
255 
257  InterruptReg clcdCrsrMis;
258 
261 
264 
267 
270 
273 
275  uint16_t width;
276 
278  uint16_t height;
279 
281  uint8_t bytesPerPixel;
282 
284  uint8_t *dmaBuffer;
285 
288 
291 
294 
297 
299  uint32_t waterMark;
300 
302  uint32_t dmaPendingNum;
303 
305 
307  void updateVideoParams();
308 
310  void readFramebuffer();
311 
313  void generateReadEvent();
314 
316  void generateInterrupt();
317 
319  void fillFifo();
320 
322  void startDma();
323 
325  void dmaDone();
326 
329 
332 
351 
358 
360 
361  public:
362  typedef Pl111Params Params;
363 
364  const Params *
365  params() const
366  {
367  return dynamic_cast<const Params *>(_params);
368  }
369  Pl111(const Params *p);
370  ~Pl111();
371 
372  Tick read(PacketPtr pkt) override;
373  Tick write(PacketPtr pkt) override;
374 
375  void serialize(CheckpointOut &cp) const override;
376  void unserialize(CheckpointIn &cp) override;
377 
383  AddrRangeList getAddrRanges() const override;
384 };
385 
386 #endif
Bitfield< 11 > lcdpwr
Definition: pl111.hh:163
static const int LcdMis
Definition: pl111.hh:75
uint32_t clcdCrsrPalette1
Definition: pl111.hh:239
static const int LcdTiming2
Definition: pl111.hh:68
static const int dmaSize
Definition: pl111.hh:98
static const int CrsrImage
Definition: pl111.hh:80
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
Definition: pl111.hh:254
uint32_t clcdCrsrCtrl
Cursor control register.
Definition: pl111.hh:232
static const int LcdIcr
Definition: pl111.hh:76
static const int LcdLpBase
Definition: pl111.hh:71
Internal gem5 representation of a frame buffer.
Definition: framebuffer.hh:244
InterruptReg lcdMis
Masked interrupt status register.
Definition: pl111.hh:221
VncInput * vnc
VNC server.
Definition: pl111.hh:266
AmbaDmaDeviceParams Params
Definition: amba_device.hh:111
Definition: bitmap.hh:56
Bitfield< 14 > ioe
Definition: pl111.hh:142
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Definition: pl111.cc:768
EventWrapper< Pl111,&Pl111::readFramebuffer > readEvent
DMA framebuffer read event.
Definition: pl111.hh:328
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pl111.cc:642
static const int LcdTiming1
Definition: pl111.hh:67
static const int buffer_size
Definition: pl111.hh:101
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:98
static const int LcdTiming0
ARM PL111 register map.
Definition: pl111.hh:66
uint32_t waterMark
DMA FIFO watermark.
Definition: pl111.hh:299
Pl111(const Params *p)
Definition: pl111.cc:59
uint16_t height
Frame buffer height - lines per panel.
Definition: pl111.hh:278
void updateVideoParams()
Send updated parameters to the vnc server.
Definition: pl111.cc:426
static const int LcdImsc
Definition: pl111.hh:73
Bitfield< 31, 24 > vbp
Definition: pl111.hh:132
led
Definition: pl111.hh:149
static const int LcdMaxWidth
Definition: pl111.hh:95
const std::string name() const
Definition: pl111.hh:188
Bitfield< 31, 24 > hbp
Definition: pl111.hh:125
Bitfield< 2 > baseaddr
Definition: pl111.hh:116
Addr maxAddr
Frame buffer max address.
Definition: pl111.hh:293
static const int ClcdCrsrConfig
Definition: pl111.hh:82
Bitfield< 4 > ahbmaster
Definition: pl111.hh:118
PixelConverter converter
Definition: pl111.hh:262
void dmaDone()
DMA done event.
Definition: pl111.cc:501
static const int LcdTiming3
Definition: pl111.hh:69
TimingReg1 lcdTiming1
Vertical axis panel control register.
Definition: pl111.hh:197
static const int LcdPalette
Definition: pl111.hh:79
uint32_t lcdUpbase
Upper panel frame base address register.
Definition: pl111.hh:206
Bitfield< 5 > lcdtft
Definition: pl111.hh:157
Bitfield< 25, 16 > cpl
Definition: pl111.hh:143
Bitfield< 15, 8 > hsw
Definition: pl111.hh:123
Bitfield< 16 > watermark
Definition: pl111.hh:165
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
Definition: pl111.hh:257
InterruptReg lcdRis
Raw interrupt status register - const.
Definition: pl111.hh:218
EventWrapper< Pl111,&Pl111::generateInterrupt > intEvent
Wrapper to create an event out of the interrupt.
Definition: pl111.hh:357
uint32_t clcdCrsrXY
Cursor XY position register.
Definition: pl111.hh:242
TimingReg3 lcdTiming3
Line end control register.
Definition: pl111.hh:203
ControlReg lcdControl
Control register.
Definition: pl111.hh:212
Pl111Params Params
Definition: pl111.hh:362
static const int LcdControl
Definition: pl111.hh:72
Tick pixelClock
Pixel clock.
Definition: pl111.hh:260
Bitfield< 13, 12 > lcdvcomp
Definition: pl111.hh:164
Bitfield< 10, 6 > acb
Definition: pl111.hh:138
void startDma()
start the dmas off after power is enabled
Definition: pl111.cc:446
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
void generateReadEvent()
Generate dma framebuffer read event.
Definition: pl111.hh:61
uint64_t Tick
Tick count type.
Definition: types.hh:63
static const int ClcdCrsrXY
Definition: pl111.hh:85
void process()
Definition: pl111.hh:183
Bitfield< 31, 27 > pcdhi
Definition: pl111.hh:145
uint32_t clcdCrsrClip
Cursor clip position register.
Definition: pl111.hh:245
pcdlo
Definition: pl111.hh:136
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
Definition: pl111.hh:225
static const int ClcdCrsrClip
Definition: pl111.hh:86
LcdMode
Definition: pl111.hh:103
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
Definition: pl111.hh:350
static const int ClcdCrsrRis
Definition: pl111.hh:89
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
Definition: pl111.hh:248
DmaDoneEvent(Pl111 *_obj)
Event wrapper for dmaDone()
Definition: pl111.hh:180
static const int LcdUpCurr
Definition: pl111.hh:77
Addr curAddr
Frame buffer current address.
Definition: pl111.hh:296
static const int ClcdCrsrPalette1
Definition: pl111.hh:84
Bitfield< 23, 16 > vfp
Definition: pl111.hh:131
uint32_t lcdLpbase
Lower panel frame base address register.
Definition: pl111.hh:209
Bitfield< 16 > lee
Definition: pl111.hh:150
Bitmap bmp
Helper to write out bitmaps.
Definition: pl111.hh:269
void fillFifo()
fillFIFO event
Definition: pl111.cc:477
Bitfield< 3, 1 > lcdbpp
Definition: pl111.hh:155
uint8_t bytesPerPixel
Bytes per pixel.
Definition: pl111.hh:281
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
#define ULL(N)
uint64_t constant
Definition: types.hh:50
static const int maxOutstandingDma
Definition: pl111.hh:99
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:245
Bitfield< 26 > bcd
Definition: pl111.hh:144
static const int LcdLpCurr
Definition: pl111.hh:78
Tick startTime
Start time for frame buffer dma read.
Definition: pl111.hh:287
Bitfield< 3 > vcomp
Definition: pl111.hh:117
static const uint64_t AMBA_ID
Definition: pl111.hh:64
static const int CrsrImageSize
Definition: pl111.hh:93
static const int ClcdCrsrMis
Definition: pl111.hh:90
uint32_t clcdCrsrConfig
Cursor configuration register.
Definition: pl111.hh:235
static const int LcdUpBase
Definition: pl111.hh:70
uint32_t dmaPendingNum
Number of pending dma reads.
Definition: pl111.hh:302
Bitfield< 10 > bepo
Definition: pl111.hh:162
Bitfield< 5 > clksel
Definition: pl111.hh:137
static const int LcdMaxHeight
Definition: pl111.hh:96
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism...
Definition: pl111.hh:229
Bitfield< 11 > avs
Definition: pl111.hh:139
const Params * params() const
Definition: pl111.hh:365
Bitfield< 15, 10 > vsw
Definition: pl111.hh:130
ppl
Definition: pl111.hh:122
std::ostream CheckpointOut
Definition: serialize.hh:67
PixelConverter pixelConverter() const
Definition: pl111.cc:384
Definition: eventq.hh:185
static const int ClcdCrsrIcr
Definition: pl111.hh:88
Bitfield< 23, 16 > hfp
Definition: pl111.hh:124
InterruptReg lcdImsc
Interrupt mask set/clear register.
Definition: pl111.hh:215
Bitfield< 7 > lcddual
Definition: pl111.hh:159
BitUnion8(InterruptReg) Bitfield< 1 > underflow
Addr startAddr
Frame buffer base address.
Definition: pl111.hh:290
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:107
Bitfield< 8 > bgr
Definition: pl111.hh:160
EventWrapper< Pl111,&Pl111::fillFifo > fillFifoEvent
Fill fifo.
Definition: pl111.hh:331
static const int ClcdCrsrCtrl
Definition: pl111.hh:81
Bitfield< 13 > ipc
Definition: pl111.hh:141
Bitfield< 9 > bebo
Definition: pl111.hh:161
~Pl111()
Definition: pl111.cc:91
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
Definition: pl111.hh:251
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:227
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pl111.cc:552
TimingReg0 lcdTiming0
Horizontal axis panel control register.
Definition: pl111.hh:191
TimingReg2 lcdTiming2
Clock and signal polarity control register.
Definition: pl111.hh:200
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
Definition: pl111.hh:353
uint32_t clcdCrsrPalette0
Cursor palette registers.
Definition: pl111.hh:238
Bitfield< 4 > lcdbw
Definition: pl111.hh:156
void readFramebuffer()
DMA framebuffer read.
Definition: pl111.cc:454
Configurable RGB pixel converter.
Definition: framebuffer.hh:91
BitUnion32(UserDescFlags) Bitfield< 0 > seg_32bit
Bitfield< 12 > ihs
Definition: pl111.hh:140
void generateInterrupt()
Function to generate interrupt.
Definition: pl111.cc:755
bool enableCapture
Definition: pl111.hh:359
Bitfield< 0 > p
static const int ClcdCrsrPalette0
Definition: pl111.hh:83
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
Definition: pl111.hh:284
OutputStream * pic
Picture of what the current frame buffer looks like.
Definition: pl111.hh:272
lpp
Definition: pl111.hh:129
static const int ClcdCrsrImsc
Definition: pl111.hh:87
uint16_t width
Frame buffer width - pixels per line.
Definition: pl111.hh:275
static const int LcdRis
Definition: pl111.hh:74
static const int LcdPaletteSize
Definition: pl111.hh:92
EndBitUnion(InterruptReg) BitUnion32(TimingReg0) Bitfield<7
Bitfield< 6 > lcdmono8
Definition: pl111.hh:158
FrameBuffer fb
Definition: pl111.hh:263

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