CS/ECE 552 Introduction to Computer Architecture Spring 2012 Section 1 Instructor David A. Wood and T. A. Ramkumar Ravikumar URL: http://www.cs.wisc.edu/~david/courses/cs552/S12/

Frequently asked questions

• I've taken ECE 551 and know Verilog well. Do I need to use the restricted subset?
  Yes, all the modules that you design for your homeworks and project must use ONLY the allowed subset of Verilog. This is to ensure that these modules can be synthesized efficiently and to force you to think about the design's structure. You are required to run Vcheck, the Verilog checker, to confirm that your designs use only the restricted subset.

• Do my testbenches need to use the restricted subset of Verilog?
  No, testbenches are used to generate inputs to (and optionally test outputs from) your design modules. Testbenches are only used during simulation and will NOT be synthesized to actual logic, so there is no need to restrict the Verilog that you use. Thus you are not required to run the Verilog checker on your testbenches.

• How do I interpret the output of VCheck and how do I submit the results of VCheck ?
  VCheck will throw an error message in case your verilog file contains constructs that are not allowed. If not, it will terminate after throwing a "Hash = some_number" on the terminal. Use the command java vcheck file.v > file.vcheck.out to print the Vcheck results for the module file.v to a file named file.vcheck.out The file can then be opened with any text editor. Remember that the Vcheck.class and VerFile.class files need to be copied tothe location as well (If not you will not be able to run VCheck)

• Why am I not able to open my .bashrc.local or .cshrc.local to set up environment ?
  You will usually get a 'permission denied' or 'file not found' error if you fail to open them from your home directory. Type cd $HOME in the terminal and then open the approprite file with an editor of your choice to set up the environment

• What steps do I need to follow to submit my assignment through Handin ?

  NOTE: Instructions might vary from assignment to assignment. You should check the page of individual homeworks to understand what you need to submit. The example below is just for your reference and is based on what we did for HW1, Spring 2012

  • Make a folder for each problem with the following names ONLY

  hw1_1 -> should contain all files pertaining to problem1 only

  hw1_2 -> should contain all files pertaining to problem2 only

  hw1_3 -> should contain all files pertaining to problem3 only

  • Your top level modules SHOULD FOLLOW the convention that has been mentioned in the homework page
  • tar these 3 folders to a .tar file

  cd 'location_your_3_folders_are'

  tar cvf 'your_CS_login_name.tar' hw1_1 hw1_2 hw1_3

  Example: tar cvf zzz.tar hw1_1 hw1_2 hw1_3

  • Move this .tar file to a directory

  mkdir 'your_CS_login'

  mv 'your_CS_login_name.tar' 'your_cs_login'/

  Example:mkdir zzz mv zzz.tar zzz/

  • Handin using the instruction below

  handin -c cs552-1 -a HW1 -d 'path_where_directory_zzz_is_present'