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process.cc
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1 /*
2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
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14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * Authors: Gabe Black
29  * Ali Saidi
30  * Korey Sewell
31  */
32 
33 #include "arch/mips/process.hh"
34 
35 #include "arch/mips/isa_traits.hh"
38 #include "base/misc.hh"
39 #include "cpu/thread_context.hh"
40 #include "debug/Loader.hh"
41 #include "mem/page_table.hh"
42 #include "sim/aux_vector.hh"
43 #include "sim/process.hh"
44 #include "sim/process_impl.hh"
45 #include "sim/syscall_return.hh"
46 #include "sim/system.hh"
47 
48 using namespace std;
49 using namespace MipsISA;
50 
51 MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile)
52  : Process(params, objFile)
53 {
54  // Set up stack. On MIPS, stack starts at the top of kuseg
55  // user address space. MIPS stack grows down from here
56  Addr stack_base = 0x7FFFFFFF;
57 
58  Addr max_stack_size = 8 * 1024 * 1024;
59 
60  // Set pointer for next thread stack. Reserve 8M for main stack.
61  Addr next_thread_stack_base = stack_base - max_stack_size;
62 
63  // Set up break point (Top of Heap)
64  Addr brk_point = objFile->dataBase() + objFile->dataSize() +
65  objFile->bssSize();
66  brk_point = roundUp(brk_point, PageBytes);
67 
68  // Set up region for mmaps. Start it 1GB above the top of the heap.
69  Addr mmap_end = brk_point + 0x40000000L;
70 
71  memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
72  next_thread_stack_base, mmap_end);
73 }
74 
75 void
77 {
79 
80  argsInit<uint32_t>(PageBytes);
81 }
82 
83 template<class IntType>
84 void
85 MipsProcess::argsInit(int pageSize)
86 {
87  int intSize = sizeof(IntType);
88 
89  // Patch the ld_bias for dynamic executables.
90  updateBias();
91 
92  // load object file into target memory
94 
95  typedef AuxVector<IntType> auxv_t;
97 
98  ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
99  if (elfObject)
100  {
101  // Set the system page size
102  auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::PageBytes));
103  // Set the frequency at which time() increments
104  auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
105  // For statically linked executables, this is the virtual
106  // address of the program header tables if they appear in the
107  // executable image.
108  auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
109  DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable());
110  // This is the size of a program header entry from the elf file.
111  auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
112  // This is the number of program headers from the original elf file.
113  auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
114  // This is the base address of the ELF interpreter; it should be
115  // zero for static executables or contain the base address for
116  // dynamic executables.
117  auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
118  //The entry point to the program
119  auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
120  //Different user and group IDs
121  auxv.push_back(auxv_t(M5_AT_UID, uid()));
122  auxv.push_back(auxv_t(M5_AT_EUID, euid()));
123  auxv.push_back(auxv_t(M5_AT_GID, gid()));
124  auxv.push_back(auxv_t(M5_AT_EGID, egid()));
125  }
126 
127  // Calculate how much space we need for arg & env & auxv arrays.
128  int argv_array_size = intSize * (argv.size() + 1);
129  int envp_array_size = intSize * (envp.size() + 1);
130  int auxv_array_size = intSize * 2 * (auxv.size() + 1);
131 
132  int arg_data_size = 0;
133  for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
134  arg_data_size += argv[i].size() + 1;
135  }
136  int env_data_size = 0;
137  for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
138  env_data_size += envp[i].size() + 1;
139  }
140 
141  int space_needed =
142  argv_array_size +
143  envp_array_size +
144  auxv_array_size +
145  arg_data_size +
146  env_data_size;
147 
148  // set bottom of stack
149  memState->setStackMin(memState->getStackBase() - space_needed);
150  // align it
151  memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
152  memState->setStackSize(memState->getStackBase() - memState->getStackMin());
153  // map memory
154  allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(),
155  pageSize));
156 
157  // map out initial stack contents; leave room for argc
158  IntType argv_array_base = memState->getStackMin() + intSize;
159  IntType envp_array_base = argv_array_base + argv_array_size;
160  IntType auxv_array_base = envp_array_base + envp_array_size;
161  IntType arg_data_base = auxv_array_base + auxv_array_size;
162  IntType env_data_base = arg_data_base + arg_data_size;
163 
164  // write contents to stack
165  IntType argc = argv.size();
166 
167  argc = htog((IntType)argc);
168 
169  initVirtMem.writeBlob(memState->getStackMin(), (uint8_t*)&argc, intSize);
170 
171  copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
172 
173  copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
174 
175  // Copy the aux vector
176  for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
177  initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
178  (uint8_t*)&(auxv[x].a_type), intSize);
179  initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
180  (uint8_t*)&(auxv[x].a_val), intSize);
181  }
182 
183  // Write out the terminating zeroed auxilliary vector
184  for (unsigned i = 0; i < 2; i++) {
185  const IntType zero = 0;
186  const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i);
187  initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize);
188  }
189 
191 
192  setSyscallArg(tc, 0, argc);
193  setSyscallArg(tc, 1, argv_array_base);
194  tc->setIntReg(StackPointerReg, memState->getStackMin());
195 
196  tc->pcState(getStartPC());
197 }
198 
199 
202 {
203  assert(i < 6);
204  return tc->readIntReg(FirstArgumentReg + i++);
205 }
206 
207 void
209 {
210  assert(i < 6);
211  tc->setIntReg(FirstArgumentReg + i, val);
212 }
213 
214 void
216 {
217  if (sysret.successful()) {
218  // no error
220  tc->setIntReg(ReturnValueReg, sysret.returnValue());
221  } else {
222  // got an error, return details
224  tc->setIntReg(ReturnValueReg, sysret.errnoValue());
225  }
226 }
Addr dataBase() const
Definition: object_file.hh:139
#define DPRINTF(x,...)
Definition: trace.hh:212
ObjectFile * objFile
Definition: process.hh:182
T htog(T value)
Definition: byteswap.hh:177
Addr programHeaderTable()
Definition: elf_object.hh:129
Bitfield< 7, 0 > L
Definition: int.hh:59
Bitfield< 7 > i
Definition: miscregs.hh:1378
void setSyscallArg(ThreadContext *tc, int i, MipsISA::IntReg val)
Definition: process.cc:208
std::vector< ContextID > contextIds
Definition: process.hh:168
void allocateMem(Addr vaddr, int64_t size, bool clobber=false)
Definition: process.cc:310
ip6_addr_t addr
Definition: inet.hh:335
SETranslatingPortProxy initVirtMem
Definition: process.hh:180
uint64_t uid()
Definition: process.hh:83
void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
Definition: process.cc:215
virtual void setIntReg(int reg_idx, uint64_t val)=0
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:288
virtual TheISA::PCState pcState()=0
T roundUp(const T &val, const U &align)
Definition: intmath.hh:205
std::shared_ptr< MemState > memState
Definition: process.hh:206
ThreadContext is the external interface to all thread state for anything outside of the CPU...
STL vector class.
Definition: stl.hh:40
Bitfield< 63 > val
Definition: misc.hh:770
MipsISA::IntReg getSyscallArg(ThreadContext *tc, int &i)
Definition: process.cc:201
uint32_t IntReg
Definition: registers.hh:288
virtual uint64_t readIntReg(int reg_idx)=0
int64_t returnValue() const
The return value.
uint64_t euid()
Definition: process.hh:84
int errnoValue() const
The errno value.
Addr getStartPC()
Definition: process.cc:482
System * system
Definition: process.hh:171
const RegIndex StackPointerReg
Definition: registers.hh:79
T roundDown(const T &val, const U &align)
Definition: intmath.hh:213
Addr entryPoint() const
Definition: object_file.hh:134
std::vector< std::string > envp
Definition: process.hh:184
ThreadContext * getThreadContext(ContextID tid)
Definition: system.hh:203
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
virtual bool loadSections(PortProxy &mem_proxy, Addr mask=maxAddr, Addr offset=0)
Definition: object_file.cc:93
size_t dataSize() const
Definition: object_file.hh:143
const Addr PageBytes
Definition: isa_traits.hh:52
uint16_t programHeaderSize()
Definition: elf_object.hh:130
void copyStringArray(std::vector< std::string > &strings, AddrType array_ptr, AddrType data_ptr, SETranslatingPortProxy &memProxy)
Definition: process_impl.hh:43
Declarations of a non-full system Page Table.
MipsProcess(ProcessParams *params, ObjectFile *objFile)
Definition: process.cc:51
uint16_t programHeaderCount()
Definition: elf_object.hh:131
static const int FirstArgumentReg
Definition: process.cc:53
void updateBias()
Definition: process.cc:442
void argsInit(int pageSize)
Definition: process.cc:85
size_t bssSize() const
Definition: object_file.hh:144
uint64_t gid()
Definition: process.hh:85
void initState()
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:76
const Addr PageBytes
Definition: isa_traits.hh:54
const RegIndex ReturnValueReg
Definition: registers.hh:83
std::vector< std::string > argv
Definition: process.hh:183
This class represents the return value from an emulated system call, including any errno setting...
bool successful() const
Was the system call successful?
const RegIndex SyscallSuccessReg
Definition: registers.hh:89
Bitfield< 1 > x
Definition: types.hh:105
Addr getBias()
Definition: process.cc:474
uint64_t egid()
Definition: process.hh:86
virtual void writeBlob(Addr addr, const uint8_t *p, int size) const
Write size bytes from p to address.

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