Minor::Fetch2 Class Reference

This stage receives lines of data from Fetch1, separates them into instructions and passes them to Decode. More...

#include <fetch2.hh>

Inheritance diagram for Minor::Fetch2:

Classes
struct	Fetch2ThreadInfo
	Data members after this line are cycle-to-cycle state. More...

Public Member Functions
	Fetch2 (const std::string &name, MinorCPU &cpu_, MinorCPUParams &params, Latch< ForwardLineData >::Output inp_, Latch< BranchData >::Output branchInp_, Latch< BranchData >::Input predictionOut_, Latch< ForwardInstData >::Input out_, std::vector< InputBuffer< ForwardInstData >> &next_stage_input_buffer)
void	evaluate ()
	Pass on input/buffer data to the output if you can. More...
void	minorTrace () const
bool	isDrained ()
	Is this stage drained? For Fetch2, draining is initiated by Execute halting Fetch1 causing Fetch2 to naturally drain. More...
Public Member Functions inherited from Named
	Named (const std::string &name_)
const std::string &	name () const

Public Attributes
std::vector< InputBuffer < ForwardLineData > >	inputBuffer

Protected Member Functions
const ForwardLineData *	getInput (ThreadID tid)
	Get a piece of data to work on from the inputBuffer, or 0 if there is no data. More...
void	popInput (ThreadID tid)
	Pop an element off the input buffer, if there are any. More...
void	dumpAllInput (ThreadID tid)
	Dump the whole contents of the input buffer. More...
void	updateBranchPrediction (const BranchData &branch)
	Update local branch prediction structures from feedback from Execute. More...
void	predictBranch (MinorDynInstPtr inst, BranchData &branch)
	Predicts branches for the given instruction. More...
ThreadID	getScheduledThread ()
	Use the current threading policy to determine the next thread to fetch from. More...

Protected Attributes
MinorCPU &	cpu
	Pointer back to the containing CPU. More...
Latch< ForwardLineData >::Output	inp
	Input port carrying lines from Fetch1. More...
Latch< BranchData >::Output	branchInp
	Input port carrying branches from Execute. More...
Latch< BranchData >::Input	predictionOut
	Output port carrying predictions back to Fetch1. More...
Latch< ForwardInstData >::Input	out
	Output port carrying instructions into Decode. More...
std::vector< InputBuffer < ForwardInstData > > &	nextStageReserve
	Interface to reserve space in the next stage. More...
unsigned int	outputWidth
	Width of output of this stage/input of next in instructions. More...
bool	processMoreThanOneInput
	If true, more than one input word can be processed each cycle if there is room in the output to contain its processed data. More...
BPredUnit &	branchPredictor
	Branch predictor passed from Python configuration. More...
std::vector< Fetch2ThreadInfo >	fetchInfo
ThreadID	threadPriority
Protected Attributes inherited from Named
const std::string	_name

Detailed Description

This stage receives lines of data from Fetch1, separates them into instructions and passes them to Decode.

Definition at line 61 of file fetch2.hh.

Constructor & Destructor Documentation

Minor::Fetch2::Fetch2	(	const std::string &	name,
		MinorCPU &	cpu_,
		MinorCPUParams &	params,
		Latch< ForwardLineData >::Output	inp_,
		Latch< BranchData >::Output	branchInp_,
		Latch< BranchData >::Input	predictionOut_,
		Latch< ForwardInstData >::Input	out_,
		std::vector< InputBuffer< ForwardInstData >> &	next_stage_input_buffer
	)

Definition at line 55 of file fetch2.cc.

References fatal, inputBuffer, and outputWidth.

Member Function Documentation

void Minor::Fetch2::dumpAllInput ( ThreadID  tid )

protected

Dump the whole contents of the input buffer.

Useful after a prediction changes control flow

Definition at line 116 of file fetch2.cc.

References DPRINTF, fetchInfo, inputBuffer, and popInput().

Referenced by evaluate().

void Minor::Fetch2::evaluate

(

)

Pass on input/buffer data to the output if you can.

Reserve a slot in the next stage and output data

Definition at line 239 of file fetch2.cc.

References ActivityRecorder::activateStage(), ActivityRecorder::activity(), MinorCPU::activityRecorder, AlphaISA::advancePC(), Minor::Fetch2::Fetch2ThreadInfo::blocked, branchInp, cpu, DPRINTF, DTRACE, dumpAllInput(), Minor::Fetch2::Fetch2ThreadInfo::expectedStreamSeqNum, Minor::ForwardLineData::fault, Minor::Pipeline::Fetch2StageId, fetchInfo, Minor::Fetch2::Fetch2ThreadInfo::fetchSeqNum, ThreadContext::getDecoderPtr(), getInput(), getScheduledThread(), BigEndianGuest::gtoh(), Minor::Fetch2::Fetch2ThreadInfo::havePC, ArmISA::i, Minor::ForwardLineData::id, inp, inputBuffer, Minor::Fetch2::Fetch2ThreadInfo::inputIndex, Minor::ForwardInstData::insts, InvalidThreadID, Minor::BranchData::isBubble(), Minor::ForwardInstData::isBubble(), Minor::ForwardLineData::isFault(), Minor::BranchData::isStreamChange(), Minor::Fetch2::Fetch2ThreadInfo::lastStreamSeqNum, Minor::ForwardLineData::line, Minor::ForwardLineData::lineBaseAddr, Minor::ForwardLineData::lineWidth, nextStageReserve, out, outputWidth, Minor::Fetch2::Fetch2ThreadInfo::pc, Minor::ForwardLineData::pc, popInput(), predictBranch(), predictionOut, Minor::InstId::predictionSeqNum, Minor::Fetch2::Fetch2ThreadInfo::predictionSeqNum, processMoreThanOneInput, Minor::ForwardInstData::resize(), Minor::InstId::streamSeqNum, Minor::InstId::threadId, Minor::BranchData::threadId, Minor::ForwardInstData::threadId, and updateBranchPrediction().

Referenced by Minor::Pipeline::evaluate().

const ForwardLineData * Minor::Fetch2::getInput ( ThreadID  tid )

protected

Get a piece of data to work on from the inputBuffer, or 0 if there is no data.

Definition at line 94 of file fetch2.cc.

References inputBuffer.

Referenced by evaluate(), and getScheduledThread().

ThreadID Minor::Fetch2::getScheduledThread ( )

inlineprotected

Use the current threading policy to determine the next thread to fetch from.

Definition at line 555 of file fetch2.cc.

References cpu, fetchInfo, getInput(), InvalidThreadID, panic, MinorCPU::randomPriority(), MinorCPU::roundRobinPriority(), MinorCPU::threadPolicy, and threadPriority.

Referenced by evaluate().

bool Minor::Fetch2::isDrained

(

)

Is this stage drained? For Fetch2, draining is initiated by Execute halting Fetch1 causing Fetch2 to naturally drain.

Branch predictions are ignored by Fetch1 during halt

Definition at line 585 of file fetch2.cc.

References inp, inputBuffer, and predictionOut.

Referenced by Minor::Pipeline::isDrained().

void Minor::Fetch2::minorTrace

(

)

const

Definition at line 597 of file fetch2.cc.

References data, fetchInfo, inputBuffer, MINORTRACE, and out.

Referenced by Minor::Pipeline::minorTrace().

void Minor::Fetch2::popInput ( ThreadID  tid )

protected

Pop an element off the input buffer, if there are any.

Definition at line 105 of file fetch2.cc.

References fetchInfo, and inputBuffer.

Referenced by dumpAllInput(), and evaluate().

void Minor::Fetch2::predictBranch ( MinorDynInstPtr  inst, BranchData &  branch  )

protected

Predicts branches for the given instruction.

Updates the instruction's predicted... fields and also the branch which carries the prediction to Fetch1

Definition at line 188 of file fetch2.cc.

References Minor::BranchData::BranchPrediction, branchPredictor, DPRINTF, Minor::Fetch2::Fetch2ThreadInfo::expectedStreamSeqNum, fetchInfo, BPredUnit::predict(), Minor::Fetch2::Fetch2ThreadInfo::predictionSeqNum, and Minor::BranchData::target.

Referenced by evaluate().

void Minor::Fetch2::updateBranchPrediction ( const BranchData &  branch )

protected

Update local branch prediction structures from feedback from Execute.

Definition at line 126 of file fetch2.cc.

References Minor::BranchData::BadlyPredictedBranch, Minor::BranchData::BadlyPredictedBranchTarget, Minor::BranchData::BranchPrediction, branchPredictor, Minor::BranchData::CorrectlyPredictedBranch, DPRINTF, Minor::BranchData::HaltFetch, Minor::BranchData::inst, Minor::BranchData::Interrupt, Minor::BranchData::NoBranch, Minor::BranchData::reason, BPredUnit::squash(), Minor::BranchData::SuspendThread, Minor::BranchData::target, Minor::BranchData::UnpredictedBranch, and BPredUnit::update().

Referenced by evaluate().

Member Data Documentation

Latch<BranchData>::Output Minor::Fetch2::branchInp

protected

Input port carrying branches from Execute.

This is a snoop of the data provided to F1.

Definition at line 72 of file fetch2.hh.

Referenced by evaluate().

BPredUnit& Minor::Fetch2::branchPredictor

protected

Branch predictor passed from Python configuration.

Definition at line 91 of file fetch2.hh.

Referenced by predictBranch(), and updateBranchPrediction().

MinorCPU& Minor::Fetch2::cpu

protected

Pointer back to the containing CPU.

Definition at line 65 of file fetch2.hh.

Referenced by evaluate(), and getScheduledThread().

std::vector<Fetch2ThreadInfo> Minor::Fetch2::fetchInfo

protected

Definition at line 165 of file fetch2.hh.

Referenced by dumpAllInput(), evaluate(), getScheduledThread(), minorTrace(), popInput(), and predictBranch().

Latch<ForwardLineData>::Output Minor::Fetch2::inp

protected

Input port carrying lines from Fetch1.

Definition at line 68 of file fetch2.hh.

Referenced by evaluate(), and isDrained().

std::vector<InputBuffer<ForwardLineData> > Minor::Fetch2::inputBuffer

Definition at line 95 of file fetch2.hh.

Referenced by dumpAllInput(), evaluate(), Fetch2(), getInput(), isDrained(), minorTrace(), and popInput().

std::vector<InputBuffer<ForwardInstData> >& Minor::Fetch2::nextStageReserve

protected

Interface to reserve space in the next stage.

Definition at line 81 of file fetch2.hh.

Referenced by evaluate().

Latch<ForwardInstData>::Input Minor::Fetch2::out

protected

Output port carrying instructions into Decode.

Definition at line 78 of file fetch2.hh.

Referenced by evaluate(), and minorTrace().

unsigned int Minor::Fetch2::outputWidth

protected

Width of output of this stage/input of next in instructions.

Definition at line 84 of file fetch2.hh.

Referenced by evaluate(), and Fetch2().

Latch<BranchData>::Input Minor::Fetch2::predictionOut

protected

Output port carrying predictions back to Fetch1.

Definition at line 75 of file fetch2.hh.

Referenced by evaluate(), and isDrained().

bool Minor::Fetch2::processMoreThanOneInput

protected

If true, more than one input word can be processed each cycle if there is room in the output to contain its processed data.

Definition at line 88 of file fetch2.hh.

Referenced by evaluate().

ThreadID Minor::Fetch2::threadPriority

protected

Definition at line 166 of file fetch2.hh.

Referenced by getScheduledThread().

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The documentation for this class was generated from the following files:

• cpu/minor/fetch2.hh
• cpu/minor/fetch2.cc