David A. Wood

Year:

• 2020, 2019, 2017, 2016,
• 2015, 2014, 2013, 2012,
• 2011, 2010, 2009, 2008,
• 2007, 2006, 2005, 2004,
• 2003, 2002, 2000, 1999,
• 1998, 1997, 1996, 1995,
• 1994, 1993.

For other paper's from Prof. Wood's research groups, please see:

• Wisconsin Multifacet: Publications By Year or By Topic
• Wisconsin Wind Tunnel (matured): papers and annotated bibliography (pdf and ps).

On-line Research Papers

2020

• Jason Lowe-Power, David A. Wood, Mark D. Hill,
  Adaptive Computer Cache Architecture,
  U.S. Patent No. 10,713,165 B2 Issued July 14, 2020.

• Independent Forward Progress of Work-groups
  Alexandru Dutu, Matthew Sinclair, Bradford M. Beckmann, David A. Wood, Marcus Chow,
  In the Proceedings of the International Symposium on Computer Architecture (ISCA 2020).

2019

• Message aggregation combining and compression
  Steven K. Reinhardt, Marc S. Orr, Bradford Beckmann, Shuai Che, David A. Wood
  U.S. Patent No. 10,320,695 issued June 11, 2019
  Conditional atomic operations in single instruction mutiple data processors
  David A. Wood, Steven K. Reinhardt, Bradford Beckmann, Marc S. Orr
  U.S. Patent No. 10,209,990 issued February 19, 2019

2017

• Remote Scoped Synchronization For Work Stealing and Sharing,
  Mark D. Hill, David A. Wood, Shuai Che, Ays Yilmazer, Bradford Beckmann, Marc S. Orr
  U.S. Patent No. 9,804,883 issued October 31, 2017

• Gravel: Fine-Grain GPU-Initiated Network Messages
  Marc S. Orr, Shuai Che, Bradford M. Beckmann, Mark Oskin, Steven K. Reinhardt, and David A. Wood
  The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC17), 2017.
  Local copy: pdf

• Energy-Proportional Computing: A New Definition
  Rathijit Sen and David A. Wood
  IEEE Computer (cover feature), 50 (8), 26-33. August 2017.
  Local copy: pdf

• LogCA: A High-Level Performance Model for Hardware Accelerators
  Muhammad Shoaib Bin Altaf, David A. Wood
  Proceedings of the 44th International Symposium on Computer Architecture (ISCA), Toronto, CA, June 2017
  Local copy: pdf
  Slides: pdf
  Lightning talk: pdf
  

• Crossing Guard: Mediating Host-Accelerator Coherence Interactions
  Lena E. Olson, Mark D. Hill, and David A. Wood
  22nd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2017).
  Local copy: pdf
  Lightning Talk: pdf
  Full Talk: pptx pdf
  Supplemental material: Transition Tables and Code

• Pareto Governors for Energy-Optimal Computing

  Rathijit Sen and David A. Wood
  ACM Transactions on Architecture and Code Optimization (TACO).
  14(1):6 (2017)
  Local copy: pdf

2016

• Lazy Release Consistency for GPUs
  Jonathon Alsop, Marc S. Orr, Bradford M. Beckmann, and David A. Wood
  The 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-49), 2016.
  Local copy: pdf
  Talk: pptx
  Poster: pptx

• Yet Another Compressed Cache: a Low Cost Yet Effective Compressed Cache
  Somayeh Sardashti, Andre Seznec, and David A. Wood
  ACM Transactions on Architecture and Code Optimization (TACO).
  13(3):27 (2016)
  Local copy: pdf

• Optimization Models for Three On-chip Network Problems
  Nilay Vaish, Michael C. Ferris, David A. Wood
  ACM Transactions on Architecture and Code Optimization (TACO).
  13(3):26 (2016)
  Local copy: pdf

• Electronic computer providing power/performance management,
  Rathijit Sen and David A. Wood,
  U.S. Patent No. 9,383,797 issued July 5, 2016.

• Method for memory consistency among heterogeneous computer components
  Derek R. Hower, Mark D. Hill, David A. Wood, Steven K. Reinhardt, Benedict R. Gaster, Blake A. Hechtman, Bradford M. Beckmann
  U.S. Patent No 9,361,118 issued June 7, 2016.

• When to use 3D Die-Stacked Memory for Bandwidth-Constrained Big-Data Workloads
  Jason Lowe-Power, Mark D. Hill, David A. Wood
  The Seventh Workshop on Big Data Benchmarks, Performance Optimization, and Emerging Hardware (BPOE 7) at ASPLOS, April 2016
  Local copy: pdf
  Talk: pdf Google Drive
  Data: link

• ENERGY OPTIMIZED CACHE MEMORY ARCHITECTURE EXPLOITING SPATIAL LOCALITY
  Somayeh Sardashti and David A. Wood,
  U.S. Patent No 9,261,946 issued February 16, 2016.

2015

• A Primer on Compression in the Memory Hierarchy ,
  Somayeh Sardashti, Angelos Arelakis, Per Stenström, and David Wood
  Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, 2015
  Synthesis Lectures in Computer Architecture Home Page: html

• Border Control: Sandboxing Accelerators
  Lena E. Olson, Jason Power, Mark D. Hill, and David A. Wood
  The 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-48), 2015.
  Local copy: pdf
  Talk: pptx, pdf

• GPU Computing Pipeline Inefficiencies and Optimization Opportunities in Heterogeneous CPU-GPU Processors,
  Joel Hestness, Stephen W. Keckler, David A. Wood
  The 2015 IEEE International Symposium on Workload Characterization, Oct. 2015.
  Local copy: pdf

• GPGPU Footprint Models to Estimate Per-Core Power
  Rathijit Sen, David A. Wood
  Computer Architecture Letters. Vol. 15, No. 2, July-December 2016.
  Publication date: July 14, 2015.
  Local copy: pdf

• Toward GPUs being mainstream in analytic processing: An initial argument using simple scan-aggregate queries
  Jason Power, Yinan Li, Mark D. Hill, Jignesh M. Patel, David A. Wood
  Proceedings of the Eleventh International Workshop on Data Management on New Hardware (DaMoN '15)
  Talk: pdf pptx
  Local copy: pdf
  

• Implications of Emerging 3D GPU Architecture on the Scan Primitive
  Jason Power, Yinan Li, Mark D. Hill, Jignesh M. Patel, David A. Wood
  SIGMOD Rec. Volume 44, Issue 1 (April 2015)
  Local copy: pdf
  

• Synchronization Using Remote-Scope Promotion
  Marc S. Orr, Shuai Che, Ayse Yilmazer, Bradford M. Beckmann, Mark D. Hill, David A. Wood
  The 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-20), 2015
  Local copy: pdf
  Talk: pptx

2014

• Skewed Compressed Caches
  Somayeh Sardashti, André Seznec and David A. Wood
  The 47th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-47), 2014.
  Local copy: pdf
  Talk: pptx
  Poster: pdf

• A Comparative Analysis of Microarchitecture Effects on CPU and GPU Memory System Behavior,
  Joel Hestness, Stephen W. Keckler, David A. Wood
  The 2014 IEEE International Symposium on Workload Characterization, Oct. 2014.
  Local copy: pdf
  IISWC presentation: pptx

• LogCA: A Performance Model for Hardware Accelerators
  Muhammad Shoaib Bin Altaf, David A. Wood
  Computer Architecture Letters. September 2014.
  Local copy: pdf

• Fine-grain Task Aggregation and Coordination on GPUs
  Marc S. Orr, Bradford M. Beckmann, Steven K. Reinhardt, David A. Wood
  The 41st International Symposium on Computer Architecture (ISCA-2014)
  Local copy: pdf
  Talk: pptx

• Heterogeneous-race-free Memory Models
  Derek R. Hower, Blake A. Hechtman, Bradford M. Beckmann, Benedict R. Gaster, Mark D. Hill, Steven K. Reinhardt, David A. Wood
  The 19th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-19), 2014
  Local copy (slightly updated): pdf
  Talk (slightly updated): pptx

• Decoupled Compressed Cache: Exploiting Spatial Locality for Energy-Optimized Compressed Caching
  Somayeh Sardashti and David A. Wood
  IEEE Micro Top Picks from the 2013 Computer Architecture Conferences, 2014.
  Local copy: pdf

• Supporting x86-64 Address Translation for 100s of GPU Lanes
  Jason Power, Mark D. Hill, David A. Wood
  The 20th IEEE International Symposium On High Performance Computer Architecture (HPCA-2014)
  Local copy with appendix: pdf
  Talk: pptx
  Data: link

• QuickRelease: A Throughput-oriented Approach to Release Consistency on GPUs
  Blake A. Hechtman, Shuai Che, Derek R. Hower, Yingying Tian, Bradford M. Beckmann, Mark D. Hill, Steven K. Reinhardt, and David A. Wood
  The 20th IEEE International Symposium On High Performance Computer Architecture (HPCA-2014)
  Local copy: pdf
  Talk: pptx

• gem5-gpu: A Heterogeneous CPU-GPU Simulator
  Jason Power, Joel Hestness, Marc S. Orr, Mark D. Hill, David A. Wood
  Computer Architecture Letters. vol 13, no. 1. Jan-June 2014.
  Local copy: pdf
  Web Site: html

2013

• Optimization and Mathematical Modeling in Computer Architecture ,
  Tony Nowatzki, Michael Ferris, Karthikeyan Sankaralingam, Cristian Estan, Nilay Vaish, and David Wood
  Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, 2013 8:4, 1-144
  Synthesis Lectures in Computer Architecture Home Page: html

• Decoupled Compressed Cache: Exploiting Spatial Locality for Energy-Optimized Compressed Caching
  Somayeh Sardashti and David A. Wood
  The 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-46), 2013.
  Local copy: pdf
  Talk: pptx
  Poster: pdf

• Heterogeneous System Coherence for Integrated CPU-GPU Systems
  Jason Power, Arkaprava Basu, Junli Gu, Sooraj Puthoor, Bradford M. Beckmann, Mark D. Hill, Steven K. Reinhardt, David A. Wood
  The 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-46), 2013.
  Local copy: pdf
  Talk: pptx
  Poster: pdf

• Reuse-based online models for caches

  Rathijit Sen, David A. Wood
  SIGMETRICS '13 Proceedings of the ACM SIGMETRICS/international conference on Measurement and modeling of computer systems, 2013
  Local copy (corrected): pdf [Errata: txt]
  Slide show: ppsx, Presentation: pptx
  Compilable source code for models is available. README: txt PACKAGE: tar.gz

• Sequential Consistency for Heterogeneous-Race-Free: Programmer-centric Memory Models for Heterogeneous Platforms
  Derek R. Hower, Bradford M. Beckmann, Benedict R. Gaster, Blake A. Hechtman, Mark D. Hill, Steven K. Reinhardt, and David A. Wood,
  Workshop on Memory Systems Performance and Correctness (MSPC), June 2013.

2012

• Non-broadcast Signature-Based Transactional Memory
  David A. Wood, Mark D. Hill, Michael M. Swift, Michael R. Marty, Luke Yen, Kevin E. Moore, Jayaram Bobba, and Haris Volos
  U.S. Patent No 8,239,633 B2 issued August 7, 2012.

• 21st Century Computer Architecture,
  Mark D. Hill, Sarita Adve, Luis Ceze, Mary Jane Irwin, David Kaeli, Margaret Martonosi, Josep Torrellas, Thomas F. Wenisch, David Wood, Katherine Yelick,
  Computing Community Consortium, May 25, 2012.
  Local copy: pdf
  Outbriefs : pptx and pptx
  Cited by and contributed to NSF XPS program at roughly $16M annually.
  Chinese translation by State Key Laboratory of Computer Architecture (SKL-Carch) and republication: Computing Community Consortium (CCC), 21st Century Computer Architecture, Communication of the China Computer Federation (CCF), 2012, Volume 8, Issue 12, p70-81.
  Local copy of translation: pdf

• UniFI: leveraging non-volatile memories for a unified fault tolerance and idle power management technique

  Somayeh Sardashti, David A. Wood
  ICS '12 Proceedings of the 26th ACM international conference on Supercomputing, 2012
  Local copy: pdf

• Something old and something new: P-states can borrow microarchitecture techniques too

  Yasuko Eckert, Srilatha Manne, Michael J. Schulte, David A. Wood
  ISLPED '12 Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design, 2012
  Local copy: pdf

2011

• The gem5 simulator

  Nathan Binkert, Bradford Beckmann, Gabriel Black, Steven K. Reinhardt, Ali Saidi, Arkaprava Basu, Joel Hestness, Derek R. Hower, Tushar Krishna, Somayeh Sardashti, Rathijit Sen, Korey Sewell, Muhammad Shoaib, Nilay Vaish, Mark D. Hill, David A. Wood
  ACM SIGARCH Computer Architecture News, 2011
  Local copy: pdf
  Web Site: http://gem5.org/

• A Primer on Memory Consistency and Cache Coherence ,
  Daniel J. Sorin, Mark D. Hill, and David A. Wood,
  Synthesis Lectures in Computer Architecture, Morgan & Claypool Publishers, May 2011.
  This lecture is FREE to all -- no paywall.
  Draft copy of front matter and introductory chapter: pdf
  Synthesis Lectures in Computer Architecture Home Page: html

• Calvin: Deterministic or Not? Free Will to Choose,
  Derek R. Hower, Polina Dudnik, David A. Wood, and Mark D. Hill
  17th International Symposium on High-Performance Computer Architecture (HPCA), Februrary 2011.
  Local copy: pdf
  Talk: pptx

• Safe and Efficient Supervised Memory Systems,
  Jayaram Bobba, Marc Lupon, Mark D. Hill, and David A. Wood
  17th International Symposium on High-Performance Computer Architecture (HPCA), Februrary 2011.
  Local copy: pdf
  Talk: pptx

2010

• Forwardflow: a scalable core for power-constrained CMPs

  Dan Gibson, David A. Wood
  ISCA '10 Proceedings of the 37th annual international symposium on Computer architecture, 2010
  Local copy: pdf
  Talk: ppt

• WiDGET: Wisconsin decoupled grid execution tiles

  Yasuko Watanabe, John D. Davis, David A. Wood
  ISCA '10 Proceedings of the 37th annual international symposium on Computer architecture, 2010
  Local copy: pdf
  Talk: pptx

2009

• StealthTest: Low Overhead Online Software Testing using Transactional Memory,
  Jayaram Bobba, Weiwei Xiong, Luke Yen, Mark D. Hill, and David A. Wood
  Conference on Parallel Architectures and Compilation Techniques (PACT), Sep 2009.
  Local copy: pdf
  Talk: ppt

2008

• TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory

  Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael M. Swift, David A. Wood
  ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture, 2008
  Local copy: pdf
  Talk: ppt

• Computer system implementing synchronized broadcast using timestamps
  Robert E. Cypher, David A. Wood, Mark D. Hill, Thomas M. Wicki,
  U.S. Patent No 7,366,843 issued April 29, 2008.

• Adaptive cache compression system,
  David A. Wood, Alaa R. Alameldeen,
  U.S. Patent No 7,412,564, issued Aug 12, 2008.

• OS Support for Virtualizing Transactional Memory,
  Michael M. Swift, Haris Volos, Neelam Goyal, Luke Yen, Mark D. Hill and David A Wood
  Third ACM SIGPLAN Workshop on Transactional Memory (TRANSACT), February 2008.
  Local copy: pdf
  Talk: ppt
  Also appears as Univ. of Wisconsin Computer Sciences Technical Report CS-TR-2008-1630, February 2008.

• Performance Pathologies in Hardware Transactional Memory,
  Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, and David A. Wood
  IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, January-February 2008.
  (Shorter, award version of ISCA 2007 Paper)

2007

• Performance pathologies in hardware transactional memory

  Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, David A. Wood
  ISCA '07 Proceedings of the 34th annual international symposium on Computer architecture, 2007
  Local copy: pdf
  Talk: ppt
  Extended Talk: ppt

• System and method for enhancing communication between devices in a computer system
  David A. Wood, Robert C. Zak, Jr., Monica Wong-Chan, Chistopher J. Jackson, Thomas P. Webber, Mark D. Hill
  U.S. Patent No 7,225,383 issued May 29, 2007.

• LogTM-SE: Decoupling Hardware Transactional Memory from Caches,
  Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E. Moore, Haris Volos, Mark D. Hill, Michael M. Swift, and David A. Wood
  International Symposium on High Performance Computer Architecture (HPCA), February 2007.
  Local copy: pdf
  Talk: ppt, pdf

• Interactions Between Compression and Prefetching in Chip Multiprocessors,
  Alaa R. Alameldeen and David A. Wood
  International Symposium on High Performance Computer Architecture (HPCA), February 2007.
  Local copy: pdf
  Talk: ppt, pdf

2006

• Computer system implementing synchronized broadcast using skew control and queuing
  Robert E. Cypher, Mark D. Hill, David A. Wood,
  U.S. Patent No 7,136,980 issued November 14, 2006.

• ASR: Adaptive Selective Replication for CMP Caches,
  Bradford M. Beckmann, Michael R. Marty, and David A. Wood,
  39th International Symposium on Microarchitecture (MICRO), December 2006.
  Local copy: pdf
  Talk: ppt

• Supporting nested transactional memory in logTM

  Michelle J. Moravan, Jayaram Bobba, Kevin E. Moore, Luke Yen, Mark D. Hill, Ben Liblit, Michael M. Swift, David A. Wood
  ASPLOS XII Proceedings of the 12th international conference on Architectural support for programming languages and operating systems, 2006
  Local copy: pdf
  Talk: pdf, ppt

• IPC Considered Harmful for Multiprocessor Workloads,
  Alaa R. Alameldeen and David A. Wood,
  IEEE Micro, Jul-Aug 2006.
  Local copy: pdf

• LogTM: Log-based Transactional Memory,
  Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan, Mark D. Hill and David A. Wood
  International Symposium on High Performance Computer Architecture (HPCA), February 2006.
  Local copy: pdf
  Talk: ppt, pdf

2005

• Evaluating scheduling policies for fine-grain communication protocols on a cluster of SMPs
  Babak Falsafi, David A. Wood
  Journal of Parallel and Distributed Computing, Volume 65 Issue 4 April 2005
  Paper: pdf

• Token based cache-coherence protocol
  Martin, Milo M. K., Mark D. Hill, David A. Wood,
  U.S. Patent No 6,981,097 issued December 27, 2005.

• Exploring Processor Design Options for Java Based Middleware,
  Martin Karlsson, Kevin E. Moore, Erik Hagersten and David A. Wood,
  34th International Conference on Parallel Processing (ICPP), June 2005.
  Paper: pdf

• Bandwidth-adaptive, hybrid, cache-coherence protocol,
  Martin, Milo M. K., Daniel J. Sorin, Mark D. Hill, David A. Wood,
  U.S. Patent No 6,883,070 issued April 19, 2005.

• Thread-Level Transactional Memory,
  Kevin E. Moore, Mark D. Hill, and David A. Wood,
  Univ. of Wisconsin Computer Sciences Technical Report CS-TR-2005-1524, March 2005.
  Local copy: pdf

• Improving Multiple-CMP Systems Using Token Coherence,
  Michael R. Marty, Jesse D. Bingham, Mark D. Hill, Alan J. Hu, Milo M.K. Martin and David A. Wood,
  International Symposium on High Performance Computer Architecture (HPCA), February 2005.
  Local copy: pdf
  Talk: ppt
  Extended Talk: ppt

2004

• Method and device for a context-based memory management system,
  Boris Ostrovsky, Daniel R. Cassiday, John R. Feehrer, David A. Wood, Pazhani Pillai, Christopher J. Jackson, Mark Donald Hill,
  U.S. Patent No 6,826,671 issued November 30, 2004.

• Managing Wire Delay in Large Chip-Multiprocessor Caches,
  Bradford M. Beckmann and David A. Wood,
  37th International Symposium on Microarchitecture (MICRO), December 2004.
  Local copy: pdf
  Talk: htm and ppt

• Adaptive Cache Compression for High-Performance Processors

  Alaa R. Alameldeen, David A. Wood
  ACM SIGARCH Computer Architecture News, 2004
  Local copy: pdf
  Talk: ppt
  Details of the compression algorithm are available in:
  

  • Frequent Pattern Compression: A Significance-Based Compression Scheme for L2 Caches,
    Alaa R. Alameldeen and David A. Wood,
    Dept. of Computer Sciences Technical Report CS-TR-2004-1500, April 2004.
    Local copy: pdf

• Using Speculation to Simplify Multiprocessor Design,
  Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, and David A. Wood,
  International Parallel and Distributed Processing Symposium (IPDPS), April 2004.
  Local copy: pdf
  Talk: ppt

2003

• Token Coherence: A New Framework for Shared-Memory Multiprocessors,
  Milo M.K. Martin, Mark D. Hill and David A. Wood,
  IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, November-December 2003.
  Local copy: pdf
  Original ISCA 2003 Paper: pdf
  Token Coherence Bibliography: html

• Addressing Workload Variability in Architectural Simulations,
  Alaa R. Alameldeen and David A. Wood,
  IEEE Micro Special Issue: Micro's Top Picks from Microarchitecture Conferences, November-December 2003.
  Local copy: pdf
  (Shorter, award version of HPCA 2003 Paper)

• TLC: Transmission Line Caches,
  Bradford M. Beckmann and David A. Wood,
  36th International Symposium on Microarchitecture (MICRO), December 2003.
  Local copy: pdf
  Talk: htm and ppt

• Token coherence: decoupling performance and correctness

  Milo M. K. Martin, Mark D. Hill, David A. Wood
  ISCA '03 Proceedings of the 30th annual international symposium on Computer architecture, 2003
  Local copy: pdf
  Talk: pdf, ppt
  Shorter IEEE Micro Top Picks Paper: pdf
  Token Coherence Bibliography: html

• Using destination-set prediction to improve the latency/bandwidth tradeoff in shared-memory multiprocessors

  Milo M. K. Martin, Pacia J. Harper, Daniel J. Sorin, Mark D. Hill, David A. Wood
  ISCA '03 Proceedings of the 30th annual international symposium on Computer architecture, 2003
  Local copy: pdf
  Talk: pdf, ppt

• Simulating a $2M Commercial Server on a $2K PC,
  Alaa R. Alameldeen, Milo M.K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Daniel J. Sorin, Mark D. Hill and David A. Wood,
  IEEE Computer, February 2003.
  Local copy: pdf
  Talk: ppt

• Variability in Architectural Simulations of Multi-threaded Workloads,
  Alaa R. Alameldeen and David A. Wood,
  9th International Symposium on High Performance Computer Architecture (HPCA), February 2003.
  Local copy: pdf
  Talk: ppt, pdf
  (Shorter, award version appears in Micro's Top Picks, Nov/Dec 2003)

• Memory System Behavior of Java-Based Middleware,
  Martin Karlsson, Kevin E. Moore, Erik Hagersten and David A. Wood,
  9th International Symposium on High Performance Computer Architecture (HPCA), February 2003.
  Local copy: pdf
  Talk: pdf, ppt

• Dynamic Verification of End-to-End Multiprocessor Invariants,
  Daniel J. Sorin, Mark D. Hill, and David A. Wood,
  International Conference on Dependable Systems and Networks (DSN, formerly FTCC), June 2003.
  Local copy: pdf
  Talk: ppt

• Cache with dynamic control of sub-block fetching,
  Douglas C. Burger and David A. Wood,
  U.S. Patent No 6,557,080 issued April 29, 2003.

2002

• Full-system timing-first simulation

  Carl J. Mauer, Mark D. Hill, David A. Wood
  SIGMETRICS '02 Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 2002
  Local copy: pdf
  Talk: pdf and ppt

• Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol,
  Daniel J. Sorin, Manoj Plakal, Anne E. Condon, Mark D. Hill, Milo M. K. Martin and David A. Wood,
  IEEE Transactions on Parallel and Distributed Systems, June 2002 (vol 13, number 6).
  (Previously available as Dept. of Computer Sciences Technical Report CS-TR-2000-1412, March 2000.)
  Local copy: pdf
  Online protocol examples in html

• SafetyNet: improving the availability of shared memory multiprocessors with global checkpoint/recovery

  Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, David A. Wood
  ACM SIGARCH Computer Architecture News - Special Issue: Proceedings of the 29th annual international symposium on Computer architecture (ISCA '02), 2002
  Local copy: pdf
  Talk: ppt

• Memory Characterization of the ECperf Benchmark,
  Martin Karlsson, Kevin E. Moore, Erik Hagersten, and David A. Wood,
  Workload on Memory Performance Issues (WMPI), 2002.
  Local copy: pdf.

• Evaluating Non-deterministic Multi-threaded Commercial Workloads,
  Alaa R. Alameldeen, Carl J. Mauer, Min Xu, Pacia J. Harper, Milo M.K. Martin, Daniel J. Sorin, Mark D. Hill and David A. Wood,
  Workshop On Computer Architecture Evaluation using Commercial Workloads (CAECW), February 2002.
  Local copy: pdf
  Talk: pdf and ppt

• Bandwidth Adaptive Snooping,
  Milo M. K. Martin, Daniel J. Sorin, Mark D. Hill, and David A. Wood,
  8th International Symposium on High Performance Computer Architecture (HPCA), February 2002.
  Local copy: pdf
  Talk: pdf and ppt

2000

• Timestamp snooping: an approach for extending SMPs

  Milo M. K. Martin, Daniel J. Sorin, Anatassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, David A. Wood
  ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems, 2000
  Local copy: pdf
  Talk: pdf

• Fast Checkpoint/Recovery to Support Kilo-Instruction Speculation and Hardware Fault Tolerance,
  Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, and David A. Wood,
  Dept. of Computer Sciences Technical Report CS-TR-2000-1420, October 2000.
  Local copy: pdf and ps

• Fast and Portable Parallel Architecture Simulators: Wisconsin Wind Tunnel II,
  Shubhendu S. Mukherjee, Steven K. Reinhardt, Babak Falsafi, Mike Litzkow, Steven Huss-Lederman, Mark D. Hill, James R. Larus, and David A. Wood,
  IEEE Concurrency, October-December 2000.
  Local copy: pdf

1999

• Cachable interface control registers for high speed data transfer,
  David A. Wood, Steven K. Reinhardt, Shubhendu S. Mukherjee, Babak Falsafi, Mark D. Hill, and Robert W. Pfile,
  United States Patent 5,951,657 issued September 14, 1999.

• Methods and apparatus for substantially memory-less coherence transformer for connecting computer node coherence domains,
  Erik E. Hagersten, Mark D. Hill, and David A. Wood,
  U.S. Patent No. 5,940,860 issued August 17, 1999.

• DBMSs on a modern processor: Where does time go?,
  Anastassia Ailamaki, David J. DeWitt, Mark D. Hill, and David A. Wood,
  International Conference on Very Large Databases (VLDB), September 1999.
  Local copy: pdf and ps
  Talk: ppt

• Multicast snooping: a new coherence method using a multicast address network

  E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Plakal, Daniel J. Sorin, Mark D. Hill, David A. Wood
  ISCA '99 Proceedings of the 26th annual international symposium on Computer architecture, 1999
  Local copy: pdf
  Talk: pdf and ps

• Hybrid NUMA COMA caching system and methods for selecting between caching modes,
  David A. Wood and Erik E. Hagersten,
  U.S. Patent No. 5,893,144, April 6, 1999.

• Parallel Dispatch Queue: A Queue-Based Programming Abstraction To Parallelize Fine-Grain Communication Protocols
  Babak Falsafi and David A. Wood
  (Proceedings of the 5th International Symposium on High-Performance Computer Architecture (HPCA-5), 1999).
  Method and apparatus for a coherence transformer for connecting computer system coherence domains,
  Erik E. Hagersten, Mark D. Hill, and David A. Wood,
  U.S. Patent No. 5,860,109, Jan 12, 1999.

1998

• Hardware Support for Flexible Distributed Shared Memory,
  Steven K. Reinhardt, Robert Pfile, and David A. Wood,
  (IEEE Transactions on Computers, Vol. 47, No. 10, October 1998, pp. 1056-1072).

• Method and apparatus for a coherence transformer with limited memory for connecting computer system coherence domains,
  Erik E. Hagersten, Mark D. Hill, and David A. Wood,
  U.S. Patent No. 5,829,034, October 27, 1998.

• Sirocco: Cost-Effective Fine-Grain Distributed Shared Memory,
  Ioannis Schoinas, Babak Falsafi, Mark D. Hill, James R. Larus, David A. Wood
  (International Conference on Parallel Architectures and Compilation Techniques (PACT), Oct 1998).

• Analytical Evaluation of Shared-Memory Parallel Systems with ILP Processors,
  Daniel Sorin, Sarita Adve, Vijay Pai, Mary Vernon, David Wood.
  Proceedings of the 25th International Symposium on Computer Architecture (ISCA), June 1998.

• Reflections on "Tempest and Typhoon: User-level Shared Memory",
  Steven K. Reinhardt, James R. Larus, and David A. Wood,
  In 25 years of the International Symposia of Computer Architecture: Selected Papers, ed. Gurindar Sohi, pp. 98-101, 1998.

1997

• Reactive NUMA: A Design for Unifying S-COMA with CC-NUMA,
  Babak Falsafi and David A. Wood,
  ACM/IEEE International Symposium on Computer Architecture (ISCA), June 1997.

• Relaxed Consistency and Coherence Granularity in DSM Systems: A Performance Evaluation,
  Yuanyuan Zhou, Liviu Iftode, Jaswinder Pal Singh, Kai Li, Brian R. Toonen, Ioannis Schoinas, Mark D. Hill, David A. Wood,
  ACM Symposium on Principles and Practices of Parallel Programming, June 1997.

• Wisconsin Wind Tunnel II: A Fast and Portable Parallel Architecture Simulator
  Shubhendu S. Mukherjee, Steven K. Reinhardt, Babak Falsafi, Mike Litzkow, Steve Huss-Lederman, Mark D. Hill, James R. Larus, and David A. Wood,
  1997 Workshop on Performance Analysis and its Impact on Design (PAID-97), June 1997.

• System and method for enhancing communication between devices in a computer system
  David Wood, Robert C. Zak Jr., Monica Wong-Chan, Chirstopher J. Jackson, Thomas P. Webber, and Mark D. Hill,
  U.S. Patent No. 7,225,383, May 28, 2007.

• Modeling Cost/Performance of a Parallel Computer Simulator,
  Babak Falsafi and David A. Wood,
  ACM Transactions on Modeling and Computer Simulation, January 1997.

• Active Memory: A New Abstraction For Memory System Simulation
  Alvin R. Lebeck and David A. Wood,
  ACM Transactions on Modeling and Computer Simulation, January 1997.

• Scheduling Communication on an SMP Node Parallel Machine,
  Babak Falsafi and David A. Wood,
  IEEE International Symposium on High Performance Computer Architecture (HPCA), February 1997.

1996

• Decoupled Hardware Support for Distributed Shared Memory
  Steven K. Reinhardt, Robert W. Pfile, and David A. Wood,
  ACM/IEEE International Symposium on Computer Architecture (ISCA), May 1996

• Coherent Network Interfaces for Fine-Grain Communication
  Shubhendu S. Mukherjee and Babak Falsafi and Mark D. Hill and David A. Wood,
  ACM/IEEE International Symposium on Computer Architecture (ISCA), May 1996

• Synchronization Hardware for Networks of Workstations: Performance vs. Cost
  Rahmat S. Hyder and David A. Wood,
  ACM/IEEE International Conference on Supercomputing (ICS), May 1996

• Paging Tradeoffs in Distributed Shared-Memory Multiprocessors,
  Douglas Burger, Rahmat Hyder, Barton Miller, and David A. Wood,
  Journal of SuperComputing, vol. 10, pp. 87-104, 1996.

1995

• Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors
  Alvin R. Lebeck and David A. Wood,
  ACM/IEEE International Symposium on Computer Architecture (ISCA), June 1995

• Active Memory: A New Abstraction For Memory System Simulation
  Alvin R. Lebeck and David A. Wood,
  Proceedings of the 1995 ACM Sigmetrics Conference on Measurement and Modeling of Data, May 1995.

• Accuracy vs. Performance in Parallel Simulation of Interconnection Networks,
  Douglas C. Burger and David A. Wood.
  In the proceedings of the 9th International Parallel Processing Symposium, April, 1995.

• Cost-Effective Parallel Computing,
  David A. Wood and Mark D. Hill,
  IEEE Computer, Vol 28. No. 2, February 1995, pp. 69-72.

1994

• Application-Specific Protocols for User-Level Shared Memory,
  Babak Falsafi, Alvin Lebeck, Steven Reinhardt, Ioannis Schoinas, Mark Hill, James Larus, Anne Rogers, and David Wood,
  In Proceedings of Supercomputing '94.

• Fine-grain Access Control for Distributed Shared Memory,
  Ioannis Schoinas, Babak Falsafi, Alvin Lebeck, Steven Reinhardt, James Larus, and David Wood,
  Proceedings of ASPLOS VI.

• Tempest and Typhoon: User-Level Shared Memory,
  Steven Reinhardt, James Larus, and David Wood,
  Proceedings of Int'l Symposium on Computer Architecture, 1994.

• Cache Profiling and the SPEC Benchmarks: A Case Study,
  Alvin R. Lebeck and David A. Wood,
  pages 15-26, IEEE COMPUTER, October 1994

• The Wisconsin Wind Tunnel Project: An Annotated Bibliography,
  Mark D. Hill, James R. Larus, David A. Wood,
  Computer Architecture News, v. 22, n. 5, December 1994. On-line version revised frequently.

1993

• Cooperative Shared Memory: Software and Hardware for Scalable Multiprocessors,
  Mark D. Hill, James R. Larus, Steven K. Reinhardt, David A. Wood,
  ACM Transactions on Computer Systems (TOCS), November 1993.

• Mechanisms for Cooperative Shared Memory,
  David A. Wood, Satish Chandra, Babak Falsafi, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James Lewis, Shubhendu Mukherjee, Sabbarao Palacharla, Steven K. Reinhardt,
  20th International Symposium on Computer Architecture, pp. 156-168, May 1993.

• The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers,
  Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James Lewis, David A. Wood,
  Proceedings of the 1993 ACM Sigmetrics Conference on Measurement and Modeling of Data, pp. 48-60, May 1993.

• Kernel Support for the Wisconsin Wind Tunnel,
  Steven K. Reinhardt, Babak Falsafi, and David A. Wood,
  Proceedings of the Second Usenix Symposium on Microkernels and Other Kernel Architectures, pp. 73-89, September 1993,

• Wisconsin Architectural Research Tool Set (WARTS),
  Mark D. Hill, James R. Larus, Alvin R. Lebeck, Madhusudhan Talluri, David A. Wood,
  Computer Architecture News (CAN), August 1993.