Prof. Gurindar S. Sohi's Home Page

Gurindar S. Sohi
John P. Morgridge Professor
E. David Cronon Professor of Computer Sciences
UW-Madison Computer Architecture Group
Departments of Computer Sciences
and Electrical and Computer Engineering
University of Wisconsin-Madison 2006 Photo of Gurindar S. Sohi by Bob Rashid
By Bob Rashid in 2006

Patents

Data Cache Fast Address Calculation System and Method.
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurindar S. Sohi
U.S. Patent 5,860,151. Issued January 12, 1999.

Computer with Dynamic Instruction Reuse.
Avinash Sodani and Gurindar S. Sohi.
U.S. Patent 5,845,103. Issued December 1, 1998.

Data Dependence Speculation Apparatus for Parallel Processing Unit.
Andreas I. Moshovos, Scott E. Breach, Terani N. Vijaykumar, Gurindar S. Sohi
U.S. Patent 5,781,752. Issued July 14, 1998.

Electronic processor providing direct data transfer between linked data consuming instructions.
Andreas I. Moshovos and Gurindar S. Sohi
U.S. Patent 6,658,554. Issued December 2, 2003.

Method and apparatus for parallel execution of computer software using a distilled program.
Craig Buchanan Zilles and Gurindar S. Sohi
U.S. Patent 6,944,754 B2. Issued September 13, 2005.

Data flow execution of methods in sequential programs.
Saisanthosh Balakrishnan and Gurindar S. Sohi
U.S. Patent 7,779,230. Issued August 17, 2010.

Overprovisioned multicore processor .
Koushik Chakraborty, Philip Wells, and Gurindar S. Sohi
U.S. Patent 7,962,774. Issued June 14, 2011.

Assigning different serialization identifier to operations on different data set for execution in respective processor in multi-processor system .
Matthew Allen and Gurindar S. Sohi U.S. Patent 8,417,919. Issued April 9, 2013.

System and method for controlling excessive parallelism in multiprocessor systems .
Gurindar S. Sohi, Srinath Sridharan, and Gagan Gupta
U.S. Patent 8,843,932. Issued September 24, 2014.

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