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Ph.D. GraduatesShyam Murthy, Ph.D., August 2024, PDF Instruction Presending. Currently at Qualcomm, Santa Clara. Hongil Yoon, Ph.D., March 2017, PDF Reducing Address Translation Overheads with Virtual Caching. Currently at Google, Mountain View. Gagan Gupta, Ph.D., June 2015, PDF Semantically Ordered Parallel Execution of Multiprocessor Programs. Srinath Sridharan, Ph.D., October 2014, PDF Adaptive, Efficient Parallel Execution of Parallel Programs. Matthew Allen, Ph.D., September 2010, PDF Data-Driven Decomposition of Sequential Programs for Determinate Parallel Execution. Philip Wells, Ph.D., August 2008, PDF Adapting to Dynamic Heterogeneity: Virtualization for the Multicore Era. Currently at Google, Madison. Koushik Chakraborty, Ph.D., August 2008, PDF Over-provisioned Multicore Systems. Currently Associate Professor at Utah State University Jichuan Chang, Ph.D., August 2007, PDF Cooperative Caching for Chip Multiprocessors. Currently at Google, Mountain View. Saisanthosh Balakrishnan, Ph.D., June 2007, PDF Program Demultiplexing: Data-flow Based Speculative Parallelization of Methods in Sequential Programs. Currently at Google, Mountain View. J. Adam Butts, Ph.D., August 2004, PDF Postscript Optimizing Inter-Instruction Value Communication through Degree of Use Prediction. Currently at D.E. Shaw.
Craig Zilles,
Ph.D., August 2002,
PDF
Postscript
Master/Slave Speculative Parallelization and Approximate Code.
Currently Associate Professor at the University of Illinois.
Winner of NSF CAREER Award.
Amir Roth,
Ph.D., August 2001,
PDF
Postscript
Pre-Execution via Speculative Data-Driven Multithreading.
Winner of NSF CAREER Award.
Avinash Sodani,
Ph.D., April 2000,
PDF
Postscript
Dynamic Instruction Reuse.
Andreas Moshovos,
Ph.D., December 1998,
PDF
Memory Dependence Prediction.
Currently Professor at the University of Toronto.
Winner of NSF CAREER Award.
Scott Breach,
Ph.D., December 1998,
PDF
Postscript
Design and Evaluation of a Multiscalar Processor.
Currently at AMD.
T. N. Vijaykumar,
Ph.D., January 1998,
PDF
Postscript
Compiling for the Multiscalar Architecture.
Currently Professor at Purdue University.
Winner of NSF CAREER Award.
Todd Austin,
Ph.D., April 1996,
PDF
Postscript
Hardware and Software Mechanisms for Reducing Load Latency.
Currently Professor at the University of Michigan.
Winner of NSF CAREER Award and Sloan Research Fellowship.
Dionisios Pnevmatikatos,
Ph.D., December 1995,
PDF
Postscript
Incorporating Guarded Execution into Existing Instruction Sets.
Manoj Franklin,
Ph.D., December 1993,
PDF
Postscript
The Multiscalar Architecture.
Currently Associate Professor at the University of Maryland.
Winner of NSF CAREER Award.
Mark Friedman,
Ph.D., January 1992,
PDF
Postscript
An Architectural Characterization of Prolog Execution.
Sriram Vajapeyam,
Ph.D., December 1991,
PDF
Postscript
Instruction Level Characterization of the Cray Y-MP Processor.
Men-Chow Chiang,
Ph.D., September 1991,
PDF
Postscript
Memory System Design for Bus Based Multiprocessors.
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