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PerfectCacheMemory.hh
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28 
29 #ifndef __MEM_RUBY_STRUCTURES_PERFECTCACHEMEMORY_HH__
30 #define __MEM_RUBY_STRUCTURES_PERFECTCACHEMEMORY_HH__
31 
32 #include <unordered_map>
33 
34 #include "mem/protocol/AccessPermission.hh"
36 
37 template<class ENTRY>
39 {
40  PerfectCacheLineState() { m_permission = AccessPermission_NUM; }
41  AccessPermission m_permission;
42  ENTRY m_entry;
43 };
44 
45 template<class ENTRY>
46 inline std::ostream&
47 operator<<(std::ostream& out, const PerfectCacheLineState<ENTRY>& obj)
48 {
49  return out;
50 }
51 
52 template<class ENTRY>
54 {
55  public:
57 
58  // tests to see if an address is present in the cache
59  bool isTagPresent(Addr address) const;
60 
61  // Returns true if there is:
62  // a) a tag match on this address or there is
63  // b) an Invalid line in the same cache "way"
64  bool cacheAvail(Addr address) const;
65 
66  // find an Invalid entry and sets the tag appropriate for the address
67  void allocate(Addr address);
68 
69  void deallocate(Addr address);
70 
71  // Returns with the physical address of the conflicting cache line
72  Addr cacheProbe(Addr newAddress) const;
73 
74  // looks an address up in the cache
75  ENTRY* lookup(Addr address);
76  const ENTRY* lookup(Addr address) const;
77 
78  // Get/Set permission of cache block
79  AccessPermission getPermission(Addr address) const;
80  void changePermission(Addr address, AccessPermission new_perm);
81 
82  // Print cache contents
83  void print(std::ostream& out) const;
84 
85  private:
86  // Private copy constructor and assignment operator
89 
90  // Data Members (m_prefix)
91  std::unordered_map<Addr, PerfectCacheLineState<ENTRY> > m_map;
92 };
93 
94 template<class ENTRY>
95 inline std::ostream&
96 operator<<(std::ostream& out, const PerfectCacheMemory<ENTRY>& obj)
97 {
98  obj.print(out);
99  out << std::flush;
100  return out;
101 }
102 
103 template<class ENTRY>
104 inline
106 {
107 }
108 
109 // tests to see if an address is present in the cache
110 template<class ENTRY>
111 inline bool
113 {
114  return m_map.count(makeLineAddress(address)) > 0;
115 }
116 
117 template<class ENTRY>
118 inline bool
120 {
121  return true;
122 }
123 
124 // find an Invalid or already allocated entry and sets the tag
125 // appropriate for the address
126 template<class ENTRY>
127 inline void
129 {
130  PerfectCacheLineState<ENTRY> line_state;
131  line_state.m_permission = AccessPermission_Invalid;
132  line_state.m_entry = ENTRY();
133  m_map[makeLineAddress(address)] = line_state;
134 }
135 
136 // deallocate entry
137 template<class ENTRY>
138 inline void
140 {
141  m_map.erase(makeLineAddress(address));
142 }
143 
144 // Returns with the physical address of the conflicting cache line
145 template<class ENTRY>
146 inline Addr
148 {
149  panic("cacheProbe called in perfect cache");
150  return newAddress;
151 }
152 
153 // looks an address up in the cache
154 template<class ENTRY>
155 inline ENTRY*
157 {
158  return &m_map[makeLineAddress(address)].m_entry;
159 }
160 
161 // looks an address up in the cache
162 template<class ENTRY>
163 inline const ENTRY*
165 {
166  return &m_map[makeLineAddress(address)].m_entry;
167 }
168 
169 template<class ENTRY>
170 inline AccessPermission
172 {
173  return m_map[makeLineAddress(address)].m_permission;
174 }
175 
176 template<class ENTRY>
177 inline void
179  AccessPermission new_perm)
180 {
181  Addr line_address = makeLineAddress(address);
182  PerfectCacheLineState<ENTRY>& line_state = m_map[line_address];
183  line_state.m_permission = new_perm;
184 }
185 
186 template<class ENTRY>
187 inline void
188 PerfectCacheMemory<ENTRY>::print(std::ostream& out) const
189 {
190 }
191 
192 #endif // __MEM_RUBY_STRUCTURES_PERFECTCACHEMEMORY_HH__
bool cacheAvail(Addr address) const
void allocate(Addr address)
#define panic(...)
Definition: misc.hh:153
ENTRY * lookup(Addr address)
std::unordered_map< Addr, PerfectCacheLineState< ENTRY > > m_map
bool isTagPresent(Addr address) const
void deallocate(Addr address)
Addr cacheProbe(Addr newAddress) const
AccessPermission m_permission
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
AccessPermission getPermission(Addr address) const
Addr makeLineAddress(Addr addr)
Definition: Address.cc:112
void print(std::ostream &out) const
void changePermission(Addr address, AccessPermission new_perm)
PerfectCacheMemory & operator=(const PerfectCacheMemory &obj)

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