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decode_cache.hh
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30 
31 #ifndef __ARCH_GENERIC_DECODE_CACHE_HH__
32 #define __ARCH_GENERIC_DECODE_CACHE_HH__
33 
34 #include "arch/types.hh"
35 #include "config/the_isa.hh"
36 #include "cpu/decode_cache.hh"
37 #include "cpu/static_inst_fwd.hh"
38 
39 namespace TheISA
40 {
41  class Decoder;
42 }
43 
44 namespace GenericISA
45 {
46 
48 {
49  private:
52 
53  public:
57  StaticInstPtr decode(TheISA::Decoder * const decoder,
58  TheISA::ExtMachInst mach_inst, Addr addr);
59 };
60 
61 } // namespace GenericISA
62 
63 #endif // __ARCH_GENERIC_DECODE_CACHE_HH__
DecodeCache::AddrMap< StaticInstPtr > decodePages
Definition: decode_cache.hh:51
ip6_addr_t addr
Definition: inet.hh:335
DecodeCache::InstMap instMap
Definition: decode_cache.hh:50
std::unordered_map< TheISA::ExtMachInst, StaticInstPtr > InstMap
Hash for decoded instructions.
Definition: decode_cache.hh:50
StaticInstPtr decode(TheISA::Decoder *const decoder, TheISA::ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decode_cache.cc:42
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
uint64_t ExtMachInst
Definition: types.hh:41
A sparse map from an Addr to a Value, stored in page chunks.
Definition: decode_cache.hh:54

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