gem5
|
#include "arch/alpha/faults.hh"
#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/kernel_stats.hh"
#include "arch/alpha/osfpal.hh"
#include "arch/alpha/tlb.hh"
#include "base/cp_annotate.hh"
#include "base/debug.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
#include "sim/sim_exit.hh"
Go to the source code of this file.
Namespaces | |
AlphaISA | |
Functions | |
void | AlphaISA::initCPU (ThreadContext *tc, int cpuId) |
template<class CPU > | |
void | AlphaISA::zeroRegisters (CPU *cpu) |
void | AlphaISA::initIPRs (ThreadContext *tc, int cpuId) |
void | AlphaISA::copyIprs (ThreadContext *src, ThreadContext *dest) |
Variables | |
int | AlphaISA::break_ipl = -1 |