gem5
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ThreadContext is the external interface to all thread state for anything outside of the CPU. More...
#include <thread_context.hh>
Public Types | |
enum | Status { Active, Suspended, Halted } |
Public Member Functions | |
virtual | ~ThreadContext () |
virtual BaseCPU * | getCpuPtr ()=0 |
virtual int | cpuId () const =0 |
virtual uint32_t | socketId () const =0 |
virtual int | threadId () const =0 |
virtual void | setThreadId (int id)=0 |
virtual int | contextId () const =0 |
virtual void | setContextId (int id)=0 |
virtual TheISA::TLB * | getITBPtr ()=0 |
virtual TheISA::TLB * | getDTBPtr ()=0 |
virtual CheckerCPU * | getCheckerCpuPtr ()=0 |
virtual TheISA::Decoder * | getDecoderPtr ()=0 |
virtual System * | getSystemPtr ()=0 |
virtual TheISA::Kernel::Statistics * | getKernelStats ()=0 |
virtual PortProxy & | getPhysProxy ()=0 |
virtual FSTranslatingPortProxy & | getVirtProxy ()=0 |
virtual void | initMemProxies (ThreadContext *tc)=0 |
Initialise the physical and virtual port proxies and tie them to the data port of the CPU. More... | |
virtual SETranslatingPortProxy & | getMemProxy ()=0 |
virtual Process * | getProcessPtr ()=0 |
virtual void | setProcessPtr (Process *p)=0 |
virtual Status | status () const =0 |
virtual void | setStatus (Status new_status)=0 |
virtual void | activate ()=0 |
Set the status to Active. More... | |
virtual void | suspend ()=0 |
Set the status to Suspended. More... | |
virtual void | halt ()=0 |
Set the status to Halted. More... | |
void | quiesce () |
Quiesce thread context. More... | |
void | quiesceTick (Tick resume) |
Quiesce, suspend, and schedule activate at resume. More... | |
virtual void | dumpFuncProfile ()=0 |
virtual void | takeOverFrom (ThreadContext *old_context)=0 |
virtual void | regStats (const std::string &name)=0 |
virtual EndQuiesceEvent * | getQuiesceEvent ()=0 |
virtual Tick | readLastActivate ()=0 |
virtual Tick | readLastSuspend ()=0 |
virtual void | profileClear ()=0 |
virtual void | profileSample ()=0 |
virtual void | copyArchRegs (ThreadContext *tc)=0 |
virtual void | clearArchRegs ()=0 |
virtual uint64_t | readIntReg (int reg_idx)=0 |
virtual FloatReg | readFloatReg (int reg_idx)=0 |
virtual FloatRegBits | readFloatRegBits (int reg_idx)=0 |
virtual CCReg | readCCReg (int reg_idx)=0 |
virtual void | setIntReg (int reg_idx, uint64_t val)=0 |
virtual void | setFloatReg (int reg_idx, FloatReg val)=0 |
virtual void | setFloatRegBits (int reg_idx, FloatRegBits val)=0 |
virtual void | setCCReg (int reg_idx, CCReg val)=0 |
virtual TheISA::PCState | pcState ()=0 |
virtual void | pcState (const TheISA::PCState &val)=0 |
void | setNPC (Addr val) |
virtual void | pcStateNoRecord (const TheISA::PCState &val)=0 |
virtual Addr | instAddr ()=0 |
virtual Addr | nextInstAddr ()=0 |
virtual MicroPC | microPC ()=0 |
virtual MiscReg | readMiscRegNoEffect (int misc_reg) const =0 |
virtual MiscReg | readMiscReg (int misc_reg)=0 |
virtual void | setMiscRegNoEffect (int misc_reg, const MiscReg &val)=0 |
virtual void | setMiscReg (int misc_reg, const MiscReg &val)=0 |
virtual int | flattenIntIndex (int reg)=0 |
virtual int | flattenFloatIndex (int reg)=0 |
virtual int | flattenCCIndex (int reg)=0 |
virtual int | flattenMiscIndex (int reg)=0 |
virtual uint64_t | readRegOtherThread (int misc_reg, ThreadID tid) |
virtual void | setRegOtherThread (int misc_reg, const MiscReg &val, ThreadID tid) |
virtual unsigned | readStCondFailures ()=0 |
virtual void | setStCondFailures (unsigned sc_failures)=0 |
virtual Counter | readFuncExeInst ()=0 |
virtual void | syscall (int64_t callnum, Fault *fault)=0 |
virtual int | exit () |
virtual uint64_t | readIntRegFlat (int idx)=0 |
Flat register interfaces. More... | |
virtual void | setIntRegFlat (int idx, uint64_t val)=0 |
virtual FloatReg | readFloatRegFlat (int idx)=0 |
virtual void | setFloatRegFlat (int idx, FloatReg val)=0 |
virtual FloatRegBits | readFloatRegBitsFlat (int idx)=0 |
virtual void | setFloatRegBitsFlat (int idx, FloatRegBits val)=0 |
virtual CCReg | readCCRegFlat (int idx)=0 |
virtual void | setCCRegFlat (int idx, CCReg val)=0 |
Static Public Member Functions | |
static void | compare (ThreadContext *one, ThreadContext *two) |
function to compare two thread contexts (for debugging) More... | |
Protected Types | |
typedef TheISA::MachInst | MachInst |
typedef TheISA::IntReg | IntReg |
typedef TheISA::FloatReg | FloatReg |
typedef TheISA::FloatRegBits | FloatRegBits |
typedef TheISA::CCReg | CCReg |
typedef TheISA::MiscReg | MiscReg |
ThreadContext is the external interface to all thread state for anything outside of the CPU.
It provides all accessor methods to state that might be needed by external objects, ranging from register values to things such as kernel stats. It is an abstract base class; the CPU can create its own ThreadContext by either deriving from it, or using the templated ProxyThreadContext.
The ThreadContext is slightly different than the ExecContext. The ThreadContext provides access to an individual thread's state; an ExecContext provides ISA access to the CPU (meaning it is implicitly multithreaded on SMT systems). Additionally the ThreadState is an abstract class that exactly defines the interface; the ExecContext is a more implicit interface that must be implemented so that the ISA can access whatever state it needs.
Definition at line 93 of file thread_context.hh.
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Definition at line 100 of file thread_context.hh.
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Definition at line 98 of file thread_context.hh.
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Definition at line 99 of file thread_context.hh.
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Definition at line 97 of file thread_context.hh.
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Definition at line 96 of file thread_context.hh.
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Definition at line 101 of file thread_context.hh.
Definition at line 104 of file thread_context.hh.
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Definition at line 120 of file thread_context.hh.
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Set the status to Active.
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by cloneFunc(), execveFunc(), Process::initState(), EndQuiesceEvent::process(), DistIface::SyncEvent::process(), PowerISA::startupCPU(), AlphaISA::startupCPU(), SparcISA::startupCPU(), ArmISA::startupCPU(), X86ISA::startupCPU(), MipsISA::startupCPU(), and PseudoInst::wakeCPU().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by cloneFunc(), execveFunc(), and ArmISA::Reset::invoke().
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function to compare two thread contexts (for debugging)
Definition at line 58 of file thread_context.cc.
References contextId(), cpuId(), DPRINTF, ArmISA::i, AlphaISA::NumCCRegs, AlphaISA::NumFloatRegs, AlphaISA::NumIntRegs, AlphaISA::NumMiscRegs, panic, pcState(), readCCReg(), readFloatRegBits(), readIntReg(), readMiscRegNoEffect(), ArmISA::t1, and ArmISA::t2.
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by cloneFunc(), compare(), SimpleThread::copyState(), BaseKvmCPU::doMMIOAccess(), execveFunc(), X86ISA::TLB::finalizePhysical(), ArmISA::ISA::getGenericTimer(), ArmISA::getMPIDR(), X86KvmCPU::handleKvmExitIO(), BaseKvmCPU::init(), FullO3CPU< Impl >::init(), SparcISA::ISA::readFSReg(), CheckerCPU::readMem(), ArmISA::ISA::setMiscReg(), takeOverFrom(), X86ISA::GpuTLB::translate(), ArmISA::TLB::updateMiscReg(), and CheckerCPU::writeMem().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by takeOverFrom().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by compare(), ArmISA::getMPIDR(), DumpStatsPCEvent::process(), and Trace::InstPBTrace::traceInst().
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Definition at line 282 of file thread_context.hh.
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by AbstractMemory::checkLockedAddrList(), SparcISA::ISA::checkSoftInt(), KvmVM::contextIdToVCpuId(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), PseudoInst::dumpresetstats(), PseudoInst::dumpstats(), ArmISA::TableWalker::fetchDescriptor(), ArmISA::Stage2MMU::Stage2Translation::finish(), BaseRemoteGDB::getComInstEventQueue(), X86ISA::initCPU(), PseudoInst::initParam(), ArmISA::Reset::invoke(), ArmISA::AbortFault< T >::invoke(), ArmISA::SystemError::invoke(), ArmISA::ArmSev::invoke(), PseudoInst::loadsymbol(), PseudoInst::m5checkpoint(), Linux::openSpecialFile(), EndQuiesceEvent::process(), Linux::DmesgDumpEvent::process(), Linux::KernelPanicEvent::process(), DumpStatsPCEvent::process(), BreakPCEvent::process(), PanicPCEvent::process(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), quiesce(), PseudoInst::quiesceCycles(), PseudoInst::quiesceSkip(), quiesceTick(), AlphaISA::ISA::readIpr(), X86ISA::ISA::readMiscReg(), RiscvISA::ISA::readMiscReg(), ArmISA::ISA::readMiscReg(), SparcISA::ISA::readMiscReg(), PseudoInst::resetstats(), SparcISA::ISA::serialize(), LinuxAlphaSystem::setDelayLoop(), SparcISA::ISA::setFSReg(), X86ISA::ISA::setMiscReg(), MipsISA::ISA::setMiscReg(), SparcISA::ISA::setMiscReg(), LinuxArmSystem::startup(), takeOverFrom(), PseudoInst::workbegin(), and PseudoInst::workend().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by Minor::Fetch2::evaluate(), ArmISA::ISA::setMiscReg(), SparcISA::ISA::setMiscReg(), X86ISA::ISA::startup(), SimpleThread::takeOverFrom(), O3ThreadContext< class >::takeOverFrom(), and X86ISA::ISA::updateHandyM5Reg().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by X86ISA::RemoteGDB::acc(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), BaseKvmCPU::doMMIOAccess(), SparcISA::handleIprRead(), SparcISA::handleIprWrite(), AlphaISA::NDtbMissFault::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), X86ISA::PageFault::invoke(), mmapImpl(), AlphaISA::ISA::readIpr(), Minor::LSQ::SplitDataRequest::sendNextFragmentToTranslation(), AlphaISA::ISA::setIpr(), X86ISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), Minor::LSQ::SingleDataRequest::startAddrTranslation(), ArmISA::ISA::tlbiALL(), ArmISA::ISA::tlbiALLN(), ArmISA::ISA::tlbiMVA(), ArmISA::ISA::tlbiVA(), try_translate(), X86ISA::vtophys(), and SparcISA::vtophys().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), SparcISA::TLB::GetTsbPtr(), SparcISA::FastInstructionAccessMMUMiss::invoke(), AlphaISA::ItbPageFault::invoke(), X86ISA::PageFault::invoke(), mmapImpl(), AlphaISA::ISA::setIpr(), X86ISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), ArmISA::ISA::tlbiALL(), ArmISA::ISA::tlbiALLN(), ArmISA::ISA::tlbiMVA(), ArmISA::ISA::tlbiVA(), try_translate(), and SparcISA::vtophys().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by PseudoInst::arm(), IdleStartEvent::process(), quiesce(), quiesceTick(), SparcISA::ISA::setFSReg(), AlphaISA::ISA::setIpr(), SimpleThread::takeOverFrom(), and O3ThreadContext< class >::takeOverFrom().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by _llseekFunc(), accessFunc(), archPrctlFunc(), brkFunc(), chmodFunc(), chownFunc(), clock_getresFunc(), clock_gettimeFunc(), Process::clone(), cloneFunc(), execveFunc(), exitFutexWake(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), fstat64Func(), fstatat64Func(), fstatfsFunc(), fstatFunc(), futexFunc(), getcwdFunc(), gethostnameFunc(), SparcISA::getresuidFunc(), getrlimitFunc(), getrusageFunc(), gettimeofdayFunc(), ArmLinuxProcess32::initState(), ClDriver::ioctl(), lstat64Func(), lstatFunc(), X86ISA::m5PageFault(), mkdirFunc(), mmapImpl(), openImpl(), osf_getsysinfoFunc(), osf_setsysinfoFunc(), pipeImpl(), pwrite64Func(), BaseRemoteGDB::read(), readFunc(), readlinkFunc(), renameatFunc(), renameFunc(), Process::replicatePage(), setThreadArea32Func(), setTLSFunc32(), stat64Func(), statfsFunc(), statFunc(), sys_getsysinfoFunc(), sys_setsysinfoFunc(), sysctlFunc(), sysinfoFunc(), timeFunc(), timesFunc(), truncate64Func(), truncateFunc(), SparcISA::unameFunc(), unameFunc(), unameFunc32(), unameFunc64(), unlinkHelper(), utimesFunc(), BaseRemoteGDB::write(), writeFunc(), and writevFunc().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by AlphaISA::RemoteGDB::acc(), Linux::ThreadInfo::curThreadInfo(), SparcISA::vtophys(), and AlphaISA::vtophys().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by SparcISA::RemoteGDB::acc(), MipsISA::RemoteGDB::acc(), PowerISA::RemoteGDB::acc(), RiscvISA::RemoteGDB::acc(), X86ISA::RemoteGDB::acc(), ArmISA::RemoteGDB::acc(), cloneFunc(), GenericPageTableFault::invoke(), AlphaISA::NDtbMissFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), SparcISA::SpillNNormal::invoke(), AlphaISA::ItbPageFault::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), X86ISA::m5PageFault(), Shader::mmap(), ComputeUnit::sendRequest(), takeOverFrom(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), GenericTLB::translateAtomic(), RiscvISA::TLB::translateData(), MipsISA::TLB::translateData(), PowerISA::TLB::translateData(), RiscvISA::TLB::translateInst(), MipsISA::TLB::translateInst(), PowerISA::TLB::translateInst(), ArmISA::TLB::translateSe(), and X86ISA::GpuTLB::translationReturn().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by quiesceTick(), and takeOverFrom().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by PseudoInst::addsymbol(), SparcISA::TLB::doMmuRegWrite(), exitFutexWake(), exitImpl(), futexFunc(), ArmSystem::haveLargeAsid64(), ArmSystem::haveLPAE(), ArmSystem::haveSecurity(), ArmSystem::haveVirtualization(), ArmSystem::highestEL(), ArmSystem::highestELIs64(), X86System::initState(), ArmISA::Reset::invoke(), PseudoInst::loadsymbol(), ArmSystem::physAddrMask(), ArmSystem::physAddrRange(), FreebsdAlphaSystem::SkipCalibrateClocksEvent::process(), Linux::DebugPrintkEvent::process(), LinuxAlphaSystem::SkipDelayLoopEvent::process(), LinuxMipsSystem::SkipDelayLoopEvent::process(), DumpStatsPCEvent::process(), X86ISA::ProcessInfo::ProcessInfo(), AlphaISA::ProcessInfo::ProcessInfo(), ArmISA::ProcessInfo::ProcessInfo(), PseudoInst::readfile(), SparcISA::ISA::readFSReg(), ArmISA::ISA::readMiscReg(), ArmSystem::resetAddr64(), ArmISA::ISA::setMiscReg(), setpgidFunc(), takeOverFrom(), tgkillFunc(), ArmISA::ISA::tlbiALL(), ArmISA::ISA::tlbiALLN(), ArmISA::ISA::tlbiMVA(), ArmISA::ISA::tlbiVA(), DistIface::toggleSync(), AlphaISA::StackTrace::trace(), PseudoInst::wakeCPU(), PseudoInst::workbegin(), and PseudoInst::workend().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by CopyIn(), CopyOut(), CopyStringIn(), CopyStringOut(), AlphaISA::getArgument(), SparcISA::getArgument(), ArmISA::getArgument(), MipsISA::ProcessInfo::pid(), X86ISA::ProcessInfo::pid(), AlphaISA::ProcessInfo::pid(), ArmISA::ProcessInfo::pid(), X86ISA::ProcessInfo::ProcessInfo(), AlphaISA::ProcessInfo::ProcessInfo(), ArmISA::ProcessInfo::ProcessInfo(), BaseRemoteGDB::read(), VPtr< T >::refresh(), LinuxAlphaSystem::setDelayLoop(), MipsISA::ProcessInfo::task(), X86ISA::ProcessInfo::task(), AlphaISA::ProcessInfo::task(), ArmISA::ProcessInfo::task(), and BaseRemoteGDB::write().
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Set the status to Halted.
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by exitImpl().
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Initialise the physical and virtual port proxies and tie them to the data port of the CPU.
tc ThreadContext for the virtual-to-physical translation
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by BaseKvmCPU::init(), and MinorCPU::init().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by PCEventQueue::doService(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), Minor::Execute::tryPCEvents(), ArmV8KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), and X86KvmCPU::updateKvmStateRegs().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by Trace::ArmNativeTrace::check(), cloneFunc(), and DefaultCommit< Impl >::commitHead().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by AlphaProcess::argsInit(), MipsProcess::argsInit(), PowerProcess::argsInit(), RiscvProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), Trace::SparcNativeTrace::check(), AlphaISA::Interrupts::checkInterrupts(), cloneFunc(), BaseRemoteGDB::cmd_async_cont(), BaseRemoteGDB::cmd_async_step(), BaseRemoteGDB::cmd_cont(), BaseRemoteGDB::cmd_step(), Minor::Execute::commit(), compare(), PowerISA::copyRegs(), AlphaISA::copyRegs(), RiscvISA::copyRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), X86ISA::copyRegs(), MipsISA::copyRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), Minor::Execute::executeMemRefInst(), execveFunc(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), SparcProcess::handleTrap(), AlphaISA::initCPU(), X86ISA::initCPU(), X86System::initState(), FullO3CPU< Impl >::insertThread(), FaultBase::invoke(), AlphaISA::AlphaFault::invoke(), SparcISA::SparcFaultBase::invoke(), ReExec::invoke(), SyscallRetryFault::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::PowerOnReset::invoke(), RiscvISA::RiscvFault::invoke(), MipsISA::MipsFaultBase::invoke(), X86ISA::X86Trap::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), SparcISA::SpillNNormal::invoke(), ArmISA::Reset::invoke(), MipsISA::TlbFault< TlbInvalidFault >::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), ArmISA::SupervisorCall::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::FlushPipe::invoke(), ArmISA::ArmFault::invoke64(), RiscvISA::RiscvFault::invoke_se(), RiscvISA::UnknownInstFault::invoke_se(), RiscvISA::UnimplementedFault::invoke_se(), RiscvISA::IllegalFrmFault::invoke_se(), ioctlFunc(), mmapImpl(), SkipFuncEvent::process(), PseudoInst::pseudoInst(), ArmISA::ISA::readMiscReg(), serialize(), MipsISA::MipsFaultBase::setExceptionState(), ArmISA::ISA::setMiscReg(), setNPC(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), AlphaISA::skipFunction(), ArmISA::skipFunction(), SparcISA::skipFunction(), MipsISA::skipFunction(), X86ISA::I386Process::syscall(), AlphaISA::StackTrace::trace(), BaseRemoteGDB::trap(), Minor::Execute::tryPCEvents(), Minor::Execute::tryToBranch(), unserialize(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), ArmKvmCPU::updateTCStateCore(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContextRegs(), and Minor::Fetch1::wakeupFetch().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by ArmISA::ISA::setMiscReg(), and ArmISA::skipFunction().
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void ThreadContext::quiesce | ( | ) |
Quiesce thread context.
Definition at line 111 of file thread_context.cc.
References DPRINTF, getCpuPtr(), getKernelStats(), name(), and suspend().
Referenced by PseudoInst::quiesce(), and DistIface::toggleSync().
void ThreadContext::quiesceTick | ( | Tick | resume | ) |
Quiesce, suspend, and schedule activate at resume.
Definition at line 125 of file thread_context.cc.
References DPRINTF, getCpuPtr(), getKernelStats(), getQuiesceEvent(), and suspend().
Referenced by PseudoInst::quiesceCycles(), PseudoInst::quiesceNs(), PseudoInst::quiesceSkip(), and DistIface::toggleSync().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by compare(), ArmISA::copyRegs(), X86ISA::getRFlags(), ArmISA::ArmFault::invoke(), ArmISA::ArmFault::invoke64(), ArmISA::ISA::readMiscReg(), Trace::ArmNativeTrace::ThreadState::update(), and ArmV8KvmCPU::updateKvmState().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by X86ISA::copyRegs(), and serialize().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by updateKvmStateFPUCommon().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by compare(), PowerISA::copyRegs(), AlphaISA::copyRegs(), SparcISA::copyRegs(), AlphaISA::getArgument(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), ArmV8KvmCPU::updateKvmState(), and updateKvmStateFPUCommon().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by X86ISA::copyRegs(), serialize(), and ArmKvmCPU::updateKvmStateVFP().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by ArmISA::copyRegs(), and MipsISA::copyRegs().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by PowerISA::BranchRegCond::branchTarget(), Trace::SparcNativeTrace::check(), cloneFunc(), compare(), PowerISA::copyRegs(), AlphaISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), FreebsdAlphaSystem::doCalibrateClocks(), SparcISA::doNormalFault(), SparcISA::doREDFault(), TimingExprReadIntReg::eval(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), AlphaISA::getArgument(), SparcISA::getArgument(), X86ISA::getArgument(), ArmISA::getArgument(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), PowerLinuxProcess::getSyscallArg(), AlphaProcess::getSyscallArg(), PowerProcess::getSyscallArg(), MipsProcess::getSyscallArg(), RiscvProcess::getSyscallArg(), ArmProcess32::getSyscallArg(), ArmProcess64::getSyscallArg(), Sparc32Process::getSyscallArg(), X86ISA::X86_64Process::getSyscallArg(), Sparc64Process::getSyscallArg(), X86ISA::I386Process::getSyscallArg(), SparcISA::Sparc32LinuxProcess::handleTrap(), SparcISA::Sparc64LinuxProcess::handleTrap(), ArmISA::ArmFault::invoke(), ArmISA::SupervisorCall::invoke(), RiscvISA::SyscallFault::invoke_se(), X86ISA::m5Syscall(), DumpStatsPCEvent::process(), ArmISA::ISA::readMiscReg(), PowerProcess::setSyscallReturn(), SparcProcess::setSyscallReturn(), AlphaISA::skipFunction(), ArmISA::skipFunction(), SparcISA::skipFunction(), MipsISA::skipFunction(), AlphaISA::StackTrace::trace(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), and ArmV8KvmCPU::updateKvmState().
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Flat register interfaces.
Some architectures have different registers visible in different modes. Such architectures "flatten" a register (see flattenIntIndex() and flattenFloatIndex()) to map it into the gem5 register file. This interface provides a flat interface to the underlying register file, which allows for example serialization code to access all registers.
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by ArmISA::copyRegs(), X86ISA::copyRegs(), MipsISA::copyRegs(), ArmKvmCPU::onKvmExitHypercall(), serialize(), and ArmKvmCPU::updateKvmStateCore().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by PseudoInst::quiesceTime().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by PseudoInst::quiesceTime().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by MipsISA::MipsFaultBase::base(), ArmISA::canReadAArch64SysReg(), ArmISA::canWriteAArch64SysReg(), ArmISA::ArmStaticInst::checkAdvSIMDOrFPEnabled32(), ArmISA::ArmStaticInst::checkFPAdvSIMDTrap64(), ArmISA::Interrupts::checkInterrupts(), X86ISA::copyMiscRegs(), ArmISA::currEL(), ArmISA::currOpMode(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), ArmKvmCPU::dumpKvmStateCoProc(), ArmISA::PrefetchAbort::ec(), ArmISA::DataAbort::ec(), ArmISA::ELIs64(), ArmISA::flattenMiscRegNsBanked(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), SparcISA::RemoteGDB::gdbRegs(), ArmISA::getExecutingAsid(), ArmISA::Interrupts::getInterrupt(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::getRestoredITBits(), ArmISA::ArmFault::getVector(), ArmISA::ArmFault::getVector64(), X86ISA::handleIprRead(), ArmISA::illegalExceptionReturn(), ArmISA::inAArch64(), ArmProcess32::initState(), ArmProcess64::initState(), ArmISA::inSecureState(), MipsISA::inUserMode(), MipsISA::CoprocessorUnusableFault::invoke(), ArmISA::ArmFault::invoke(), ArmISA::Reset::invoke(), ArmISA::SupervisorCall::invoke(), X86ISA::InitInterrupt::invoke(), ArmISA::AbortFault< T >::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::ArmFault::invoke64(), ArmISA::isBigEndian64(), X86KvmCPU::kvmRunWrapper(), ArmISA::longDescFormatInUse(), X86ISA::m5PageFault(), X86ISA::m5Syscall(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), ArmISA::ArmFaultVals< T >::offset(), MipsISA::TlbRefillFault::offset(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkAArch64(), ArmISA::TableWalker::processWalkLPAE(), ArmISA::purifyTaggedAddr(), MipsISA::MipsFaultBase::setExceptionState(), ArmISA::ISA::setMiscReg(), MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), ArmISA::SPAlignmentCheckEnabled(), ArmV8KvmCPU::startup(), ArmISA::Interrupts::takeInt(), Trace::ArmNativeTrace::ThreadState::update(), ArmV8KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateMSRs(), X86KvmCPU::updateKvmStateRegs(), X86KvmCPU::updateKvmStateSRegs(), ArmKvmCPU::updateKvmStateVFP(), ArmISA::TLB::updateMiscReg(), and ArmISA::TableWalker::walk().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by ArmISA::AbortFault< T >::abortDisable(), ArmISA::Interrupt::abortDisable(), ArmISA::FastInterrupt::abortDisable(), AlphaISA::RemoteGDB::acc(), archPrctlFunc(), MipsISA::Interrupts::checkInterrupts(), SparcISA::Interrupts::checkInterrupts(), AlphaISA::Interrupts::checkInterrupts(), X86ISA::Interrupts::checkInterrupts(), compare(), AlphaISA::copyIprs(), SparcISA::copyMiscRegs(), AlphaISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), MipsISA::copyRegs(), Linux::ThreadInfo::curThreadInfo(), SparcISA::doNormalFault(), SparcISA::doREDFault(), ArmKvmCPU::dumpKvmStateCoProc(), SparcISA::enterREDState(), X86ISA::TLB::finalizePhysical(), ArmISA::FastInterrupt::fiqDisable(), X86ISA::RemoteGDB::gdbRegs(), MipsISA::getCauseIP(), SparcISA::getExecutingAsid(), AlphaISA::getExecutingAsid(), ArmISA::AbortFault< T >::getFsr(), SparcISA::getHyperVector(), MipsISA::Interrupts::getInterrupt(), AlphaISA::Interrupts::getInterrupt(), SparcISA::Interrupts::getInterrupt(), SparcISA::getPrivVector(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), X86ISA::getRFlags(), ArmISA::ArmFault::getVector(), X86KvmCPU::handleIOMiscReg32(), X86ISA::handleIprWrite(), X86KvmCPU::handleKvmExitIO(), AlphaISA::initCPU(), X86System::initState(), MipsISA::Interrupts::interruptsPending(), AlphaISA::inUserMode(), SparcISA::inUserMode(), X86ISA::inUserMode(), ArmISA::inUserMode(), AlphaISA::AlphaFault::invoke(), SparcISA::SparcFaultBase::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::PowerOnReset::invoke(), MipsISA::ResetFault::invoke(), AlphaISA::DtbFault::invoke(), ArmISA::ArmFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), AlphaISA::ItbFault::invoke(), X86ISA::PageFault::invoke(), ArmISA::VirtualDataAbort::invoke(), AlphaISA::StackTrace::isEntry(), AlphaISA::Kernel::Statistics::mode(), MipsISA::InterruptFault::offset(), MipsISA::Interrupts::onCpuTimerInterrupt(), X86ISA::GpuTLB::pagingProtectionChecks(), IdleStartEvent::process(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), ArmISA::UndefinedInstruction::routeToHyp(), ArmISA::SupervisorCall::routeToHyp(), ArmISA::PrefetchAbort::routeToHyp(), ArmISA::DataAbort::routeToHyp(), ArmISA::Interrupt::routeToHyp(), ArmISA::FastInterrupt::routeToHyp(), ArmISA::SystemError::routeToHyp(), ArmISA::PrefetchAbort::routeToMonitor(), ArmISA::DataAbort::routeToMonitor(), ArmISA::Interrupt::routeToMonitor(), ArmISA::FastInterrupt::routeToMonitor(), ArmISA::SystemError::routeToMonitor(), MipsISA::setCauseIP(), setKvmDTableReg(), setKvmSegmentReg(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), SparcProcess::setSyscallReturn(), X86ISA::GpuTLB::tlbLookup(), AlphaISA::StackTrace::trace(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), AlphaISA::TLB::translateData(), SparcISA::TLB::translateData(), AlphaISA::TLB::translateInst(), SparcISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), Trace::ArmNativeTrace::ThreadState::update(), ArmKvmCPU::updateKvmStateCoProc(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateFPULegacy(), X86KvmCPU::updateKvmStateFPUXSave(), ArmKvmCPU::updateTCStateCore(), SparcISA::vtophys(), and AlphaISA::vtophys().
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Definition at line 258 of file thread_context.hh.
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pure virtual |
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pure virtual |
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by ArmISA::copyRegs(), ArmISA::ISA::setMiscReg(), X86ISA::setRFlags(), ArmProcess32::setSyscallReturn(), ArmProcess64::setSyscallReturn(), and ArmV8KvmCPU::updateThreadContext().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by X86ISA::copyRegs(), and unserialize().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by takeOverFrom().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by updateThreadContextFPUCommon().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by PowerISA::copyRegs(), AlphaISA::copyRegs(), SparcISA::copyRegs(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), ArmV8KvmCPU::updateThreadContext(), and updateThreadContextFPUCommon().
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Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by X86ISA::copyRegs(), unserialize(), and ArmKvmCPU::updateTCStateVFP().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by ArmISA::copyRegs(), and MipsISA::copyRegs().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by AlphaProcess::argsInit(), MipsProcess::argsInit(), PowerProcess::argsInit(), RiscvProcess::argsInit(), SparcProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), cloneFunc(), PowerISA::copyRegs(), AlphaISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), getgidPseudoFunc(), getpidPseudoFunc(), getuidPseudoFunc(), AlphaISA::initCPU(), X86ISA::initCPU(), AlphaProcess::initState(), SparcProcess::initState(), X86ISA::X86FaultBase::invoke(), ArmISA::ArmFault::invoke(), X86ISA::InitInterrupt::invoke(), pipeImpl(), ArmISA::ISA::setMiscReg(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), PowerLinuxProcess::setSyscallArg(), AlphaProcess::setSyscallArg(), PowerProcess::setSyscallArg(), MipsProcess::setSyscallArg(), RiscvProcess::setSyscallArg(), ArmProcess32::setSyscallArg(), ArmProcess64::setSyscallArg(), Sparc32Process::setSyscallArg(), X86ISA::X86_64Process::setSyscallArg(), Sparc64Process::setSyscallArg(), X86ISA::I386Process::setSyscallArg(), AlphaProcess::setSyscallReturn(), PowerProcess::setSyscallReturn(), MipsProcess::setSyscallReturn(), RiscvProcess::setSyscallReturn(), SparcProcess::setSyscallReturn(), ArmProcess32::setSyscallReturn(), X86ISA::X86Process::setSyscallReturn(), ArmProcess64::setSyscallReturn(), and ArmV8KvmCPU::updateThreadContext().
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pure virtual |
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by cloneFunc(), SparcISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), SparcISA::TLB::doMmuRegWrite(), SparcISA::doNormalFault(), SparcISA::doREDFault(), SparcISA::enterREDState(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), X86KvmCPU::handleIOMiscReg32(), X86ISA::handleIprWrite(), X86ISA::initCPU(), SparcProcess::initState(), ArmProcess32::initState(), ArmProcess64::initState(), X86System::initState(), Sparc32Process::initState(), X86ISA::X86_64Process::initState(), Sparc64Process::initState(), X86ISA::I386Process::initState(), X86ISA::installSegDesc(), SparcISA::PowerOnReset::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), ArmISA::Reset::invoke(), X86ISA::PageFault::invoke(), X86ISA::InitInterrupt::invoke(), ArmISA::AbortFault< T >::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::PCAlignmentFault::invoke(), ArmISA::ArmSev::invoke(), ArmISA::ArmFault::invoke64(), X86KvmCPU::kvmRunWrapper(), X86ISA::m5Syscall(), setContextSegment(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), X86ISA::setRFlags(), ArmISA::ArmFault::setSyndrome(), setTLSFunc32(), setTLSFunc64(), ArmKvmCPU::updateTCStateCore(), ArmKvmCPU::updateTCStateVFP(), X86KvmCPU::updateThreadContext(), and X86KvmCPU::updateThreadContextMSRs().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by archPrctlFunc(), cloneFunc(), AlphaISA::copyIprs(), SparcISA::copyMiscRegs(), AlphaISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), MipsISA::copyRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), AlphaISA::initIPRs(), AlphaProcess::initState(), SparcProcess::initState(), X86ISA::X86_64Process::initState(), X86ISA::I386Process::initState(), AlphaISA::AlphaFault::invoke(), SparcISA::PowerOnReset::invoke(), AlphaISA::DtbFault::invoke(), MipsISA::CoprocessorUnusableFault::invoke(), ArmISA::ArmFault::invoke(), MipsISA::AddressFault< TlbInvalidFault >::invoke(), AlphaISA::ItbFault::invoke(), ArmISA::VirtualDataAbort::invoke(), MipsISA::setCauseIP(), MipsISA::MipsFaultBase::setExceptionState(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), setThreadAreaFunc(), MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), AlphaProcess::setupASNReg(), AlphaISA::Interrupts::updateIntrInfo(), ArmKvmCPU::updateTCStateCoProc(), ArmKvmCPU::updateTCStateCore(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContextFPU(), updateThreadContextFPUCommon(), and X86KvmCPU::updateThreadContextXSave().
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inline |
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by cloneFunc(), and execveFunc().
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inlinevirtual |
Definition at line 264 of file thread_context.hh.
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by FullO3CPU< Impl >::insertThread(), and takeOverFrom().
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pure virtual |
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by takeOverFrom().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by ArmISA::getMPIDR().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by Minor::Execute::commitInst(), SimpleThread::copyState(), BaseKvmCPU::drainResume(), Shader::hostWakeUp(), DistIface::SyncEvent::process(), SparcISA::ISA::processHSTickCompare(), SparcISA::ISA::processSTickCompare(), takeOverFrom(), DistIface::toggleSync(), Minor::Execute::tryToBranch(), and PseudoInst::wakeCPU().
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pure virtual |
Set the status to Suspended.
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, CheckerThreadContext< TC >, and O3ThreadContext< class >.
Referenced by quiesce(), quiesceTick(), SparcISA::ISA::setFSReg(), X86ISA::startupCPU(), and FutexMap::suspend().
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by SparcISA::Sparc32LinuxProcess::handleTrap(), SparcISA::Sparc64LinuxProcess::handleTrap(), ArmISA::SupervisorCall::invoke(), RiscvISA::SyscallFault::invoke_se(), and X86ISA::m5Syscall().
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pure virtual |
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pure virtual |
Implemented in ProxyThreadContext< TC >, ProxyThreadContext< SimpleThread >, O3ThreadContext< class >, and CheckerThreadContext< TC >.
Referenced by AbstractMemory::checkLockedAddrList(), SimpleThread::copyState(), BaseRemoteGDB::getComInstEventQueue(), Shader::hostWakeUp(), ArmISA::Reset::invoke(), ArmISA::AbortFault< T >::invoke(), ArmISA::SystemError::invoke(), ArmISA::ArmSev::invoke(), ArmISA::ISA::readMiscReg(), and takeOverFrom().