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utility.cc
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1 /*
2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
3  * Copyright (c) 2007-2008 The Florida State University
4  * Copyright (c) 2009 The University of Edinburgh
5  * All rights reserved.
6  *
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8  * modification, are permitted provided that the following conditions are
9  * met: redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer;
11  * redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
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14  * neither the name of the copyright holders nor the names of its
15  * contributors may be used to endorse or promote products derived from
16  * this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29  *
30  * Authors: Korey Sewell
31  * Stephen Hines
32  * Timothy M. Jones
33  */
34 
35 #include "arch/power/utility.hh"
36 
37 #include "base/misc.hh"
38 
39 namespace PowerISA {
40 
41 void
43 {
44  // First loop through the integer registers.
45  for (int i = 0; i < NumIntRegs; ++i)
46  dest->setIntReg(i, src->readIntReg(i));
47 
48  // Then loop through the floating point registers.
49  for (int i = 0; i < NumFloatRegs; ++i)
50  dest->setFloatRegBits(i, src->readFloatRegBits(i));
51 
52  // Would need to add condition-code regs if implemented
53  assert(NumCCRegs == 0);
54 
55  // Copy misc. registers
56  copyMiscRegs(src, dest);
57 
58  // Lastly copy PC/NPC
59  dest->pcState(src->pcState());
60 }
61 
62 uint64_t
63 getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
64 {
65  panic("getArgument not implemented for POWER.\n");
66  return 0;
67 }
68 
69 void
71 {
72  panic("Not Implemented for POWER");
73 }
74 
75 void
76 initCPU(ThreadContext *tc, int cpuId)
77 {
78  panic("initCPU not implemented for POWER.\n");
79 }
80 
81 
82 } // namespace PowerISA
Bitfield< 7 > i
Definition: miscregs.hh:1378
#define panic(...)
Definition: misc.hh:153
const int NumCCRegs
Definition: registers.hh:70
Bitfield< 0 > fp
virtual void setIntReg(int reg_idx, uint64_t val)=0
virtual FloatRegBits readFloatRegBits(int reg_idx)=0
virtual TheISA::PCState pcState()=0
ThreadContext is the external interface to all thread state for anything outside of the CPU...
virtual void setFloatRegBits(int reg_idx, FloatRegBits val)=0
uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
Definition: utility.cc:63
virtual uint64_t readIntReg(int reg_idx)=0
void skipFunction(ThreadContext *tc)
Definition: utility.cc:70
const int NumFloatRegs
Definition: registers.hh:69
void initCPU(ThreadContext *tc, int cpuId)
Definition: utility.cc:76
int size()
Definition: pagetable.hh:146
void copyRegs(ThreadContext *src, ThreadContext *dest)
Definition: utility.cc:42
static void copyMiscRegs(ThreadContext *src, ThreadContext *dest)
Definition: utility.hh:69
const int NumIntRegs
Definition: registers.hh:68

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