MipsISA Namespace Reference

Namespaces
	Kernel

Classes
class	Decoder
class	MipsFaultBase
class	MipsFault
class	SystemCallFault
class	ReservedInstructionFault
class	ThreadFault
class	IntegerOverflowFault
class	TrapFault
class	BreakpointFault
class	DspStateDisabledFault
class	MachineCheckFault
class	ResetFault
class	SoftResetFault
class	NonMaskableInterrupt
class	CoprocessorUnusableFault
class	InterruptFault
class	AddressFault
class	AddressErrorFault
class	TlbFault
class	TlbRefillFault
class	TlbInvalidFault
class	TlbModifiedFault
class	Interrupts
class	ISA
struct	VAddr
struct	PTE
struct	TlbEntry
union	AnyReg
class	RemoteGDB
class	ProcessInfo
class	StackTrace
class	TLB
struct	CoreSpecific

Typedefs
typedef MipsFaultBase::FaultVals	FaultVals
typedef Addr	FaultVect
typedef uint16_t	RegIndex
typedef uint32_t	IntReg
typedef uint32_t	FloatRegBits
typedef float	FloatReg
typedef uint64_t	MiscReg
typedef uint8_t	CCReg
typedef uint32_t	MachInst
typedef uint64_t	ExtMachInst
typedef GenericISA::DelaySlotPCState < MachInst >	PCState

Enumerations
enum	{   SIMD_FMT_L, SIMD_FMT_W, SIMD_FMT_PH, SIMD_FMT_QB,   SIMD_NUM_FMTS }
enum	{   DSP_POS, DSP_SCOUNT, DSP_C, DSP_OUFLAG,   DSP_CCOND, DSP_EFI, DSP_NUM_FIELDS }
enum	{ CMP_EQ, CMP_LT, CMP_LE }
enum	{   MODE_L, MODE_R, MODE_LA, MODE_RA,   MODE_X }
enum	{ UNSIGNED, SIGNED }
enum	{ NOSATURATE, SATURATE }
enum	{ NOROUND, ROUND }
enum	ExcCode {   ExcCodeDummy = 0, ExcCodeInt = 0, ExcCodeMod = 1, ExcCodeTlbL = 2,   ExcCodeTlbS = 3, ExcCodeAdEL = 4, ExcCodeAdES = 5, ExcCodeIBE = 6,   ExcCodeDBE = 7, ExcCodeSys = 8, ExcCodeBp = 9, ExcCodeRI = 10,   ExcCodeCpU = 11, ExcCodeOv = 12, ExcCodeTr = 13, ExcCodeC2E = 18,   ExcCodeMDMX = 22, ExcCodeWatch = 23, ExcCodeMCheck = 24, ExcCodeThread = 25,   ExcCodeCacheErr = 30 }
enum	InterruptLevels {   INTLEVEL_SOFTWARE_MIN = 4, INTLEVEL_SOFTWARE_MAX = 19, INTLEVEL_EXTERNAL_MIN = 20, INTLEVEL_EXTERNAL_MAX = 34,   INTLEVEL_IRQ0 = 20, INTLEVEL_IRQ1 = 21, INTINDEX_ETHERNET = 0, INTINDEX_SCSI = 1,   INTLEVEL_IRQ2 = 22, INTLEVEL_IRQ3 = 23, INTLEVEL_SERIAL = 33, NumInterruptLevels = INTLEVEL_EXTERNAL_MAX }
enum	mode_type {   mode_kernel = 0, mode_supervisor = 1, mode_user = 2, mode_debug = 3,   mode_number }
enum	FPControlRegNums {   FLOATREG_FIR = NumFloatArchRegs, FLOATREG_FCCR, FLOATREG_FEXR, FLOATREG_FENR,   FLOATREG_FCSR }
enum	FCSRBits {   Inexact = 1, Underflow, Overflow, DivideByZero,   Invalid, Unimplemented }
enum	FCSRFields { Flag_Field = 1, Enable_Field = 6, Cause_Field = 11 }
enum	MiscIntRegNums {   INTREG_LO = NumIntArchRegs, INTREG_DSP_LO0 = INTREG_LO, INTREG_HI, INTREG_DSP_HI0 = INTREG_HI,   INTREG_DSP_ACX0, INTREG_DSP_LO1, INTREG_DSP_HI1, INTREG_DSP_ACX1,   INTREG_DSP_LO2, INTREG_DSP_HI2, INTREG_DSP_ACX2, INTREG_DSP_LO3,   INTREG_DSP_HI3, INTREG_DSP_ACX3, INTREG_DSP_CONTROL }
enum	MiscRegIndex {   MISCREG_INDEX = 0, MISCREG_MVP_CONTROL, MISCREG_MVP_CONF0, MISCREG_MVP_CONF1,   MISCREG_CP0_RANDOM = 8, MISCREG_VPE_CONTROL, MISCREG_VPE_CONF0, MISCREG_VPE_CONF1,   MISCREG_YQMASK, MISCREG_VPE_SCHEDULE, MISCREG_VPE_SCHEFBACK, MISCREG_VPE_OPT,   MISCREG_ENTRYLO0 = 16, MISCREG_TC_STATUS, MISCREG_TC_BIND, MISCREG_TC_RESTART,   MISCREG_TC_HALT, MISCREG_TC_CONTEXT, MISCREG_TC_SCHEDULE, MISCREG_TC_SCHEFBACK,   MISCREG_ENTRYLO1 = 24, MISCREG_CONTEXT = 32, MISCREG_CONTEXT_CONFIG, MISCREG_PAGEMASK = 40,   MISCREG_PAGEGRAIN = 41, MISCREG_WIRED = 48, MISCREG_SRS_CONF0, MISCREG_SRS_CONF1,   MISCREG_SRS_CONF2, MISCREG_SRS_CONF3, MISCREG_SRS_CONF4, MISCREG_HWRENA = 56,   MISCREG_BADVADDR = 64, MISCREG_COUNT = 72, MISCREG_ENTRYHI = 80, MISCREG_COMPARE = 88,   MISCREG_STATUS = 96, MISCREG_INTCTL, MISCREG_SRSCTL, MISCREG_SRSMAP,   MISCREG_CAUSE = 104, MISCREG_EPC = 112, MISCREG_PRID = 120, MISCREG_EBASE,   MISCREG_CONFIG = 128, MISCREG_CONFIG1, MISCREG_CONFIG2, MISCREG_CONFIG3,   MISCREG_CONFIG4, MISCREG_CONFIG5, MISCREG_CONFIG6, MISCREG_CONFIG7,   MISCREG_LLADDR = 136, MISCREG_WATCHLO0 = 144, MISCREG_WATCHLO1, MISCREG_WATCHLO2,   MISCREG_WATCHLO3, MISCREG_WATCHLO4, MISCREG_WATCHLO5, MISCREG_WATCHLO6,   MISCREG_WATCHLO7, MISCREG_WATCHHI0 = 152, MISCREG_WATCHHI1, MISCREG_WATCHHI2,   MISCREG_WATCHHI3, MISCREG_WATCHHI4, MISCREG_WATCHHI5, MISCREG_WATCHHI6,   MISCREG_WATCHHI7, MISCREG_XCCONTEXT64 = 160, MISCREG_DEBUG = 184, MISCREG_TRACE_CONTROL1,   MISCREG_TRACE_CONTROL2, MISCREG_USER_TRACE_DATA, MISCREG_TRACE_BPC, MISCREG_DEPC = 192,   MISCREG_PERFCNT0 = 200, MISCREG_PERFCNT1, MISCREG_PERFCNT2, MISCREG_PERFCNT3,   MISCREG_PERFCNT4, MISCREG_PERFCNT5, MISCREG_PERFCNT6, MISCREG_PERFCNT7,   MISCREG_ERRCTL = 208, MISCREG_CACHEERR0 = 216, MISCREG_CACHEERR1, MISCREG_CACHEERR2,   MISCREG_CACHEERR3, MISCREG_TAGLO0 = 224, MISCREG_DATALO1, MISCREG_TAGLO2,   MISCREG_DATALO3, MISCREG_TAGLO4, MISCREG_DATALO5, MISCREG_TAGLO6,   MISCREG_DATALO7, MISCREG_TAGHI0 = 232, MISCREG_DATAHI1, MISCREG_TAGHI2,   MISCREG_DATAHI3, MISCREG_TAGHI4, MISCREG_DATAHI5, MISCREG_TAGHI6,   MISCREG_DATAHI7, MISCREG_ERROR_EPC = 240, MISCREG_DESAVE = 248, MISCREG_LLFLAG = 257,   MISCREG_TP_VALUE, MISCREG_NUMREGS }
enum	ConvertType {   SINGLE_TO_DOUBLE, SINGLE_TO_WORD, SINGLE_TO_LONG, DOUBLE_TO_SINGLE,   DOUBLE_TO_WORD, DOUBLE_TO_LONG, LONG_TO_SINGLE, LONG_TO_DOUBLE,   LONG_TO_WORD, LONG_TO_PS, WORD_TO_SINGLE, WORD_TO_DOUBLE,   WORD_TO_LONG, WORD_TO_PS, PL_TO_SINGLE, PU_TO_SINGLE }
enum	RoundMode { RND_ZERO, RND_DOWN, RND_UP, RND_NEAREST }

Functions
int32_t	bitrev (int32_t value)
uint64_t	dspSaturate (uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow)
uint64_t	checkOverflow (uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow)
uint64_t	signExtend (uint64_t value, int32_t signpos)
uint64_t	addHalfLsb (uint64_t value, int32_t lsbpos)
int32_t	dspAbs (int32_t a, int32_t fmt, uint32_t *dspctl)
int32_t	dspAdd (int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl)
int32_t	dspAddh (int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign)
int32_t	dspSub (int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl)
int32_t	dspSubh (int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign)
int32_t	dspShll (int32_t a, uint32_t sa, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl)
int32_t	dspShrl (int32_t a, uint32_t sa, int32_t fmt, int32_t sign)
int32_t	dspShra (int32_t a, uint32_t sa, int32_t fmt, int32_t round, int32_t sign, uint32_t *dspctl)
int32_t	dspMul (int32_t a, int32_t b, int32_t fmt, int32_t saturate, uint32_t *dspctl)
int32_t	dspMulq (int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t round, uint32_t *dspctl)
int32_t	dspMuleu (int32_t a, int32_t b, int32_t mode, uint32_t *dspctl)
int32_t	dspMuleq (int32_t a, int32_t b, int32_t mode, uint32_t *dspctl)
int64_t	dspDpaq (int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl)
int64_t	dspDpsq (int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl)
int64_t	dspDpa (int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, int32_t sign, int32_t mode)
int64_t	dspDps (int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, int32_t sign, int32_t mode)
int64_t	dspMaq (int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, int32_t mode, int32_t saturate, uint32_t *dspctl)
int64_t	dspMulsa (int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt)
int64_t	dspMulsaq (int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, uint32_t *dspctl)
void	dspCmp (int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl)
int32_t	dspCmpg (int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op)
int32_t	dspCmpgd (int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl)
int32_t	dspPrece (int32_t a, int32_t infmt, int32_t insign, int32_t outfmt, int32_t outsign, int32_t mode)
int32_t	dspPrecrqu (int32_t a, int32_t b, uint32_t *dspctl)
int32_t	dspPrecrq (int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl)
int32_t	dspPrecrSra (int32_t a, int32_t b, int32_t sa, int32_t fmt, int32_t round)
int32_t	dspPick (int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl)
int32_t	dspPack (int32_t a, int32_t b, int32_t fmt)
int32_t	dspExtr (int64_t dspac, int32_t fmt, int32_t sa, int32_t round, int32_t saturate, uint32_t *dspctl)
int32_t	dspExtp (int64_t dspac, int32_t size, uint32_t *dspctl)
int32_t	dspExtpd (int64_t dspac, int32_t size, uint32_t *dspctl)
void	simdPack (uint64_t *values_ptr, int32_t *reg, int32_t fmt)
void	simdUnpack (int32_t reg, uint64_t *values_ptr, int32_t fmt, int32_t sign)
void	writeDSPControl (uint32_t *dspctl, uint32_t value, uint32_t mask)
uint32_t	readDSPControl (uint32_t *dspctl, uint32_t mask)
	BitUnion32 (DebugReg) Bitfield< 31 > dbd
	SubBitUnion (ejtagVer, 17, 15) Bitfield< 17 > ejtagVer2
	EndSubBitUnion (ejtagVer) Bitfield< 14
	EndBitUnion (DebugReg) BitUnion32(TraceControlReg) Bitfield< 31 > ts
	EndBitUnion (TraceControlReg) BitUnion32(TraceControl2Reg) Bitfield< 29 > cpuidv
	EndBitUnion (TraceControl2Reg) BitUnion32(TraceBPCReg) Bitfield< 31 > mb
	EndBitUnion (TraceBPCReg) BitUnion32(TraceBPC2Reg) Bitfield< 17
	EndBitUnion (TraceBPC2Reg) BitUnion32(Debug2Reg) Bitfield< 3 > prm
static uint8_t	getCauseIP (ThreadContext *tc)
static void	setCauseIP (ThreadContext *tc, uint8_t val)
StaticInstPtr	decodeInst (ExtMachInst)
Addr	Phys2K0Seg (Addr addr)
Addr	VAddrImpl (Addr a)
Addr	VAddrVPN (Addr a)
Addr	VAddrOffset (Addr a)
template<class XC >
void	handleLockedSnoop (XC *xc, PacketPtr pkt, Addr cacheBlockMask)
template<class XC >
void	handleLockedRead (XC *xc, Request *req)
template<class XC >
void	handleLockedSnoopHit (XC *xc)
template<class XC >
bool	handleLockedWrite (XC *xc, Request *req, Addr cacheBlockMask)
template<class TC >
unsigned	getVirtProcNum (TC *tc)
template<class TC >
unsigned	getTargetThread (TC *tc)
template<class TC >
void	haltThread (TC *tc)
template<class TC >
void	restoreThread (TC *tc)
template<class TC >
void	forkThread (TC *tc, Fault &fault, int Rd_bits, int Rs, int Rt)
template<class TC >
int	yieldThread (TC *tc, Fault &fault, int src_reg, uint32_t yield_mask)
template<class TC >
void	updateStatusView (TC *tc)
template<class TC >
void	updateTCStatusView (TC *tc)
	BitUnion32 (MVPControlReg) Bitfield< 3 > cpa
	EndBitUnion (MVPControlReg) BitUnion32(MVPConf0Reg) Bitfield< 31 > m
	EndBitUnion (MVPConf0Reg) BitUnion32(VPEControlReg) Bitfield< 21 > ysi
	EndBitUnion (VPEControlReg) BitUnion32(VPEConf0Reg) Bitfield< 31 > m
	EndBitUnion (VPEConf0Reg) BitUnion32(TCBindReg) Bitfield< 28
	EndBitUnion (TCBindReg) BitUnion32(TCStatusReg) Bitfield< 31
	EndBitUnion (TCStatusReg) BitUnion32(TCHaltReg) Bitfield< 0 > h
	BitUnion32 (IndexReg) Bitfield< 31 > p
	EndBitUnion (IndexReg) BitUnion32(RandomReg) Bitfield< 30
	EndBitUnion (RandomReg) BitUnion64(EntryLoReg) Bitfield< 63
	EndBitUnion (EntryLoReg) BitUnion64(ContextReg) Bitfield< 63
	EndBitUnion (ContextReg) BitUnion32(PageMaskReg) Bitfield< 28
	EndBitUnion (PageMaskReg) BitUnion32(PageGrainReg) Bitfield< 31
	EndBitUnion (PageGrainReg) BitUnion32(WiredReg) Bitfield< 30
	EndBitUnion (WiredReg) BitUnion32(HWREnaReg) Bitfield< 31
	EndBitUnion (HWREnaReg) BitUnion64(EntryHiReg) Bitfield< 63
	EndBitUnion (EntryHiReg) BitUnion32(StatusReg) SubBitUnion(cu
	EndSubBitUnion (cu) Bitfield< 27 > rp
	SubBitUnion (im, 15, 8) Bitfield< 15 > im7
	EndSubBitUnion (im) Bitfield< 7 > kx
	EndBitUnion (StatusReg) BitUnion32(IntCtlReg) Bitfield< 31
	EndBitUnion (IntCtlReg) BitUnion32(SRSCtlReg) Bitfield< 29
	EndBitUnion (SRSCtlReg) BitUnion32(SRSMapReg) Bitfield< 31
	EndBitUnion (SRSMapReg) BitUnion32(CauseReg) Bitfield< 31 > bd
	SubBitUnion (ip, 15, 8) Bitfield< 15 > ip7
	EndSubBitUnion (ip)
	EndBitUnion (CauseReg) BitUnion32(PRIdReg) Bitfield< 31
	EndBitUnion (PRIdReg) BitUnion32(EBaseReg) Bitfield< 29
	EndBitUnion (EBaseReg) BitUnion32(ConfigReg) Bitfield< 31 > m
	EndBitUnion (ConfigReg) BitUnion32(Config1Reg) Bitfield< 31 > m
	EndBitUnion (Config1Reg) BitUnion32(Config2Reg) Bitfield< 31 > m
	EndBitUnion (Config2Reg) BitUnion32(Config3Reg) Bitfield< 31 > m
	EndBitUnion (Config3Reg) BitUnion64(WatchLoReg) Bitfield< 63
	EndBitUnion (WatchLoReg) BitUnion32(WatchHiReg) Bitfield< 31 > m
	EndBitUnion (WatchHiReg) BitUnion32(PerfCntCtlReg) Bitfield< 31 > m
	EndBitUnion (PerfCntCtlReg) BitUnion32(CacheErrReg) Bitfield< 31 > er
	EndBitUnion (CacheErrReg) BitUnion32(TagLoReg) Bitfield< 31
uint64_t	getArgument (ThreadContext *tc, int &number, uint16_t size, bool fp)
uint64_t	fpConvert (ConvertType cvt_type, double fp_val)
double	roundFP (double val, int digits)
double	truncFP (double val)
bool	getCondCode (uint32_t fcsr, int cc_idx)
uint32_t	genCCVector (uint32_t fcsr, int cc_num, uint32_t cc_val)
uint32_t	genInvalidVector (uint32_t fcsr_bits)
bool	isNan (void *val_ptr, int size)
bool	isQnan (void *val_ptr, int size)
bool	isSnan (void *val_ptr, int size)
template<class CPU >
void	zeroRegisters (CPU *cpu)
void	startupCPU (ThreadContext *tc, int cpuId)
void	initCPU (ThreadContext *tc, int cpuId)
void	copyRegs (ThreadContext *src, ThreadContext *dest)
void	copyMiscRegs (ThreadContext *src, ThreadContext *dest)
void	skipFunction (ThreadContext *tc)
PCState	buildRetPC (const PCState &curPC, const PCState &callPC)
static bool	inUserMode (ThreadContext *tc)
Addr	TruncPage (Addr addr)
Addr	RoundPage (Addr addr)
void	advancePC (PCState &pc, const StaticInstPtr &inst)
uint64_t	getExecutingAsid (ThreadContext *tc)
Addr	vtophys (Addr vaddr)
Addr	vtophys (ThreadContext *tc, Addr vaddr)

Variables
const uint32_t	DSP_CTL_POS [DSP_NUM_FIELDS] = { 0, 7, 13, 16, 24, 14 }
const uint32_t	DSP_CTL_MASK [DSP_NUM_FIELDS]
const uint32_t	SIMD_MAX_VALS = 4
const uint32_t	SIMD_NVALS [SIMD_NUM_FMTS] = { 1, 1, 2, 4 }
const uint32_t	SIMD_NBITS [SIMD_NUM_FMTS] = { 64, 32, 16, 8 }
const uint32_t	SIMD_LOG2N [SIMD_NUM_FMTS] = { 6, 5, 4, 3 }
const uint64_t	FIXED_L_SMAX = ULL(0x7fffffffffffffff)
const uint64_t	FIXED_W_SMAX = ULL(0x000000007fffffff)
const uint64_t	FIXED_H_SMAX = ULL(0x0000000000007fff)
const uint64_t	FIXED_B_SMAX = ULL(0x000000000000007f)
const uint64_t	FIXED_L_UMAX = ULL(0xffffffffffffffff)
const uint64_t	FIXED_W_UMAX = ULL(0x00000000ffffffff)
const uint64_t	FIXED_H_UMAX = ULL(0x000000000000ffff)
const uint64_t	FIXED_B_UMAX = ULL(0x00000000000000ff)
const uint64_t	FIXED_SMAX [SIMD_NUM_FMTS]
const uint64_t	FIXED_UMAX [SIMD_NUM_FMTS]
const uint64_t	FIXED_L_SMIN = ULL(0x8000000000000000)
const uint64_t	FIXED_W_SMIN = ULL(0xffffffff80000000)
const uint64_t	FIXED_H_SMIN = ULL(0xffffffffffff8000)
const uint64_t	FIXED_B_SMIN = ULL(0xffffffffffffff80)
const uint64_t	FIXED_L_UMIN = ULL(0x0000000000000000)
const uint64_t	FIXED_W_UMIN = ULL(0x0000000000000000)
const uint64_t	FIXED_H_UMIN = ULL(0x0000000000000000)
const uint64_t	FIXED_B_UMIN = ULL(0x0000000000000000)
const uint64_t	FIXED_SMIN [SIMD_NUM_FMTS]
const uint64_t	FIXED_UMIN [SIMD_NUM_FMTS]
Bitfield< 30 >	dm
Bitfield< 29 >	nodcr
Bitfield< 28 >	lsnm
Bitfield< 27 >	doze
Bitfield< 26 >	halt
Bitfield< 25 >	conutdm
Bitfield< 24 >	ibusep
Bitfield< 23 >	mcheckep
Bitfield< 22 >	cacheep
Bitfield< 21 >	dbusep
Bitfield< 20, 19 >	iexi
Bitfield< 19 >	ddbsImpr
Bitfield< 18 >	ddblImpr
Bitfield< 16 >	ejtagVer1
Bitfield< 15 >	ejtagVer0
	dexcCode
Bitfield< 9 >	nosst
Bitfield< 8 >	sst
Bitfield< 7 >	offline
Bitfield< 6 >	dibimpr
Bitfield< 5 >	dint
Bitfield< 4 >	dib
Bitfield< 3 >	ddbs
Bitfield< 2 >	ddbl
Bitfield< 1 >	dbp
Bitfield< 0 >	dss
Bitfield< 30 >	ut
Bitfield< 27 >	tb
Bitfield< 26 >	io
Bitfield< 25 >	d
Bitfield< 24 >	e
Bitfield< 23 >	k
Bitfield< 22 >	s
Bitfield< 21 >	u
Bitfield< 20, 13 >	asidM
Bitfield< 12, 5 >	asid
Bitfield< 4 >	g
Bitfield< 3 >	tfcr
Bitfield< 2 >	tlsm
Bitfield< 1 >	tim
Bitfield< 0 >	on
Bitfield< 28, 21 >	cpuid
Bitfield< 20 >	tcv
Bitfield< 19, 12 >	tcnum
Bitfield< 11, 7 >	mode
Bitfield< 6, 5 >	validModes
Bitfield< 4 >	tbi
Bitfield< 3 >	tbu
Bitfield< 2, 0 >	syp
Bitfield< 27 >	ate
Bitfield< 26, 24 >	bpc8
Bitfield< 23, 21 >	bpc7
Bitfield< 20, 18 >	bpc6
Bitfield< 17, 15 >	bpc5
Bitfield< 14, 12 >	bpc4
Bitfield< 11, 9 >	bpc3
Bitfield< 8, 6 >	bpc2
Bitfield< 5, 3 >	bpc1
Bitfield< 2, 0 >	bpc0
	bpc14
Bitfield< 14, 12 >	bpc13
Bitfield< 11, 9 >	bpc12
Bitfield< 8, 6 >	bpc11
Bitfield< 5, 3 >	bpc10
Bitfield< 2, 0 >	bpc9
Bitfield< 2 >	dq
Bitfield< 1 >	tup
Bitfield< 0 >	paco
const Addr	PageShift = 13
const Addr	PageBytes = ULL(1) << PageShift
const Addr	Page_Mask = ~(PageBytes - 1)
const Addr	PageOffset = PageBytes - 1
const Addr	PteShift = 3
const Addr	NPtePageShift = PageShift - PteShift
const Addr	NPtePage = ULL(1) << NPtePageShift
const Addr	PteMask = NPtePage - 1
const Addr	USegBase = ULL(0x0)
const Addr	USegEnd = ULL(0x7FFFFFFF)
const Addr	KSeg0End = ULL(0x9FFFFFFF)
const Addr	KSeg0Base = ULL(0x80000000)
const Addr	KSeg0Mask = ULL(0x1FFFFFFF)
const Addr	KSeg1End = ULL(0xBFFFFFFF)
const Addr	KSeg1Base = ULL(0xA0000000)
const Addr	KSeg1Mask = ULL(0x1FFFFFFF)
const Addr	KSSegEnd = ULL(0xDFFFFFFF)
const Addr	KSSegBase = ULL(0xC0000000)
const Addr	KSeg3End = ULL(0xFFFFFFFF)
const Addr	KSeg3Base = ULL(0xE0000000)
const unsigned	VABits = 32
const unsigned	PABits = 32
const Addr	VAddrImplMask = (ULL(1) << VABits) - 1
const Addr	VAddrUnImplMask = ~VAddrImplMask
const Addr	PAddrImplMask = (ULL(1) << PABits) - 1
const ExtMachInst	NoopMachInst = 0x00000000
const int	ANNOTE_NONE = 0
const uint32_t	ITOUCH_ANNOTE = 0xffffffff
const bool	HasUnalignedMemAcc = true
const bool	CurThreadInfoImplemented = false
const int	CurThreadInfoReg = -1
Bitfield< 2 >	stlb
Bitfield< 1 >	vpc
Bitfield< 0 >	evp
Bitfield< 29 >	tlbs
Bitfield< 28 >	gs
Bitfield< 27 >	pcp
Bitfield< 25, 16 >	ptlbe
Bitfield< 15 >	tca
Bitfield< 13, 10 >	pvpe
Bitfield< 7, 0 >	ptc
Bitfield< 18, 16 >	excpt
Bitfield< 15 >	te
Bitfield< 7, 0 >	targTC
Bitfield< 28, 21 >	xtc
Bitfield< 19 >	tcs
Bitfield< 18 >	scs
Bitfield< 17 >	dcs
Bitfield< 16 >	ics
Bitfield< 1 >	mvp
Bitfield< 0 >	vpa
	curTC
Bitfield< 20, 18 >	a0
Bitfield< 17 >	tbe
Bitfield< 3, 0 >	curVPE
	tcu
Bitfield< 27 >	tmx
Bitfield< 24, 23 >	rnst
Bitfield< 21 >	tds
Bitfield< 20 >	dt
Bitfield< 19, 16 >	impl
Bitfield< 15 >	da
Bitfield< 13 >	a
Bitfield< 12, 11 >	tksu
Bitfield< 10 >	ixmt
Bitfield< 30, 0 >	index
	random
	fill
Bitfield< 29, 6 >	pfn
Bitfield< 5, 3 >	c
Bitfield< 1 >	v
	pteBase
Bitfield< 22, 4 >	badVPN2
	mask
Bitfield< 12, 11 >	maskx
	aseUp
Bitfield< 29 >	elpa
Bitfield< 28 >	esp
Bitfield< 12, 8 >	aseDn
	wired
	r
Bitfield< 39, 13 >	vpn2
Bitfield< 12, 11 >	vpn2x
Bitfield< 31 >	cu3
Bitfield< 30 >	cu2
Bitfield< 29 >	cu1
Bitfield< 28 >	cu0
Bitfield< 26 >	fr
Bitfield< 25 >	re
Bitfield< 24 >	mx
Bitfield< 23 >	px
Bitfield< 22 >	bev
Bitfield< 21 >	ts
Bitfield< 20 >	sr
Bitfield< 19 >	nmi
Bitfield< 15, 10 >	ipl
Bitfield< 14 >	im6
Bitfield< 13 >	im5
Bitfield< 12 >	im4
Bitfield< 11 >	im3
Bitfield< 10 >	im2
Bitfield< 9 >	im1
Bitfield< 8 >	im0
Bitfield< 6 >	sx
Bitfield< 5 >	ux
Bitfield< 4, 3 >	ksu
Bitfield< 4 >	um
Bitfield< 3 >	r0
Bitfield< 2 >	erl
Bitfield< 1 >	exl
Bitfield< 0 >	ie
	ipti
Bitfield< 28, 26 >	ippci
Bitfield< 9, 5 >	vs
	hss
Bitfield< 21, 18 >	eicss
Bitfield< 15, 12 >	ess
Bitfield< 9, 6 >	pss
Bitfield< 3, 0 >	css
	ssv7
Bitfield< 27, 24 >	ssv6
Bitfield< 23, 20 >	ssv5
Bitfield< 19, 16 >	ssv4
Bitfield< 15, 12 >	ssv3
Bitfield< 11, 8 >	ssv2
Bitfield< 7, 4 >	ssv1
Bitfield< 3, 0 >	ssv0
Bitfield< 30 >	ti
Bitfield< 29, 28 >	ce
Bitfield< 27 >	dc
Bitfield< 26 >	pci
Bitfield< 23 >	iv
Bitfield< 22 >	wp
Bitfield< 15, 10 >	ripl
Bitfield< 14 >	ip6
Bitfield< 13 >	ip5
Bitfield< 12 >	ip4
Bitfield< 11 >	ip3
Bitfield< 10 >	ip2
Bitfield< 9 >	ip1
Bitfield< 8 >	ip0
Bitfield< 6, 2 >	excCode
	coOp
Bitfield< 23, 16 >	coId
Bitfield< 15, 8 >	procId
Bitfield< 7, 0 >	rev
	exceptionBase
Bitfield< 9, 9 >	cpuNum
Bitfield< 30, 28 >	k23
Bitfield< 27, 25 >	ku
Bitfield< 15 >	be
Bitfield< 14, 13 >	at
Bitfield< 12, 10 >	ar
Bitfield< 9, 7 >	mt
Bitfield< 3 >	vi
Bitfield< 2, 0 >	k0
Bitfield< 30, 25 >	mmuSize
Bitfield< 24, 22 >	is
Bitfield< 21, 19 >	il
Bitfield< 18, 16 >	ia
Bitfield< 15, 13 >	ds
Bitfield< 12, 10 >	dl
Bitfield< 6 >	c2
Bitfield< 5 >	md
Bitfield< 4 >	pc
Bitfield< 3 >	wr
Bitfield< 2 >	ca
Bitfield< 1 >	ep
Bitfield< 0 >	fp
Bitfield< 30, 28 >	tu
Bitfield< 23, 20 >	tl
Bitfield< 19, 16 >	ta
Bitfield< 15, 12 >	su
Bitfield< 11, 8 >	ss
Bitfield< 7, 4 >	sl
Bitfield< 3, 0 >	sa
Bitfield< 10 >	dspp
Bitfield< 7 >	lpa
Bitfield< 6 >	veic
Bitfield< 5 >	vint
Bitfield< 4 >	sp
Bitfield< 1 >	sm
	vaddr
Bitfield< 2 >	i
Bitfield< 0 >	w
Bitfield< 10, 5 >	event
Bitfield< 30 >	ec
Bitfield< 29 >	ed
Bitfield< 28 >	et
Bitfield< 27 >	es
Bitfield< 26 >	ee
Bitfield< 25 >	eb
	pTagLo
Bitfield< 7, 6 >	pState
Bitfield< 5 >	l
Bitfield< 0 >	p
const int	NumIntArchRegs = 32
const int	NumIntSpecialRegs = 9
const int	NumFloatArchRegs = 32
const int	NumFloatSpecialRegs = 5
const int	MaxShadowRegSets = 16
const int	NumIntRegs = NumIntArchRegs + NumIntSpecialRegs
const int	NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs
const int	NumCCRegs = 0
const uint32_t	MIPS32_QNAN = 0x7fbfffff
const uint64_t	MIPS64_QNAN = ULL(0x7ff7ffffffffffff)
const int	ZeroReg = 0
const int	AssemblerReg = 1
const int	SyscallSuccessReg = 7
const int	FirstArgumentReg = 4
const int	ReturnValueReg = 2
const int	KernelReg0 = 26
const int	KernelReg1 = 27
const int	GlobalPointerReg = 28
const int	StackPointerReg = 29
const int	FramePointerReg = 30
const int	ReturnAddressReg = 31
const int	SyscallPseudoReturnReg = 3
const int	NumMiscRegs = MISCREG_NUMREGS
const int	FP_Reg_Base = NumIntRegs
const int	CC_Reg_Base = FP_Reg_Base + NumFloatRegs
const int	Misc_Reg_Base = CC_Reg_Base + NumCCRegs
const int	Max_Reg_Index = Misc_Reg_Base + NumMiscRegs
const int	TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs

Typedef Documentation

typedef uint8_t MipsISA::CCReg

Definition at line 298 of file registers.hh.

typedef uint64_t MipsISA::ExtMachInst

Definition at line 41 of file types.hh.

typedef MipsFaultBase::FaultVals MipsISA::FaultVals

Definition at line 49 of file faults.cc.

typedef Addr MipsISA::FaultVect

Definition at line 48 of file faults.hh.

typedef float MipsISA::FloatReg

Definition at line 292 of file registers.hh.

typedef uint32_t MipsISA::FloatRegBits

Definition at line 291 of file registers.hh.

typedef uint32_t MipsISA::IntReg

Definition at line 288 of file registers.hh.

typedef uint32_t MipsISA::MachInst

Definition at line 40 of file types.hh.

typedef uint64_t MipsISA::MiscReg

Definition at line 295 of file registers.hh.

typedef GenericISA::DelaySlotPCState<MachInst> MipsISA::PCState

Definition at line 43 of file types.hh.

typedef uint16_t MipsISA::RegIndex

Definition at line 286 of file registers.hh.

Enumeration Type Documentation

anonymous enum

Enumerator
SIMD_FMT_L
SIMD_FMT_W
SIMD_FMT_PH
SIMD_FMT_QB
SIMD_NUM_FMTS

Definition at line 44 of file dsp.hh.

anonymous enum

Enumerator
DSP_POS
DSP_SCOUNT
DSP_C
DSP_OUFLAG
DSP_CCOND
DSP_EFI
DSP_NUM_FIELDS

Definition at line 53 of file dsp.hh.

anonymous enum

Enumerator
CMP_EQ
CMP_LT
CMP_LE

Definition at line 64 of file dsp.hh.

anonymous enum

Enumerator
MODE_L
MODE_R
MODE_LA
MODE_RA
MODE_X

Definition at line 71 of file dsp.hh.

anonymous enum

Enumerator
UNSIGNED
SIGNED

Definition at line 80 of file dsp.hh.

anonymous enum

Enumerator
NOSATURATE
SATURATE

Definition at line 81 of file dsp.hh.

anonymous enum

Enumerator
NOROUND
ROUND

Definition at line 82 of file dsp.hh.

enum MipsISA::ConvertType

Enumerator
SINGLE_TO_DOUBLE
SINGLE_TO_WORD
SINGLE_TO_LONG
DOUBLE_TO_SINGLE
DOUBLE_TO_WORD
DOUBLE_TO_LONG
LONG_TO_SINGLE
LONG_TO_DOUBLE
LONG_TO_WORD
LONG_TO_PS
WORD_TO_SINGLE
WORD_TO_DOUBLE
WORD_TO_LONG
WORD_TO_PS
PL_TO_SINGLE
PU_TO_SINGLE

Definition at line 46 of file types.hh.

enum MipsISA::ExcCode

Enumerator
ExcCodeDummy
ExcCodeInt
ExcCodeMod
ExcCodeTlbL
ExcCodeTlbS
ExcCodeAdEL
ExcCodeAdES
ExcCodeIBE
ExcCodeDBE
ExcCodeSys
ExcCodeBp
ExcCodeRI
ExcCodeCpU
ExcCodeOv
ExcCodeTr
ExcCodeC2E
ExcCodeMDMX
ExcCodeWatch
ExcCodeMCheck
ExcCodeThread
ExcCodeCacheErr

Definition at line 50 of file faults.hh.

enum MipsISA::FCSRBits

Enumerator
Inexact
Underflow
Overflow
DivideByZero
Invalid
Unimplemented

Definition at line 70 of file registers.hh.

enum MipsISA::FCSRFields

Enumerator
Flag_Field
Enable_Field
Cause_Field

Definition at line 79 of file registers.hh.

enum MipsISA::FPControlRegNums

Enumerator
FLOATREG_FIR
FLOATREG_FCCR
FLOATREG_FEXR
FLOATREG_FENR
FLOATREG_FCSR

Definition at line 62 of file registers.hh.

enum MipsISA::InterruptLevels

Enumerator
INTLEVEL_SOFTWARE_MIN
INTLEVEL_SOFTWARE_MAX
INTLEVEL_EXTERNAL_MIN
INTLEVEL_EXTERNAL_MAX
INTLEVEL_IRQ0
INTLEVEL_IRQ1
INTINDEX_ETHERNET
INTINDEX_SCSI
INTLEVEL_IRQ2
INTLEVEL_IRQ3
INTLEVEL_SERIAL
NumInterruptLevels

Definition at line 115 of file isa_traits.hh.

enum MipsISA::MiscIntRegNums

Enumerator
INTREG_LO
INTREG_DSP_LO0
INTREG_HI
INTREG_DSP_HI0
INTREG_DSP_ACX0
INTREG_DSP_LO1
INTREG_DSP_HI1
INTREG_DSP_ACX1
INTREG_DSP_LO2
INTREG_DSP_HI2
INTREG_DSP_ACX2
INTREG_DSP_LO3
INTREG_DSP_HI3
INTREG_DSP_ACX3
INTREG_DSP_CONTROL

Definition at line 85 of file registers.hh.

enum MipsISA::MiscRegIndex

Enumerator
MISCREG_INDEX
MISCREG_MVP_CONTROL
MISCREG_MVP_CONF0
MISCREG_MVP_CONF1
MISCREG_CP0_RANDOM
MISCREG_VPE_CONTROL
MISCREG_VPE_CONF0
MISCREG_VPE_CONF1
MISCREG_YQMASK
MISCREG_VPE_SCHEDULE
MISCREG_VPE_SCHEFBACK
MISCREG_VPE_OPT
MISCREG_ENTRYLO0
MISCREG_TC_STATUS
MISCREG_TC_BIND
MISCREG_TC_RESTART
MISCREG_TC_HALT
MISCREG_TC_CONTEXT
MISCREG_TC_SCHEDULE
MISCREG_TC_SCHEFBACK
MISCREG_ENTRYLO1
MISCREG_CONTEXT
MISCREG_CONTEXT_CONFIG
MISCREG_PAGEMASK
MISCREG_PAGEGRAIN
MISCREG_WIRED
MISCREG_SRS_CONF0
MISCREG_SRS_CONF1
MISCREG_SRS_CONF2
MISCREG_SRS_CONF3
MISCREG_SRS_CONF4
MISCREG_HWRENA
MISCREG_BADVADDR
MISCREG_COUNT
MISCREG_ENTRYHI
MISCREG_COMPARE
MISCREG_STATUS
MISCREG_INTCTL
MISCREG_SRSCTL
MISCREG_SRSMAP
MISCREG_CAUSE
MISCREG_EPC
MISCREG_PRID
MISCREG_EBASE
MISCREG_CONFIG
MISCREG_CONFIG1
MISCREG_CONFIG2
MISCREG_CONFIG3
MISCREG_CONFIG4
MISCREG_CONFIG5
MISCREG_CONFIG6
MISCREG_CONFIG7
MISCREG_LLADDR
MISCREG_WATCHLO0
MISCREG_WATCHLO1
MISCREG_WATCHLO2
MISCREG_WATCHLO3
MISCREG_WATCHLO4
MISCREG_WATCHLO5
MISCREG_WATCHLO6
MISCREG_WATCHLO7
MISCREG_WATCHHI0
MISCREG_WATCHHI1
MISCREG_WATCHHI2
MISCREG_WATCHHI3
MISCREG_WATCHHI4
MISCREG_WATCHHI5
MISCREG_WATCHHI6
MISCREG_WATCHHI7
MISCREG_XCCONTEXT64
MISCREG_DEBUG
MISCREG_TRACE_CONTROL1
MISCREG_TRACE_CONTROL2
MISCREG_USER_TRACE_DATA
MISCREG_TRACE_BPC
MISCREG_DEPC
MISCREG_PERFCNT0
MISCREG_PERFCNT1
MISCREG_PERFCNT2
MISCREG_PERFCNT3
MISCREG_PERFCNT4
MISCREG_PERFCNT5
MISCREG_PERFCNT6
MISCREG_PERFCNT7
MISCREG_ERRCTL
MISCREG_CACHEERR0
MISCREG_CACHEERR1
MISCREG_CACHEERR2
MISCREG_CACHEERR3
MISCREG_TAGLO0
MISCREG_DATALO1
MISCREG_TAGLO2
MISCREG_DATALO3
MISCREG_TAGLO4
MISCREG_DATALO5
MISCREG_TAGLO6
MISCREG_DATALO7
MISCREG_TAGHI0
MISCREG_DATAHI1
MISCREG_TAGHI2
MISCREG_DATAHI3
MISCREG_TAGHI4
MISCREG_DATAHI5
MISCREG_TAGHI6
MISCREG_DATAHI7
MISCREG_ERROR_EPC
MISCREG_DESAVE
MISCREG_LLFLAG
MISCREG_TP_VALUE
MISCREG_NUMREGS

Definition at line 126 of file registers.hh.

enum MipsISA::mode_type

Enumerator
mode_kernel
mode_supervisor
mode_user
mode_debug
mode_number

Definition at line 136 of file isa_traits.hh.

enum MipsISA::RoundMode

Enumerator
RND_ZERO
RND_DOWN
RND_UP
RND_NEAREST

Definition at line 70 of file types.hh.

Function Documentation

uint64_t MipsISA::addHalfLsb	(	uint64_t	value,
		int32_t	lsbpos
	)

Definition at line 129 of file dsp.cc.

References ULL.

Referenced by dspAddh(), dspExtr(), dspMulq(), dspPrecrq(), dspPrecrSra(), dspShra(), and dspSubh().

void MipsISA::advancePC ( PCState &  pc, const StaticInstPtr &  inst  )

inline

Definition at line 118 of file utility.hh.

References GenericISA::DelaySlotPCState< MachInst >::advance().

int32_t MipsISA::bitrev

(

int32_t

value

)

Definition at line 43 of file dsp.cc.

References i, and ArmISA::shift.

MipsISA::BitUnion32

(

IndexReg

)

MipsISA::BitUnion32

(

DebugReg

)

MipsISA::BitUnion32

(

MVPControlReg

)

PCState MipsISA::buildRetPC ( const PCState &  curPC, const PCState &  callPC  )

inline

Definition at line 48 of file utility.hh.

References GenericISA::DelaySlotPCState< MachInst >::advance(), GenericISA::SimplePCState< MachInst >::npc(), and GenericISA::SimplePCState< MachInst >::pc().

uint64_t MipsISA::checkOverflow	(	uint64_t	value,
		int32_t	fmt,
		int32_t	sign,
		uint32_t *	overflow
	)

Definition at line 91 of file dsp.cc.

References FIXED_SMAX, FIXED_SMIN, FIXED_UMAX, FIXED_UMIN, SIGNED, and UNSIGNED.

Referenced by dspAdd(), dspExtr(), dspMul(), dspShll(), and dspSub().

void MipsISA::copyMiscRegs	(	ThreadContext *	src,
		ThreadContext *	dest
	)

Definition at line 264 of file utility.cc.

References panic.

void MipsISA::copyRegs	(	ThreadContext *	src,
		ThreadContext *	dest
	)

Definition at line 242 of file utility.cc.

References i, NumCCRegs, NumFloatRegs, NumIntRegs, NumMiscRegs, ThreadContext::pcState(), ThreadContext::readFloatRegFlat(), ThreadContext::readIntRegFlat(), ThreadContext::readMiscRegNoEffect(), ThreadContext::setFloatRegFlat(), ThreadContext::setIntRegFlat(), and ThreadContext::setMiscRegNoEffect().

StaticInstPtr MipsISA::decodeInst

(

ExtMachInst

)

int32_t MipsISA::dspAbs	(	int32_t	a,
		int32_t	fmt,
		uint32_t *	dspctl
	)

Definition at line 135 of file dsp.cc.

References DSP_CTL_POS, DSP_OUFLAG, FIXED_SMAX, FIXED_SMIN, i, SIGNED, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and writeDSPControl().

int32_t MipsISA::dspAdd	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	saturate,
		int32_t	sign,
		uint32_t *	dspctl
	)

Definition at line 166 of file dsp.cc.

References checkOverflow(), DSP_CTL_POS, DSP_OUFLAG, dspSaturate(), i, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and writeDSPControl().

int32_t MipsISA::dspAddh	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	round,
		int32_t	sign
	)

Definition at line 198 of file dsp.cc.

References addHalfLsb(), i, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), and simdUnpack().

void MipsISA::dspCmp	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	sign,
		int32_t	op,
		uint32_t *	dspctl
	)

Definition at line 771 of file dsp.cc.

References CMP_EQ, CMP_LE, CMP_LT, DSP_CCOND, DSP_CTL_POS, i, SIMD_MAX_VALS, SIMD_NVALS, simdUnpack(), and writeDSPControl().

int32_t MipsISA::dspCmpg	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	sign,
		int32_t	op
	)

Definition at line 804 of file dsp.cc.

References CMP_EQ, CMP_LE, CMP_LT, i, SIMD_MAX_VALS, SIMD_NVALS, and simdUnpack().

int32_t MipsISA::dspCmpgd	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	sign,
		int32_t	op,
		uint32_t *	dspctl
	)

Definition at line 836 of file dsp.cc.

References CMP_EQ, CMP_LE, CMP_LT, DSP_CCOND, DSP_CTL_POS, i, SIMD_MAX_VALS, SIMD_NVALS, simdUnpack(), and writeDSPControl().

int64_t MipsISA::dspDpa	(	int64_t	dspac,
		int32_t	a,
		int32_t	b,
		int32_t	ac,
		int32_t	fmt,
		int32_t	sign,
		int32_t	mode
	)

Definition at line 628 of file dsp.cc.

References i, MODE_L, MODE_R, MODE_X, SIMD_MAX_VALS, SIMD_NVALS, and simdUnpack().

int64_t MipsISA::dspDpaq	(	int64_t	dspac,
		int32_t	a,
		int32_t	b,
		int32_t	ac,
		int32_t	infmt,
		int32_t	outfmt,
		int32_t	postsat,
		int32_t	mode,
		uint32_t *	dspctl
	)

Definition at line 494 of file dsp.cc.

References bits(), dspSaturate(), FIXED_SMAX, FIXED_SMIN, i, insertBits(), MODE_X, SIGNED, SIMD_FMT_L, SIMD_MAX_VALS, SIMD_NVALS, and simdUnpack().

int64_t MipsISA::dspDps	(	int64_t	dspac,
		int32_t	a,
		int32_t	b,
		int32_t	ac,
		int32_t	fmt,
		int32_t	sign,
		int32_t	mode
	)

Definition at line 656 of file dsp.cc.

References i, MODE_L, MODE_R, MODE_X, SIMD_MAX_VALS, SIMD_NVALS, and simdUnpack().

int64_t MipsISA::dspDpsq	(	int64_t	dspac,
		int32_t	a,
		int32_t	b,
		int32_t	ac,
		int32_t	infmt,
		int32_t	outfmt,
		int32_t	postsat,
		int32_t	mode,
		uint32_t *	dspctl
	)

Definition at line 561 of file dsp.cc.

References bits(), dspSaturate(), FIXED_SMAX, FIXED_SMIN, i, insertBits(), MODE_X, SIGNED, SIMD_FMT_L, SIMD_MAX_VALS, SIMD_NVALS, and simdUnpack().

int32_t MipsISA::dspExtp	(	int64_t	dspac,
		int32_t	size,
		uint32_t *	dspctl
	)

Definition at line 1084 of file dsp.cc.

References bits(), and insertBits().

int32_t MipsISA::dspExtpd	(	int64_t	dspac,
		int32_t	size,
		uint32_t *	dspctl
	)

Definition at line 1104 of file dsp.cc.

References bits(), and insertBits().

int32_t MipsISA::dspExtr	(	int64_t	dspac,
		int32_t	fmt,
		int32_t	sa,
		int32_t	round,
		int32_t	saturate,
		uint32_t *	dspctl
	)

Definition at line 1041 of file dsp.cc.

References addHalfLsb(), bits(), checkOverflow(), dspSaturate(), FIXED_SMAX, insertBits(), sa, SIGNED, and SIMD_FMT_L.

int64_t MipsISA::dspMaq	(	int64_t	dspac,
		int32_t	a,
		int32_t	b,
		int32_t	ac,
		int32_t	fmt,
		int32_t	mode,
		int32_t	saturate,
		uint32_t *	dspctl
	)

Definition at line 684 of file dsp.cc.

References dspSaturate(), FIXED_SMAX, FIXED_SMIN, i, insertBits(), MODE_L, MODE_R, SIGNED, SIMD_MAX_VALS, SIMD_NVALS, and simdUnpack().

int32_t MipsISA::dspMul	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	saturate,
		uint32_t *	dspctl
	)

Definition at line 391 of file dsp.cc.

References checkOverflow(), DSP_CTL_POS, DSP_OUFLAG, dspSaturate(), i, SIGNED, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and writeDSPControl().

int32_t MipsISA::dspMuleq	(	int32_t	a,
		int32_t	b,
		int32_t	mode,
		uint32_t *	dspctl
	)

Definition at line 457 of file dsp.cc.

References DSP_CTL_POS, DSP_OUFLAG, dspSaturate(), i, MODE_L, MODE_R, SIGNED, SIMD_FMT_PH, SIMD_FMT_W, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and writeDSPControl().

int32_t MipsISA::dspMuleu	(	int32_t	a,
		int32_t	b,
		int32_t	mode,
		uint32_t *	dspctl
	)

Definition at line 423 of file dsp.cc.

References DSP_CTL_POS, DSP_OUFLAG, dspSaturate(), i, MODE_L, MODE_R, SIMD_FMT_PH, SIMD_FMT_QB, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), UNSIGNED, and writeDSPControl().

int32_t MipsISA::dspMulq	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	saturate,
		int32_t	round,
		uint32_t *	dspctl
	)

Definition at line 350 of file dsp.cc.

References addHalfLsb(), DSP_CTL_POS, DSP_OUFLAG, FIXED_SMAX, FIXED_SMIN, i, sa, SIGNED, SIMD_MAX_VALS, SIMD_NBITS, SIMD_NVALS, simdPack(), simdUnpack(), and writeDSPControl().

int64_t MipsISA::dspMulsa	(	int64_t	dspac,
		int32_t	a,
		int32_t	b,
		int32_t	ac,
		int32_t	fmt
	)

Definition at line 728 of file dsp.cc.

References SIGNED, SIMD_MAX_VALS, and simdUnpack().

int64_t MipsISA::dspMulsaq	(	int64_t	dspac,
		int32_t	a,
		int32_t	b,
		int32_t	ac,
		int32_t	fmt,
		uint32_t *	dspctl
	)

Definition at line 742 of file dsp.cc.

References FIXED_SMAX, FIXED_SMIN, i, insertBits(), SIGNED, SIMD_MAX_VALS, SIMD_NVALS, and simdUnpack().

int32_t MipsISA::dspPack	(	int32_t	a,
		int32_t	b,
		int32_t	fmt
	)

Definition at line 1022 of file dsp.cc.

References SIMD_MAX_VALS, simdPack(), simdUnpack(), and UNSIGNED.

int32_t MipsISA::dspPick	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		uint32_t *	dspctl
	)

Definition at line 997 of file dsp.cc.

References bits(), DSP_CCOND, DSP_CTL_POS, i, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and UNSIGNED.

int32_t MipsISA::dspPrece	(	int32_t	a,
		int32_t	infmt,
		int32_t	insign,
		int32_t	outfmt,
		int32_t	outsign,
		int32_t	mode
	)

Definition at line 873 of file dsp.cc.

References i, MODE_L, MODE_LA, MODE_R, MODE_RA, sa, SIGNED, SIMD_MAX_VALS, SIMD_NBITS, SIMD_NVALS, simdPack(), simdUnpack(), and UNSIGNED.

int32_t MipsISA::dspPrecrq	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		uint32_t *	dspctl
	)

Definition at line 944 of file dsp.cc.

References addHalfLsb(), dspSaturate(), insertBits(), SIGNED, SIMD_MAX_VALS, simdPack(), and simdUnpack().

int32_t MipsISA::dspPrecrqu	(	int32_t	a,
		int32_t	b,
		uint32_t *	dspctl
	)

Definition at line 915 of file dsp.cc.

References dspSaturate(), i, insertBits(), SIGNED, SIMD_FMT_PH, SIMD_FMT_QB, SIMD_MAX_VALS, SIMD_NBITS, simdPack(), simdUnpack(), and UNSIGNED.

int32_t MipsISA::dspPrecrSra	(	int32_t	a,
		int32_t	b,
		int32_t	sa,
		int32_t	fmt,
		int32_t	round
	)

Definition at line 969 of file dsp.cc.

References addHalfLsb(), i, sa, SIGNED, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), and simdUnpack().

uint64_t MipsISA::dspSaturate	(	uint64_t	value,
		int32_t	fmt,
		int32_t	sign,
		uint32_t *	overflow
	)

Definition at line 61 of file dsp.cc.

References FIXED_SMAX, FIXED_SMIN, FIXED_UMAX, FIXED_UMIN, SIGNED, and UNSIGNED.

Referenced by dspAdd(), dspDpaq(), dspDpsq(), dspExtr(), dspMaq(), dspMul(), dspMuleq(), dspMuleu(), dspPrecrq(), dspPrecrqu(), dspShll(), and dspSub().

int32_t MipsISA::dspShll	(	int32_t	a,
		uint32_t	sa,
		int32_t	fmt,
		int32_t	saturate,
		int32_t	sign,
		uint32_t *	dspctl
	)

Definition at line 278 of file dsp.cc.

References bits(), checkOverflow(), DSP_CTL_POS, DSP_OUFLAG, dspSaturate(), i, SIMD_LOG2N, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and writeDSPControl().

int32_t MipsISA::dspShra	(	int32_t	a,
		uint32_t	sa,
		int32_t	fmt,
		int32_t	round,
		int32_t	sign,
		uint32_t *	dspctl
	)

Definition at line 326 of file dsp.cc.

References addHalfLsb(), bits(), i, sa, SIGNED, SIMD_LOG2N, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), and simdUnpack().

int32_t MipsISA::dspShrl	(	int32_t	a,
		uint32_t	sa,
		int32_t	fmt,
		int32_t	sign
	)

Definition at line 307 of file dsp.cc.

References bits(), i, SIMD_LOG2N, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and UNSIGNED.

int32_t MipsISA::dspSub	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	saturate,
		int32_t	sign,
		uint32_t *	dspctl
	)

Definition at line 222 of file dsp.cc.

References checkOverflow(), DSP_CTL_POS, DSP_OUFLAG, dspSaturate(), i, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), simdUnpack(), and writeDSPControl().

int32_t MipsISA::dspSubh	(	int32_t	a,
		int32_t	b,
		int32_t	fmt,
		int32_t	round,
		int32_t	sign
	)

Definition at line 253 of file dsp.cc.

References addHalfLsb(), i, SIMD_MAX_VALS, SIMD_NVALS, simdPack(), and simdUnpack().

MipsISA::EndBitUnion

(

MVPControlReg

)

MipsISA::EndBitUnion

(

IndexReg

)

MipsISA::EndBitUnion

(

RandomReg

)

MipsISA::EndBitUnion

(

MVPConf0Reg

)

MipsISA::EndBitUnion

(

EntryLoReg

)

MipsISA::EndBitUnion

(

VPEControlReg

)

MipsISA::EndBitUnion

(

ContextReg

)

MipsISA::EndBitUnion

(

DebugReg

)

MipsISA::EndBitUnion

(

VPEConf0Reg

)

MipsISA::EndBitUnion

(

PageMaskReg

)

MipsISA::EndBitUnion

(

TCBindReg

)

MipsISA::EndBitUnion

(

PageGrainReg

)

MipsISA::EndBitUnion

(

WiredReg

)

MipsISA::EndBitUnion

(

TraceControlReg

)

MipsISA::EndBitUnion

(

HWREnaReg

)

MipsISA::EndBitUnion

(

TCStatusReg

)

MipsISA::EndBitUnion

(

EntryHiReg

)

MipsISA::EndBitUnion

(

TraceControl2Reg

)

MipsISA::EndBitUnion

(

TraceBPCReg

)

MipsISA::EndBitUnion

(

TraceBPC2Reg

)

MipsISA::EndBitUnion

(

StatusReg

)

MipsISA::EndBitUnion

(

IntCtlReg

)

MipsISA::EndBitUnion

(

SRSCtlReg

)

MipsISA::EndBitUnion

(

SRSMapReg

)

MipsISA::EndBitUnion

(

CauseReg

)

MipsISA::EndBitUnion

(

PRIdReg

)

MipsISA::EndBitUnion

(

EBaseReg

)

MipsISA::EndBitUnion

(

ConfigReg

)

MipsISA::EndBitUnion

(

Config1Reg

)

MipsISA::EndBitUnion

(

Config2Reg

)

MipsISA::EndBitUnion

(

Config3Reg

)

MipsISA::EndBitUnion

(

WatchLoReg

)

MipsISA::EndBitUnion

(

WatchHiReg

)

MipsISA::EndBitUnion

(

PerfCntCtlReg

)

MipsISA::EndBitUnion

(

CacheErrReg

)

MipsISA::EndSubBitUnion

(

ejtagVer

)

MipsISA::EndSubBitUnion

(

cu

)

MipsISA::EndSubBitUnion

(

im

)

MipsISA::EndSubBitUnion

(

ip

)

template<class TC >

void MipsISA::forkThread	(	TC *	tc,
		Fault &	fault,
		int	Rd_bits,
		int	Rs,
		int	Rt
	)

Definition at line 108 of file mt.hh.

References Misc_Reg_Base, MISCREG_MVP_CONF0, MISCREG_STATUS, MISCREG_TC_BIND, MISCREG_TC_HALT, MISCREG_TC_RESTART, MISCREG_TC_STATUS, MISCREG_VPE_CONTROL, and ArmISA::status.

uint64_t MipsISA::fpConvert	(	ConvertType	cvt_type,
		double	fp_val
	)

Definition at line 58 of file utility.cc.

References panic, SINGLE_TO_DOUBLE, SINGLE_TO_WORD, WORD_TO_DOUBLE, and WORD_TO_SINGLE.

uint32_t MipsISA::genCCVector	(	uint32_t	fcsr,
		int	cc_num,
		uint32_t	cc_val
	)

Definition at line 128 of file utility.cc.

References bits(), and fcsr.

uint32_t MipsISA::genInvalidVector

(

uint32_t

fcsr_bits

)

Definition at line 140 of file utility.cc.

References Cause_Field, Flag_Field, and Invalid.

uint64_t MipsISA::getArgument	(	ThreadContext *	tc,
		int &	number,
		uint16_t	size,
		bool	fp
	)

Definition at line 51 of file utility.cc.

References panic.

static uint8_t MipsISA::getCauseIP ( ThreadContext *  tc )

inlinestatic

Definition at line 46 of file interrupts.cc.

References MISCREG_CAUSE, and ThreadContext::readMiscRegNoEffect().

Referenced by MipsISA::Interrupts::clear(), MipsISA::Interrupts::interruptsPending(), and MipsISA::Interrupts::post().

bool MipsISA::getCondCode	(	uint32_t	fcsr,
		int	cc_idx
	)

Definition at line 120 of file utility.cc.

References ArmISA::shift.

uint64_t MipsISA::getExecutingAsid ( ThreadContext *  tc )

inline

Definition at line 124 of file utility.hh.

template<class TC >

unsigned MipsISA::getTargetThread ( TC *  tc )

inline

Definition at line 64 of file mt.hh.

References MISCREG_VPE_CONTROL.

template<class TC >

unsigned MipsISA::getVirtProcNum ( TC *  tc )

inline

Definition at line 56 of file mt.hh.

References MISCREG_TC_BIND.

template<class TC >

void MipsISA::haltThread ( TC *  tc )

inline

Definition at line 72 of file mt.hh.

References curTick(), MISCREG_TC_RESTART, GenericISA::SimplePCState< MachInst >::npc(), GenericISA::SimplePCState< MachInst >::pc(), pc, and warn.

Referenced by MipsISA::ISA::updateCPU().

template<class XC >

void MipsISA::handleLockedRead ( XC *  xc, Request *  req  )

inline

Definition at line 78 of file locked_mem.hh.

References Request::contextId(), DPRINTF, Request::getPaddr(), MISCREG_LLADDR, and MISCREG_LLFLAG.

template<class XC >

void MipsISA::handleLockedSnoop ( XC *  xc, PacketPtr  pkt, Addr  cacheBlockMask  )

inline

Definition at line 63 of file locked_mem.hh.

References Packet::getAddr(), MISCREG_LLADDR, and MISCREG_LLFLAG.

template<class XC >

void MipsISA::handleLockedSnoopHit ( XC *  xc )

inline

Definition at line 89 of file locked_mem.hh.

template<class XC >

bool MipsISA::handleLockedWrite ( XC *  xc, Request *  req, Addr  cacheBlockMask  )

inline

Definition at line 95 of file locked_mem.hh.

References Request::contextId(), curTick(), DPRINTF, Request::getPaddr(), Request::isUncacheable(), MISCREG_LLADDR, MISCREG_LLFLAG, Request::setExtraData(), and warn.

void MipsISA::initCPU	(	ThreadContext *	tc,
		int	cpuId
	)

Definition at line 238 of file utility.cc.

static bool MipsISA::inUserMode ( ThreadContext *  tc )

inlinestatic

Definition at line 75 of file utility.hh.

References MISCREG_DEBUG, MISCREG_STATUS, and ThreadContext::readMiscReg().

bool MipsISA::isNan	(	void *	val_ptr,
		int	size
	)

Definition at line 154 of file utility.cc.

References bits(), and panic.

bool MipsISA::isQnan	(	void *	val_ptr,
		int	size
	)

Definition at line 177 of file utility.cc.

References bits(), and panic.

bool MipsISA::isSnan	(	void *	val_ptr,
		int	size
	)

Definition at line 199 of file utility.cc.

References bits(), and panic.

Addr MipsISA::Phys2K0Seg ( Addr  addr )

inline

Definition at line 95 of file isa_traits.hh.

References KSeg0Base.

uint32_t MipsISA::readDSPControl	(	uint32_t *	dspctl,
		uint32_t	mask
	)

Definition at line 1179 of file dsp.cc.

References DSP_C, DSP_CCOND, DSP_CTL_MASK, DSP_EFI, DSP_OUFLAG, DSP_POS, and DSP_SCOUNT.

template<class TC >

void MipsISA::restoreThread ( TC *  tc )

inline

Definition at line 91 of file mt.hh.

References curTick(), MISCREG_TC_RESTART, and warn.

Referenced by MipsISA::ISA::updateCPU().

double MipsISA::roundFP	(	double	val,
		int	digits
	)

Definition at line 102 of file utility.cc.

References X86ISA::val.

Addr MipsISA::RoundPage ( Addr  addr )

inline

Definition at line 102 of file utility.hh.

References PageBytes.

static void MipsISA::setCauseIP ( ThreadContext *  tc, uint8_t  val  )

inlinestatic

Definition at line 52 of file interrupts.cc.

References MISCREG_CAUSE, ThreadContext::readMiscRegNoEffect(), ThreadContext::setMiscRegNoEffect(), and X86ISA::val.

Referenced by MipsISA::Interrupts::clear(), MipsISA::Interrupts::clearAll(), MipsISA::Interrupts::interruptsPending(), and MipsISA::Interrupts::post().

uint64_t MipsISA::signExtend	(	uint64_t	value,
		int32_t	signpos
	)

Definition at line 114 of file dsp.cc.

References SIMD_NBITS, and ULL.

Referenced by simdUnpack().

void MipsISA::simdPack	(	uint64_t *	values_ptr,
		int32_t *	reg,
		int32_t	fmt
	)

Definition at line 1128 of file dsp.cc.

References bits(), i, SIMD_NBITS, and SIMD_NVALS.

Referenced by dspAbs(), dspAdd(), dspAddh(), dspMul(), dspMuleq(), dspMuleu(), dspMulq(), dspPack(), dspPick(), dspPrece(), dspPrecrq(), dspPrecrqu(), dspPrecrSra(), dspShll(), dspShra(), dspShrl(), dspSub(), and dspSubh().

void MipsISA::simdUnpack	(	int32_t	reg,
		uint64_t *	values_ptr,
		int32_t	fmt,
		int32_t	sign
	)

Definition at line 1140 of file dsp.cc.

References bits(), i, SIGNED, signExtend(), SIMD_NBITS, SIMD_NVALS, and UNSIGNED.

Referenced by dspAbs(), dspAdd(), dspAddh(), dspCmp(), dspCmpg(), dspCmpgd(), dspDpa(), dspDpaq(), dspDps(), dspDpsq(), dspMaq(), dspMul(), dspMuleq(), dspMuleu(), dspMulq(), dspMulsa(), dspMulsaq(), dspPack(), dspPick(), dspPrece(), dspPrecrq(), dspPrecrqu(), dspPrecrSra(), dspShll(), dspShra(), dspShrl(), dspSub(), and dspSubh().

void MipsISA::skipFunction

(

ThreadContext *

tc

)

Definition at line 269 of file utility.cc.

References ThreadContext::pcState(), ThreadContext::readIntReg(), and ReturnAddressReg.

void MipsISA::startupCPU	(	ThreadContext *	tc,
		int	cpuId
	)

Definition at line 232 of file utility.cc.

References ThreadContext::activate().

MipsISA::SubBitUnion	(	ejtagVer	,
		17	,
		15
	)

MipsISA::SubBitUnion	(	im	,
		15	,
		8
	)

MipsISA::SubBitUnion	(	ip	,
		15	,
		8
	)

double MipsISA::truncFP

(

double

val

)

Definition at line 113 of file utility.cc.

Addr MipsISA::TruncPage ( Addr  addr )

inline

Definition at line 98 of file utility.hh.

References PageBytes.

template<class TC >

void MipsISA::updateStatusView ( TC *  tc )

inline

Definition at line 241 of file mt.hh.

References MISCREG_STATUS, MISCREG_TC_STATUS, and ArmISA::status.

template<class TC >

void MipsISA::updateTCStatusView ( TC *  tc )

inline

Definition at line 259 of file mt.hh.

References MISCREG_STATUS, MISCREG_TC_STATUS, and ArmISA::status.

Addr MipsISA::VAddrImpl ( Addr  a )

inline

Definition at line 105 of file isa_traits.hh.

References VAddrImplMask.

Addr MipsISA::VAddrOffset ( Addr  a )

inline

Definition at line 107 of file isa_traits.hh.

References PageOffset.

Addr MipsISA::VAddrVPN ( Addr  a )

inline

Definition at line 106 of file isa_traits.hh.

References PageShift.

Addr MipsISA::vtophys ( Addr  vaddr )

inline

Definition at line 47 of file vtophys.cc.

References fatal.

Addr MipsISA::vtophys ( ThreadContext *  tc, Addr  vaddr  )

inline

Definition at line 54 of file vtophys.cc.

References fatal.

void MipsISA::writeDSPControl	(	uint32_t *	dspctl,
		uint32_t	value,
		uint32_t	mask
	)

Definition at line 1162 of file dsp.cc.

References DSP_C, DSP_CCOND, DSP_CTL_MASK, DSP_EFI, DSP_OUFLAG, DSP_POS, and DSP_SCOUNT.

Referenced by dspAbs(), dspAdd(), dspCmp(), dspCmpgd(), dspMul(), dspMuleq(), dspMuleu(), dspMulq(), dspShll(), and dspSub().

template<class TC >

int MipsISA::yieldThread	(	TC *	tc,
		Fault &	fault,
		int	src_reg,
		uint32_t	yield_mask
	)

Definition at line 175 of file mt.hh.

References curTick(), Misc_Reg_Base, MISCREG_MVP_CONF0, MISCREG_TC_BIND, MISCREG_TC_HALT, MISCREG_TC_STATUS, MISCREG_VPE_CONTROL, and warn.

template<class CPU >

void MipsISA::zeroRegisters

(

CPU *

cpu

)

Definition at line 222 of file utility.cc.

References ZeroReg.

Variable Documentation

Bitfield<13> MipsISA::a

Definition at line 92 of file mt_constants.hh.

Bitfield<20, 18> MipsISA::a0

Definition at line 79 of file mt_constants.hh.

Referenced by ArmISA::add128(), ArmISA::mul62x62(), and ArmISA::sub128().

const int MipsISA::ANNOTE_NONE = 0

Definition at line 148 of file isa_traits.hh.

Bitfield<12, 10> MipsISA::ar

Definition at line 224 of file pra_constants.hh.

Bitfield<12, 8> MipsISA::aseDn

Definition at line 82 of file pra_constants.hh.

MipsISA::aseUp

Definition at line 78 of file pra_constants.hh.

Bitfield< 23, 16 > MipsISA::asid

Definition at line 84 of file dt_constants.hh.

Bitfield<20, 13> MipsISA::asidM

Definition at line 83 of file dt_constants.hh.

const int MipsISA::AssemblerReg = 1

Definition at line 105 of file registers.hh.

Bitfield<14, 13> MipsISA::at

Definition at line 223 of file pra_constants.hh.

Referenced by HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >::AtomicInstBase(), HsailISA::constructAtomic(), HsailISA::decodeAtomic(), HsailISA::decodeAtomicNoRet(), HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >::LdInstBase(), HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >::StInstBase(), and X86KvmCPU::updateThreadContextMSRs().

Bitfield<27> MipsISA::ate

Definition at line 107 of file dt_constants.hh.

Referenced by HsaObject::createHsaObject().

Bitfield<22, 4> MipsISA::badVPN2

Definition at line 66 of file pra_constants.hh.

Bitfield<15> MipsISA::be

Definition at line 222 of file pra_constants.hh.

Bitfield<22> MipsISA::bev

Definition at line 116 of file pra_constants.hh.

Bitfield<2, 0> MipsISA::bpc0

Definition at line 116 of file dt_constants.hh.

Bitfield<5, 3> MipsISA::bpc1

Definition at line 115 of file dt_constants.hh.

Bitfield<5, 3> MipsISA::bpc10

Definition at line 124 of file dt_constants.hh.

Bitfield<8, 6> MipsISA::bpc11

Definition at line 123 of file dt_constants.hh.

Bitfield<11, 9> MipsISA::bpc12

Definition at line 122 of file dt_constants.hh.

Bitfield<14, 12> MipsISA::bpc13

Definition at line 121 of file dt_constants.hh.

MipsISA::bpc14

Definition at line 120 of file dt_constants.hh.

Bitfield<8, 6> MipsISA::bpc2

Definition at line 114 of file dt_constants.hh.

Bitfield<11, 9> MipsISA::bpc3

Definition at line 113 of file dt_constants.hh.

Bitfield<14, 12> MipsISA::bpc4

Definition at line 112 of file dt_constants.hh.

Bitfield<17, 15> MipsISA::bpc5

Definition at line 111 of file dt_constants.hh.

Bitfield<20, 18> MipsISA::bpc6

Definition at line 110 of file dt_constants.hh.

Bitfield<23, 21> MipsISA::bpc7

Definition at line 109 of file dt_constants.hh.

Bitfield<26, 24> MipsISA::bpc8

Definition at line 108 of file dt_constants.hh.

Bitfield<2, 0> MipsISA::bpc9

Definition at line 125 of file dt_constants.hh.

Bitfield<5, 3> MipsISA::c

Definition at line 58 of file pra_constants.hh.

Bitfield<6> MipsISA::c2

Definition at line 240 of file pra_constants.hh.

Bitfield<2> MipsISA::ca

Definition at line 244 of file pra_constants.hh.

Bitfield<22> MipsISA::cacheep

Definition at line 50 of file dt_constants.hh.

const int MipsISA::CC_Reg_Base = FP_Reg_Base + NumFloatRegs

Definition at line 280 of file registers.hh.

Bitfield<29, 28> MipsISA::ce

Definition at line 179 of file pra_constants.hh.

Referenced by CopyEngine::CopyEngineChannel::drain(), CopyEngine::CopyEngineChannel::fetchDescriptor(), CopyEngine::CopyEngineChannel::fetchNextAddr(), CopyEngine::CopyEngineChannel::inDrain(), CopyEngine::CopyEngineChannel::readCopyBytes(), CopyEngine::CopyEngineChannel::recvCommand(), CopyEngine::CopyEngineChannel::serialize(), SparcISA::TLB::translateData(), CopyEngine::CopyEngineChannel::unserialize(), CopyEngine::CopyEngineChannel::writeCompletionStatus(), and CopyEngine::CopyEngineChannel::writeCopyBytes().

Bitfield<23, 16> MipsISA::coId

Definition at line 204 of file pra_constants.hh.

Bitfield<25> MipsISA::conutdm

Definition at line 47 of file dt_constants.hh.

MipsISA::coOp

Definition at line 203 of file pra_constants.hh.

Bitfield<28, 21> MipsISA::cpuid

Definition at line 94 of file dt_constants.hh.

Referenced by Iob::readJBus(), X86KvmCPU::updateCPUID(), PseudoInst::wakeCPU(), and Iob::writeJBus().

Bitfield<9, 9> MipsISA::cpuNum

Definition at line 214 of file pra_constants.hh.

Referenced by CpuLocalTimer::Timer::timerAtZero(), and CpuLocalTimer::Timer::watchdogAtZero().

Bitfield<3, 0> MipsISA::css

Definition at line 162 of file pra_constants.hh.

Bitfield<28> MipsISA::cu0

Definition at line 109 of file pra_constants.hh.

Bitfield<29> MipsISA::cu1

Definition at line 108 of file pra_constants.hh.

Bitfield<30> MipsISA::cu2

Definition at line 107 of file pra_constants.hh.

Bitfield<31> MipsISA::cu3

Definition at line 105 of file pra_constants.hh.

MipsISA::curTC

Definition at line 78 of file mt_constants.hh.

const bool MipsISA::CurThreadInfoImplemented = false

Definition at line 153 of file isa_traits.hh.

const int MipsISA::CurThreadInfoReg = -1

Definition at line 154 of file isa_traits.hh.

Bitfield<3, 0> MipsISA::curVPE

Definition at line 81 of file mt_constants.hh.

Bitfield< 2 > MipsISA::d

Definition at line 78 of file dt_constants.hh.

Bitfield< 9, 7 > MipsISA::da

Definition at line 91 of file mt_constants.hh.

Bitfield<1> MipsISA::dbp

Definition at line 69 of file dt_constants.hh.

Bitfield<21> MipsISA::dbusep

Definition at line 51 of file dt_constants.hh.

Bitfield<27> MipsISA::dc

Definition at line 180 of file pra_constants.hh.

Bitfield<17> MipsISA::dcs

Definition at line 71 of file mt_constants.hh.

Bitfield<2> MipsISA::ddbl

Definition at line 68 of file dt_constants.hh.

Bitfield<18> MipsISA::ddblImpr

Definition at line 54 of file dt_constants.hh.

Bitfield<3> MipsISA::ddbs

Definition at line 67 of file dt_constants.hh.

Bitfield<19> MipsISA::ddbsImpr

Definition at line 53 of file dt_constants.hh.

MipsISA::dexcCode

Definition at line 60 of file dt_constants.hh.

Bitfield<4> MipsISA::dib

Definition at line 66 of file dt_constants.hh.

Bitfield<6> MipsISA::dibimpr

Definition at line 64 of file dt_constants.hh.

Bitfield<5> MipsISA::dint

Definition at line 65 of file dt_constants.hh.

Bitfield<12, 10> MipsISA::dl

Definition at line 238 of file pra_constants.hh.

Bitfield<30> MipsISA::dm

Definition at line 42 of file dt_constants.hh.

Bitfield<27> MipsISA::doze

Definition at line 45 of file dt_constants.hh.

Bitfield<2> MipsISA::dq

Definition at line 130 of file dt_constants.hh.

Bitfield<15, 13> MipsISA::ds

Definition at line 237 of file pra_constants.hh.

Referenced by X86System::initState(), and X86ISA::X86_64Process::initState().

const uint32_t MipsISA::DSP_CTL_MASK[DSP_NUM_FIELDS]

Initial value:

=
{ 0x0000003f, 0x00001f80, 0x00002000,
  0x00ff0000, 0x0f000000, 0x00004000 }

Definition at line 86 of file dsp.hh.

Referenced by readDSPControl(), and writeDSPControl().

const uint32_t MipsISA::DSP_CTL_POS[DSP_NUM_FIELDS] = { 0, 7, 13, 16, 24, 14 }

Definition at line 85 of file dsp.hh.

Referenced by dspAbs(), dspAdd(), dspCmp(), dspCmpgd(), dspMul(), dspMuleq(), dspMuleu(), dspMulq(), dspPick(), dspShll(), and dspSub().

Bitfield<10> MipsISA::dspp

Definition at line 264 of file pra_constants.hh.

Bitfield<0> MipsISA::dss

Definition at line 70 of file dt_constants.hh.

Bitfield<20> MipsISA::dt

Definition at line 89 of file mt_constants.hh.

Bitfield< 28 > MipsISA::e

Definition at line 79 of file dt_constants.hh.

Bitfield<25> MipsISA::eb

Definition at line 314 of file pra_constants.hh.

Bitfield<30> MipsISA::ec

Definition at line 309 of file pra_constants.hh.

Bitfield<29> MipsISA::ed

Definition at line 310 of file pra_constants.hh.

Bitfield<26> MipsISA::ee

Definition at line 313 of file pra_constants.hh.

Bitfield<21, 18> MipsISA::eicss

Definition at line 156 of file pra_constants.hh.

Bitfield<15> MipsISA::ejtagVer0

Definition at line 58 of file dt_constants.hh.

Bitfield<16> MipsISA::ejtagVer1

Definition at line 57 of file dt_constants.hh.

Bitfield<29> MipsISA::elpa

Definition at line 79 of file pra_constants.hh.

Bitfield<1> MipsISA::ep

Definition at line 245 of file pra_constants.hh.

Bitfield<2> MipsISA::erl

Definition at line 139 of file pra_constants.hh.

Bitfield<27> MipsISA::es

Definition at line 312 of file pra_constants.hh.

Bitfield<28> MipsISA::esp

Definition at line 80 of file pra_constants.hh.

Bitfield<15, 12> MipsISA::ess

Definition at line 158 of file pra_constants.hh.

Bitfield<28> MipsISA::et

Definition at line 311 of file pra_constants.hh.

Referenced by ArmISA::PMU::updateCounter().

Bitfield<10, 5> MipsISA::event

Definition at line 299 of file pra_constants.hh.

Referenced by FlashDevice::accessDevice(), EventQueue::deschedule(), ArmISA::TableWalker::doLongDescriptor(), Pl111::fillFifo(), ArmISA::Stage2MMU::Stage2Translation::finish(), DmaReadFifo::handlePending(), Event::insertBefore(), RubySystem::memWriteback(), GpuDispatcher::notifyWgCompl(), EventQueue::reschedule(), DmaReadFifo::resumeFillTiming(), BasePixelPump::serialize(), DVFSHandler::serialize(), Intel8254Timer::Counter::serialize(), IdeDisk::serialize(), EventQueue::serviceOne(), Intel8254Timer::Counter::startup(), DistEtherLink::Link::unserialize(), BasePixelPump::unserialize(), DVFSHandler::unserialize(), Intel8254Timer::Counter::unserialize(), IdeDisk::unserialize(), and Intel8254Timer::Counter::write().

Bitfield<0> MipsISA::evp

Definition at line 45 of file mt_constants.hh.

Bitfield<6, 2> MipsISA::excCode

Definition at line 198 of file pra_constants.hh.

Referenced by MipsISA::MipsFaultBase::setExceptionState().

MipsISA::exceptionBase

Definition at line 212 of file pra_constants.hh.

Bitfield<18, 16> MipsISA::excpt

Definition at line 61 of file mt_constants.hh.

Bitfield< 0 > MipsISA::exl

Definition at line 140 of file pra_constants.hh.

Bitfield< 61, 40 > MipsISA::fill

Definition at line 56 of file pra_constants.hh.

Referenced by RiscvISA::ISA::clear(), VGic::EndBitUnion(), AlphaISA::TLB::flushAll(), and GenericPciHost::read().

const int MipsISA::FirstArgumentReg = 4

Definition at line 107 of file registers.hh.

const uint64_t MipsISA::FIXED_B_SMAX = ULL(0x000000000000007f)

Definition at line 108 of file dsp.hh.

const uint64_t MipsISA::FIXED_B_SMIN = ULL(0xffffffffffffff80)

Definition at line 122 of file dsp.hh.

const uint64_t MipsISA::FIXED_B_UMAX = ULL(0x00000000000000ff)

Definition at line 112 of file dsp.hh.

const uint64_t MipsISA::FIXED_B_UMIN = ULL(0x0000000000000000)

Definition at line 126 of file dsp.hh.

const uint64_t MipsISA::FIXED_H_SMAX = ULL(0x0000000000007fff)

Definition at line 107 of file dsp.hh.

const uint64_t MipsISA::FIXED_H_SMIN = ULL(0xffffffffffff8000)

Definition at line 121 of file dsp.hh.

const uint64_t MipsISA::FIXED_H_UMAX = ULL(0x000000000000ffff)

Definition at line 111 of file dsp.hh.

const uint64_t MipsISA::FIXED_H_UMIN = ULL(0x0000000000000000)

Definition at line 125 of file dsp.hh.

const uint64_t MipsISA::FIXED_L_SMAX = ULL(0x7fffffffffffffff)

Definition at line 105 of file dsp.hh.

const uint64_t MipsISA::FIXED_L_SMIN = ULL(0x8000000000000000)

Definition at line 119 of file dsp.hh.

const uint64_t MipsISA::FIXED_L_UMAX = ULL(0xffffffffffffffff)

Definition at line 109 of file dsp.hh.

const uint64_t MipsISA::FIXED_L_UMIN = ULL(0x0000000000000000)

Definition at line 123 of file dsp.hh.

const uint64_t MipsISA::FIXED_SMAX[SIMD_NUM_FMTS]

Initial value:

=
{ FIXED_L_SMAX, FIXED_W_SMAX, FIXED_H_SMAX, FIXED_B_SMAX }

Definition at line 113 of file dsp.hh.

Referenced by checkOverflow(), dspAbs(), dspDpaq(), dspDpsq(), dspExtr(), dspMaq(), dspMulq(), dspMulsaq(), and dspSaturate().

const uint64_t MipsISA::FIXED_SMIN[SIMD_NUM_FMTS]

Initial value:

=
{ FIXED_L_SMIN, FIXED_W_SMIN, FIXED_H_SMIN, FIXED_B_SMIN }

Definition at line 127 of file dsp.hh.

Referenced by checkOverflow(), dspAbs(), dspDpaq(), dspDpsq(), dspMaq(), dspMulq(), dspMulsaq(), and dspSaturate().

const uint64_t MipsISA::FIXED_UMAX[SIMD_NUM_FMTS]

Initial value:

=
{ FIXED_L_UMAX, FIXED_W_UMAX, FIXED_H_UMAX, FIXED_B_UMAX }

Definition at line 115 of file dsp.hh.

Referenced by checkOverflow(), and dspSaturate().

const uint64_t MipsISA::FIXED_UMIN[SIMD_NUM_FMTS]

Initial value:

=
{ FIXED_L_UMIN, FIXED_W_UMIN, FIXED_H_UMIN, FIXED_B_UMIN }

Definition at line 129 of file dsp.hh.

Referenced by checkOverflow(), and dspSaturate().

const uint64_t MipsISA::FIXED_W_SMAX = ULL(0x000000007fffffff)

Definition at line 106 of file dsp.hh.

const uint64_t MipsISA::FIXED_W_SMIN = ULL(0xffffffff80000000)

Definition at line 120 of file dsp.hh.

const uint64_t MipsISA::FIXED_W_UMAX = ULL(0x00000000ffffffff)

Definition at line 110 of file dsp.hh.

const uint64_t MipsISA::FIXED_W_UMIN = ULL(0x0000000000000000)

Definition at line 124 of file dsp.hh.

Bitfield<0> MipsISA::fp

Definition at line 246 of file pra_constants.hh.

Referenced by ArmISA::bitsToFp(), ArmISA::fpToBits(), and procInfo().

const int MipsISA::FP_Reg_Base = NumIntRegs

Definition at line 279 of file registers.hh.

Bitfield<26> MipsISA::fr

Definition at line 112 of file pra_constants.hh.

const int MipsISA::FramePointerReg = 30

Definition at line 114 of file registers.hh.

Bitfield< 30 > MipsISA::g

Definition at line 85 of file dt_constants.hh.

const int MipsISA::GlobalPointerReg = 28

Definition at line 112 of file registers.hh.

Bitfield<28> MipsISA::gs

Definition at line 51 of file mt_constants.hh.

Bitfield<26> MipsISA::halt

Definition at line 46 of file dt_constants.hh.

Referenced by SimpleThread::simPalCheck(), and FullO3CPU< Impl >::simPalCheck().

const bool MipsISA::HasUnalignedMemAcc = true

Definition at line 151 of file isa_traits.hh.

MipsISA::hss

Definition at line 154 of file pra_constants.hh.

Bitfield< 2 > MipsISA::i

Definition at line 278 of file pra_constants.hh.

Referenced by bitrev(), MipsISA::ISA::clear(), copyRegs(), dspAbs(), dspAdd(), dspAddh(), dspCmp(), dspCmpg(), dspCmpgd(), dspDpa(), dspDpaq(), dspDps(), dspDpsq(), dspMaq(), dspMul(), dspMuleq(), dspMuleu(), dspMulq(), dspMulsaq(), dspPick(), dspPrece(), dspPrecrqu(), dspPrecrSra(), dspShll(), dspShra(), dspShrl(), dspSub(), dspSubh(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), MipsISA::TLB::insertAt(), MipsISA::ISA::ISA(), MipsISA::TLB::lookup(), MipsISA::TLB::probeEntry(), MipsISA::TLB::serialize(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), simdPack(), simdUnpack(), and MipsISA::TLB::unserialize().

Bitfield<18, 16> MipsISA::ia

Definition at line 236 of file pra_constants.hh.

Bitfield<24> MipsISA::ibusep

Definition at line 48 of file dt_constants.hh.

Bitfield<16> MipsISA::ics

Definition at line 72 of file mt_constants.hh.

Bitfield< 4 > MipsISA::ie

Definition at line 141 of file pra_constants.hh.

Bitfield<20, 19> MipsISA::iexi

Definition at line 52 of file dt_constants.hh.

Bitfield<21, 19> MipsISA::il

Definition at line 235 of file pra_constants.hh.

Bitfield<8> MipsISA::im0

Definition at line 131 of file pra_constants.hh.

Bitfield<9> MipsISA::im1

Definition at line 130 of file pra_constants.hh.

Bitfield<10> MipsISA::im2

Definition at line 129 of file pra_constants.hh.

Bitfield<11> MipsISA::im3

Definition at line 128 of file pra_constants.hh.

Bitfield<12> MipsISA::im4

Definition at line 127 of file pra_constants.hh.

Bitfield<13> MipsISA::im5

Definition at line 126 of file pra_constants.hh.

Bitfield<14> MipsISA::im6

Definition at line 125 of file pra_constants.hh.

Bitfield< 4, 3 > MipsISA::impl

Definition at line 90 of file mt_constants.hh.

Bitfield< 22, 0 > MipsISA::index

Definition at line 46 of file pra_constants.hh.

Referenced by _llseekFunc(), FlashDevice::accessDevice(), Prefetcher::accessUnitFilter(), Histogram::add(), archPrctlFunc(), NetDest::bitIndex(), brkFunc(), Minor::Scoreboard::canInstIssue(), StoreSet::checkInst(), chmodFunc(), chownFunc(), IntrControl::clear(), AlphaISA::Interrupts::clear(), SparcISA::Interrupts::clear(), Minor::Scoreboard::clearInstDests(), Prefetcher::clearNonunitEntry(), clock_getresFunc(), clock_gettimeFunc(), cloneFunc(), closeFunc(), VirtQueue::consumeDescriptor(), Stats::VectorBase< Vector, StatStor >::data(), Stats::Vector2dBase< Vector2d, StatStor >::data(), Stats::VectorDistBase< VectorAverageDeviation, AvgSampleStor >::data(), DVFSHandler::domainID(), SyscallDesc::doSyscall(), dup2Func(), dupFunc(), Set::elementAt(), Minor::Scoreboard::execSeqNumToWaitFor(), execveFunc(), exitImpl(), faccessatFunc(), fallocateFunc(), FALRU::FALRU(), fchmodFunc(), fchownFunc(), fcntl64Func(), fcntlFunc(), WholeTranslationState::finish(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), fstat64Func(), fstatat64Func(), fstatfsFunc(), fstatFunc(), ftruncate64Func(), ftruncateFunc(), futexFunc(), BlockBloomFilter::get_index(), getcwdFunc(), Histogram::getData(), AbstractController::getDelayVCHist(), VirtQueue::getDescriptor(), getEventQueue(), gethostnameFunc(), getMiscRegName(), X86KvmCPU::getMSR(), SparcISA::getresuidFunc(), getrlimitFunc(), getrusageFunc(), gettimeofdayFunc(), PseudoLRUPolicy::getVictim(), LTAGE::gindex(), H3BloomFilter::hash_H3(), Prefetcher::initializeStream(), Check::initiateAction(), Check::initiateCheck(), Check::initiateFlush(), Check::initiatePrefetch(), StoreSet::insertStore(), ArmISA::INTREG_ABT(), ArmISA::INTREG_FIQ(), ArmISA::INTREG_HYP(), ArmISA::INTREG_IRQ(), ArmISA::INTREG_MON(), ArmISA::INTREG_SVC(), ArmISA::INTREG_UND(), ArmISA::INTREG_USR(), ClDriver::ioctl(), ioctlFunc(), StoreSet::issued(), Prefetcher::issueNextPrefetch(), lseekFunc(), lstat64Func(), lstatFunc(), makeKvmCpuid(), Minor::Scoreboard::markupInstDests(), System::markWorkItem(), mkdirFunc(), mmapImpl(), mremapFunc(), PAL::name(), Prefetcher::observeMiss(), openImpl(), Arguments::operator+=(), Arguments::operator-=(), H3BloomFilter::operator[](), NonCountingBloomFilter::operator[](), MultiBitSelBloomFilter::operator[](), Stats::VectorProxy< Stat >::operator[](), osf_getsysinfoFunc(), osf_setsysinfoFunc(), pipeImpl(), IntrControl::post(), AlphaISA::Interrupts::post(), SparcISA::Interrupts::post(), Sinic::Device::prepareRead(), ArmISA::MemoryReg::printOffset(), ComputeUnit::DataPort::MemRespEvent::process(), pwrite64Func(), Sinic::Device::read(), Pl111::read(), BlockBloomFilter::readBit(), NonCountingBloomFilter::readBit(), readFunc(), Iob::readIob(), Iob::readJBus(), readlinkatFunc(), Set::remove(), renameatFunc(), renameFunc(), Stats::DistStor::sample(), Stats::HistStor::sample(), ComputeUnit::sendRequest(), X86KvmCPU::setMSR(), setpgidFunc(), setThreadArea32Func(), setThreadAreaFunc(), setTidAddressFunc(), setTLSFunc32(), setTLSFunc64(), setuidFunc(), LTAGE::specLoopUpdate(), stat64Func(), statfsFunc(), statFunc(), Stats::DataWrapVec< VectorStandardDeviation, VectorDistInfoProxy >::subdesc(), Stats::DataWrapVec< VectorStandardDeviation, VectorDistInfoProxy >::subname(), sys_getsysinfoFunc(), sys_setsysinfoFunc(), sysctlFunc(), sysinfoFunc(), tgkillFunc(), timeFunc(), timesFunc(), LRUPolicy::touch(), WeightedLRUPolicy::touch(), PseudoLRUPolicy::touch(), truncate64Func(), truncateFunc(), SparcISA::unameFunc(), unameFunc(), unameFunc32(), unameFunc64(), unlinkatFunc(), utimesFunc(), Sinic::Device::write(), Pl111::write(), BlockBloomFilter::writeBit(), NonCountingBloomFilter::writeBit(), writeFunc(), Iob::writeIob(), Iob::writeJBus(), writevFunc(), and Stats::DataWrapVec2d< Derived, Vector2dInfoProxy >::ysubname().

Bitfield<26> MipsISA::io

Definition at line 77 of file dt_constants.hh.

Bitfield<8> MipsISA::ip0

Definition at line 195 of file pra_constants.hh.

Bitfield<9> MipsISA::ip1

Definition at line 194 of file pra_constants.hh.

Bitfield<10> MipsISA::ip2

Definition at line 193 of file pra_constants.hh.

Bitfield<11> MipsISA::ip3

Definition at line 192 of file pra_constants.hh.

Bitfield<12> MipsISA::ip4

Definition at line 191 of file pra_constants.hh.

Bitfield<13> MipsISA::ip5

Definition at line 190 of file pra_constants.hh.

Bitfield<14> MipsISA::ip6

Definition at line 189 of file pra_constants.hh.

Referenced by Net::hsplit().

Bitfield<15, 10> MipsISA::ipl

Definition at line 122 of file pra_constants.hh.

Referenced by AlphaISA::Interrupts::checkInterrupts(), AlphaISA::Interrupts::getInterrupt(), and Kernel::Statistics::swpipl().

Bitfield<28, 26> MipsISA::ippci

Definition at line 146 of file pra_constants.hh.

MipsISA::ipti

Definition at line 145 of file pra_constants.hh.

Bitfield<24, 22> MipsISA::is

Definition at line 234 of file pra_constants.hh.

Referenced by X86ISA::m5PageFault(), and TrafficGen::parseConfig().

const uint32_t MipsISA::ITOUCH_ANNOTE = 0xffffffff

Definition at line 149 of file isa_traits.hh.

Bitfield<23> MipsISA::iv

Definition at line 183 of file pra_constants.hh.

Bitfield<10> MipsISA::ixmt

Definition at line 94 of file mt_constants.hh.

Bitfield< 1 > MipsISA::k

Definition at line 80 of file dt_constants.hh.

Referenced by ClDriver::ClDriver(), MipsISA::ISA::clear(), Profiler::collateStats(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::completeAcc(), ComputeUnit::ComputeUnit(), Debug::CompoundFlag::disable(), Debug::CompoundFlag::enable(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execSt(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execute(), Topology::extend_shortest_path(), FUPool::FUPool(), Prefetcher::initializeStream(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::initiateAcc(), ClDriver::ioctl(), and ComputeUnit::startWavefront().

Bitfield<2, 0> MipsISA::k0

Definition at line 228 of file pra_constants.hh.

Bitfield<30, 28> MipsISA::k23

Definition at line 219 of file pra_constants.hh.

const int MipsISA::KernelReg0 = 26

Definition at line 110 of file registers.hh.

const int MipsISA::KernelReg1 = 27

Definition at line 111 of file registers.hh.

const Addr MipsISA::KSeg0Base = ULL(0x80000000)

Definition at line 78 of file isa_traits.hh.

Referenced by Phys2K0Seg().

const Addr MipsISA::KSeg0End = ULL(0x9FFFFFFF)

Definition at line 77 of file isa_traits.hh.

const Addr MipsISA::KSeg0Mask = ULL(0x1FFFFFFF)

Definition at line 79 of file isa_traits.hh.

const Addr MipsISA::KSeg1Base = ULL(0xA0000000)

Definition at line 83 of file isa_traits.hh.

const Addr MipsISA::KSeg1End = ULL(0xBFFFFFFF)

Definition at line 82 of file isa_traits.hh.

const Addr MipsISA::KSeg1Mask = ULL(0x1FFFFFFF)

Definition at line 84 of file isa_traits.hh.

const Addr MipsISA::KSeg3Base = ULL(0xE0000000)

Definition at line 92 of file isa_traits.hh.

const Addr MipsISA::KSeg3End = ULL(0xFFFFFFFF)

Definition at line 91 of file isa_traits.hh.

const Addr MipsISA::KSSegBase = ULL(0xC0000000)

Definition at line 88 of file isa_traits.hh.

const Addr MipsISA::KSSegEnd = ULL(0xDFFFFFFF)

Definition at line 87 of file isa_traits.hh.

Bitfield<4, 3> MipsISA::ksu

Definition at line 136 of file pra_constants.hh.

Bitfield<27, 25> MipsISA::ku

Definition at line 220 of file pra_constants.hh.

Bitfield<5> MipsISA::l

Definition at line 322 of file pra_constants.hh.

Referenced by ProbePointArg< Packet >::addListener(), PerfectSwitch::addOutPort(), CacheBlk::checkWrite(), CacheBlk::clearLoadLocks(), ProbePointArg< Packet >::notify(), operator>(), MathExpr::parse(), RubyPort::PioSlavePort::recvTimingReq(), NoncoherentXBar::regStats(), CoherentXBar::regStats(), ProbePointArg< Packet >::removeListener(), PhysicalMemory::serialize(), CacheBlk::trackLoadLocked(), CoherentXBar::~CoherentXBar(), NoncoherentXBar::~NoncoherentXBar(), and ProbeListenerObject::~ProbeListenerObject().

Bitfield<7> MipsISA::lpa

Definition at line 266 of file pra_constants.hh.

Bitfield<28> MipsISA::lsnm

Definition at line 44 of file dt_constants.hh.

Bitfield< 11, 3 > MipsISA::mask

Definition at line 72 of file pra_constants.hh.

Referenced by MipsISA::ISA::configCP().

Bitfield<12, 11> MipsISA::maskx

Definition at line 73 of file pra_constants.hh.

const int MipsISA::Max_Reg_Index = Misc_Reg_Base + NumMiscRegs

Definition at line 282 of file registers.hh.

const int MipsISA::MaxShadowRegSets = 16

Definition at line 54 of file registers.hh.

Bitfield<23> MipsISA::mcheckep

Definition at line 49 of file dt_constants.hh.

Bitfield<5> MipsISA::md

Definition at line 241 of file pra_constants.hh.

const uint32_t MipsISA::MIPS32_QNAN = 0x7fbfffff

Definition at line 59 of file registers.hh.

const uint64_t MipsISA::MIPS64_QNAN = ULL(0x7ff7ffffffffffff)

Definition at line 60 of file registers.hh.

const int MipsISA::Misc_Reg_Base = CC_Reg_Base + NumCCRegs

Definition at line 281 of file registers.hh.

Referenced by forkThread(), and yieldThread().

Bitfield<30, 25> MipsISA::mmuSize

Definition at line 233 of file pra_constants.hh.

Bitfield<11, 7> MipsISA::mode

Definition at line 97 of file dt_constants.hh.

Bitfield< 2 > MipsISA::mt

Definition at line 225 of file pra_constants.hh.

Bitfield<1> MipsISA::mvp

Definition at line 73 of file mt_constants.hh.

Bitfield<24> MipsISA::mx

Definition at line 114 of file pra_constants.hh.

Bitfield<19> MipsISA::nmi

Definition at line 119 of file pra_constants.hh.

Bitfield<29> MipsISA::nodcr

Definition at line 43 of file dt_constants.hh.

const ExtMachInst MipsISA::NoopMachInst = 0x00000000

Definition at line 146 of file isa_traits.hh.

Bitfield<9> MipsISA::nosst

Definition at line 61 of file dt_constants.hh.

const Addr MipsISA::NPtePage = ULL(1) << NPtePageShift

Definition at line 66 of file isa_traits.hh.

const Addr MipsISA::NPtePageShift = PageShift - PteShift

Definition at line 65 of file isa_traits.hh.

const int MipsISA::NumCCRegs = 0

Definition at line 57 of file registers.hh.

Referenced by copyRegs().

const int MipsISA::NumFloatArchRegs = 32

Definition at line 51 of file registers.hh.

const int MipsISA::NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs

Definition at line 56 of file registers.hh.

Referenced by copyRegs().

const int MipsISA::NumFloatSpecialRegs = 5

Definition at line 52 of file registers.hh.

const int MipsISA::NumIntArchRegs = 32

Definition at line 49 of file registers.hh.

const int MipsISA::NumIntRegs = NumIntArchRegs + NumIntSpecialRegs

Definition at line 55 of file registers.hh.

Referenced by copyRegs().

const int MipsISA::NumIntSpecialRegs = 9

Definition at line 50 of file registers.hh.

const int MipsISA::NumMiscRegs = MISCREG_NUMREGS

Definition at line 276 of file registers.hh.

Referenced by MipsISA::ISA::clear(), copyRegs(), and MipsISA::ISA::ISA().

Bitfield<7> MipsISA::offline

Definition at line 63 of file dt_constants.hh.

Bitfield<0> MipsISA::on

Definition at line 89 of file dt_constants.hh.

Bitfield<0> MipsISA::p

Definition at line 325 of file pra_constants.hh.

Referenced by ProbeManager::addListener(), ProbeManager::addPoint(), DRAMCtrl::addToReadQueue(), archPrctlFunc(), atomic_read(), atomic_write(), ArmISA::ISA::clear(), BaseRemoteGDB::cmd_async_cont(), BaseRemoteGDB::cmd_async_step(), BaseRemoteGDB::cmd_clr_hw_bkpt(), BaseRemoteGDB::cmd_cont(), BaseRemoteGDB::cmd_mem_r(), BaseRemoteGDB::cmd_mem_w(), BaseRemoteGDB::cmd_reg_w(), BaseRemoteGDB::cmd_set_hw_bkpt(), BaseRemoteGDB::cmd_set_thread(), BaseRemoteGDB::cmd_step(), VirtIO9PSocket::connectSocket(), FrameBuffer::copyIn(), FrameBuffer::copyOut(), Linux::ThreadInfo::curThreadInfo(), Packet::dataStaticConst(), DRAMCtrl::doDRAMAccess(), doGzipLoad(), execveFunc(), FrameBuffer::fill(), VGic::findHighestPendingLR(), CoherentXBar::forwardAtomic(), CoherentXBar::forwardFunctional(), CoherentXBar::forwardTiming(), IGbE::TxDescCache::getPacketData(), IndirectPredictor::getSetIndex(), PacketQueue::hasAddr(), if(), CoherentXBar::init(), ListOperand::init(), FunctionRefOperand::init(), BaseRegOperand::init_from_vect(), ImmOperand< T >::init_from_vect(), MultiLevelPageTable< ISAOps >::initState(), ArmSystem::initState(), GenericPageTableFault::invoke(), AlphaISA::NDtbMissFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), SparcISA::SpillNNormal::invoke(), AlphaISA::ItbPageFault::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), MultiLevelPageTable< ISAOps >::isUnmapped(), MultiLevelPageTable< ISAOps >::lookup(), MultiLevelPageTable< ISAOps >::map(), SnoopFilter::maskToPortList(), DRAMCtrl::minBankPrep(), mmap2Func(), mmapFunc(), RawDiskImage::notifyFork(), VPtr< T >::operator=(), MathExpr::parse(), WriteMask::performAtomic(), Printk(), BrigObject::processDirectives(), ClockedObject::pwrState(), DRAMSim2::readComplete(), PseudoInst::readfile(), BaseRemoteGDB::recv(), NoncoherentXBar::recvFunctional(), SimpleMemory::recvFunctional(), CoherentXBar::recvFunctional(), CoherentXBar::recvFunctionalSnoop(), BaseXBar::recvRangeChange(), BaseMemProbe::regProbeListeners(), StackDistProbe::regStats(), MultiLevelPageTable< ISAOps >::remap(), ProbeManager::removeListener(), RubyPort::ruby_eviction_callback(), BaseRemoteGDB::send(), ComputeUnit::sendRequest(), SymbolTable::serialize(), Packet::setData(), Stats::Info::setName(), SETranslatingPortProxy::setPageTable(), EtherInt::setPeer(), SETranslatingPortProxy::setProcess(), ThreadState::setProcessPtr(), SnoopFilter::setSlavePorts(), CheckerCPU::setSystem(), VirtIO9PDiod::startDiod(), BaseKvmCPU::startup(), MathExprPowerModel::startup(), BaseKvmCPU::startupThread(), DmaReadFifo::stopFill(), timeFunc(), TrafficGen::transition(), GenericTLB::translateAtomic(), MipsISA::TLB::translateData(), PowerISA::TLB::translateData(), MipsISA::TLB::translateInst(), PowerISA::TLB::translateInst(), ArmISA::TLB::translateSe(), MultiLevelPageTable< ISAOps >::unmap(), MultiLevelPageTable< ISAOps >::walk(), System::workItemBegin(), System::workItemEnd(), DRAMSim2::writeComplete(), CoherentXBar::~CoherentXBar(), DmaReadFifo::~DmaReadFifo(), and QueuedPrefetcher::~QueuedPrefetcher().

const unsigned MipsISA::PABits = 32

Definition at line 102 of file isa_traits.hh.

Bitfield<0> MipsISA::paco

Definition at line 132 of file dt_constants.hh.

const Addr MipsISA::PAddrImplMask = (ULL(1) << PABits) - 1

Definition at line 109 of file isa_traits.hh.

const Addr MipsISA::Page_Mask = ~(PageBytes - 1)

Definition at line 55 of file isa_traits.hh.

const Addr MipsISA::PageBytes = ULL(1) << PageShift

Definition at line 54 of file isa_traits.hh.

Referenced by MipsProcess::argsInit(), RoundPage(), and TruncPage().

const Addr MipsISA::PageOffset = PageBytes - 1

Definition at line 56 of file isa_traits.hh.

Referenced by VAddrOffset().

const Addr MipsISA::PageShift = 13

Definition at line 53 of file isa_traits.hh.

Referenced by VAddrVPN().

Bitfield<4> MipsISA::pc

Definition at line 242 of file pra_constants.hh.

Referenced by MipsISA::StackTrace::decodePrologue(), haltThread(), and MipsISA::MipsFaultBase::setExceptionState().

Bitfield<26> MipsISA::pci

Definition at line 181 of file pra_constants.hh.

Bitfield<27> MipsISA::pcp

Definition at line 52 of file mt_constants.hh.

Bitfield<29, 6> MipsISA::pfn

Definition at line 57 of file pra_constants.hh.

Referenced by ArmISA::TLB::insert().

Bitfield<15, 8> MipsISA::procId

Definition at line 205 of file pra_constants.hh.

Referenced by MipsISA::ISA::configCP().

Bitfield<9, 6> MipsISA::pss

Definition at line 160 of file pra_constants.hh.

Bitfield<7, 6> MipsISA::pState

Definition at line 321 of file pra_constants.hh.

MipsISA::pTagLo

Definition at line 320 of file pra_constants.hh.

Bitfield<7, 0> MipsISA::ptc

Definition at line 56 of file mt_constants.hh.

MipsISA::pteBase

Definition at line 65 of file pra_constants.hh.

const Addr MipsISA::PteMask = NPtePage - 1

Definition at line 67 of file isa_traits.hh.

const Addr MipsISA::PteShift = 3

Definition at line 64 of file isa_traits.hh.

Bitfield<25, 16> MipsISA::ptlbe

Definition at line 53 of file mt_constants.hh.

Bitfield<13, 10> MipsISA::pvpe

Definition at line 55 of file mt_constants.hh.

Bitfield<23> MipsISA::px

Definition at line 115 of file pra_constants.hh.

Bitfield< 1 > MipsISA::r

Definition at line 97 of file pra_constants.hh.

Referenced by __to_number(), AddrRange::AddrRange(), DRAMCtrl::allRanksDrained(), Set::AND(), bitrev(), BPredUnit::BPredUnit(), ArmISA::TLB::checkPermissions64(), ArmISA::decodeMrsMsrBankedReg(), doGzipLoad(), DRAMCtrl::drain(), DRAMCtrl::drainResume(), ArmISA::fp64_sqrt(), RubyPort::PioSlavePort::getAddrRanges(), PhysicalMemory::getConfAddrRanges(), Sequencer::getHitTypeMachLatencyHist(), Sequencer::getMissTypeMachLatencyHist(), GPUCoalescer::getMissTypeMachLatencyHist(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), BaseRemoteGDB::hex2i(), BaseCache::inRange(), Sequencer::insertRequest(), GPUCoalescer::insertRequest(), Set::intersectionIsEmpty(), PhysicalMemory::isMemAddr(), Set::isSuperset(), lookupTraceForAddress(), main(), operator!=(), AddrRange::operator!=(), operator+(), operator-(), operator==(), operator>(), Set::OR(), MathExpr::parse(), PersistentTable::persistentRequestLock(), DRAMCtrl::processNextReqEvent(), ArmISA::recipEstimate(), ArmISA::recipSqrtEstimate(), RubyPort::PioMasterPort::recvRangeChange(), BaseXBar::recvRangeChange(), DRAMCtrl::regStats(), Cache::sendMSHRQueuePacket(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), AlphaISA::RemoteGDB::AlphaGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), DRAMCtrl::startup(), and LinearSystem::toStr().

Bitfield<3> MipsISA::r0

Definition at line 138 of file pra_constants.hh.

MipsISA::random

Definition at line 52 of file pra_constants.hh.

Referenced by StatTest::run().

Bitfield<25> MipsISA::re

Definition at line 113 of file pra_constants.hh.

const int MipsISA::ReturnAddressReg = 31

Definition at line 115 of file registers.hh.

Referenced by MipsISA::StackTrace::decodePrologue(), and skipFunction().

const int MipsISA::ReturnValueReg = 2

Definition at line 108 of file registers.hh.

Bitfield<7, 0> MipsISA::rev

Definition at line 206 of file pra_constants.hh.

Bitfield<15, 10> MipsISA::ripl

Definition at line 186 of file pra_constants.hh.

Bitfield<24, 23> MipsISA::rnst

Definition at line 87 of file mt_constants.hh.

Bitfield< 2 > MipsISA::s

Definition at line 81 of file dt_constants.hh.

Bitfield<3, 0> MipsISA::sa

Definition at line 258 of file pra_constants.hh.

Referenced by dspExtr(), dspMulq(), dspPrece(), dspPrecrSra(), and dspShra().

Bitfield<18> MipsISA::scs

Definition at line 70 of file mt_constants.hh.

const uint32_t MipsISA::SIMD_LOG2N[SIMD_NUM_FMTS] = { 6, 5, 4, 3 }

Definition at line 101 of file dsp.hh.

Referenced by dspShll(), dspShra(), and dspShrl().

const uint32_t MipsISA::SIMD_MAX_VALS = 4

Definition at line 95 of file dsp.hh.

Referenced by dspAbs(), dspAdd(), dspAddh(), dspCmp(), dspCmpg(), dspCmpgd(), dspDpa(), dspDpaq(), dspDps(), dspDpsq(), dspMaq(), dspMul(), dspMuleq(), dspMuleu(), dspMulq(), dspMulsa(), dspMulsaq(), dspPack(), dspPick(), dspPrece(), dspPrecrq(), dspPrecrqu(), dspPrecrSra(), dspShll(), dspShra(), dspShrl(), dspSub(), and dspSubh().

const uint32_t MipsISA::SIMD_NBITS[SIMD_NUM_FMTS] = { 64, 32, 16, 8 }

Definition at line 99 of file dsp.hh.

Referenced by dspMulq(), dspPrece(), dspPrecrqu(), signExtend(), simdPack(), and simdUnpack().

const uint32_t MipsISA::SIMD_NVALS[SIMD_NUM_FMTS] = { 1, 1, 2, 4 }

Definition at line 97 of file dsp.hh.

Referenced by dspAbs(), dspAdd(), dspAddh(), dspCmp(), dspCmpg(), dspCmpgd(), dspDpa(), dspDpaq(), dspDps(), dspDpsq(), dspMaq(), dspMul(), dspMuleq(), dspMuleu(), dspMulq(), dspMulsaq(), dspPick(), dspPrece(), dspPrecrSra(), dspShll(), dspShra(), dspShrl(), dspSub(), dspSubh(), simdPack(), and simdUnpack().

Bitfield<7, 4> MipsISA::sl

Definition at line 257 of file pra_constants.hh.

Bitfield<1> MipsISA::sm

Definition at line 272 of file pra_constants.hh.

Bitfield<4> MipsISA::sp

Definition at line 269 of file pra_constants.hh.

Bitfield<20> MipsISA::sr

Definition at line 118 of file pra_constants.hh.

Referenced by DistIface::SyncEvent::process().

Bitfield<11, 8> MipsISA::ss

Definition at line 256 of file pra_constants.hh.

Bitfield<8> MipsISA::sst

Definition at line 62 of file dt_constants.hh.

Bitfield<3, 0> MipsISA::ssv0

Definition at line 173 of file pra_constants.hh.

Bitfield<7, 4> MipsISA::ssv1

Definition at line 172 of file pra_constants.hh.

Bitfield<11, 8> MipsISA::ssv2

Definition at line 171 of file pra_constants.hh.

Bitfield<15, 12> MipsISA::ssv3

Definition at line 170 of file pra_constants.hh.

Bitfield<19, 16> MipsISA::ssv4

Definition at line 169 of file pra_constants.hh.

Bitfield<23, 20> MipsISA::ssv5

Definition at line 168 of file pra_constants.hh.

Bitfield<27, 24> MipsISA::ssv6

Definition at line 167 of file pra_constants.hh.

MipsISA::ssv7

Definition at line 166 of file pra_constants.hh.

const int MipsISA::StackPointerReg = 29

Definition at line 113 of file registers.hh.

Bitfield<2> MipsISA::stlb

Definition at line 43 of file mt_constants.hh.

Bitfield<15, 12> MipsISA::su

Definition at line 255 of file pra_constants.hh.

Bitfield<6> MipsISA::sx

Definition at line 134 of file pra_constants.hh.

Bitfield<2, 0> MipsISA::syp

Definition at line 101 of file dt_constants.hh.

const int MipsISA::SyscallPseudoReturnReg = 3

Definition at line 117 of file registers.hh.

const int MipsISA::SyscallSuccessReg = 7

Definition at line 106 of file registers.hh.

Bitfield<19, 16> MipsISA::ta

Definition at line 254 of file pra_constants.hh.

Bitfield<7, 0> MipsISA::targTC

Definition at line 63 of file mt_constants.hh.

Bitfield<27> MipsISA::tb

Definition at line 76 of file dt_constants.hh.

Bitfield<17> MipsISA::tbe

Definition at line 80 of file mt_constants.hh.

Referenced by SparcISA::vtophys().

Bitfield<4> MipsISA::tbi

Definition at line 99 of file dt_constants.hh.

Bitfield<3> MipsISA::tbu

Definition at line 100 of file dt_constants.hh.

Bitfield<15> MipsISA::tca

Definition at line 54 of file mt_constants.hh.

Bitfield<19, 12> MipsISA::tcnum

Definition at line 96 of file dt_constants.hh.

Bitfield<19> MipsISA::tcs

Definition at line 69 of file mt_constants.hh.

MipsISA::tcu

Definition at line 85 of file mt_constants.hh.

Bitfield<20> MipsISA::tcv

Definition at line 95 of file dt_constants.hh.

Bitfield<21> MipsISA::tds

Definition at line 88 of file mt_constants.hh.

Bitfield<15> MipsISA::te

Definition at line 62 of file mt_constants.hh.

Referenced by ArmISA::TLB::_flushMva(), ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doL2Descriptor(), ArmISA::TableWalker::doLongDescriptor(), ArmISA::TLB::flushAllNs(), ArmISA::TLB::flushAllSecurity(), ArmISA::TLB::flushAsid(), ArmISA::TableWalker::insertTableEntry(), ArmISA::TLB::printTlb(), ArmISA::TableWalker::processWalkWrapper(), and ArmISA::TLB::translateFs().

Bitfield<3> MipsISA::tfcr

Definition at line 86 of file dt_constants.hh.

Bitfield<30> MipsISA::ti

Definition at line 178 of file pra_constants.hh.

Referenced by LinuxAlphaSystem::PrintThreadInfo::process(), LinuxMipsSystem::PrintThreadInfo::process(), DumpStatsPCEvent::process(), and ArmISA::TLB::setTestInterface().

Bitfield<1> MipsISA::tim

Definition at line 88 of file dt_constants.hh.

Bitfield<12, 11> MipsISA::tksu

Definition at line 93 of file mt_constants.hh.

Bitfield< 0 > MipsISA::tl

Definition at line 253 of file pra_constants.hh.

Referenced by SparcISA::copyMiscRegs(), SparcISA::SparcFaultBase::invoke(), SparcISA::ISA::setFSReg(), SparcISA::TLB::translateData(), and SparcISA::TLB::translateInst().

Bitfield<29> MipsISA::tlbs

Definition at line 50 of file mt_constants.hh.

Bitfield<2> MipsISA::tlsm

Definition at line 87 of file dt_constants.hh.

Bitfield<27> MipsISA::tmx

Definition at line 86 of file mt_constants.hh.

const int MipsISA::TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs

Definition at line 284 of file registers.hh.

Bitfield< 27, 24 > MipsISA::ts

Definition at line 117 of file pra_constants.hh.

Referenced by sleep().

Bitfield<30, 28> MipsISA::tu

Definition at line 251 of file pra_constants.hh.

Bitfield<1> MipsISA::tup

Definition at line 131 of file dt_constants.hh.

Bitfield< 3 > MipsISA::u

Definition at line 82 of file dt_constants.hh.

Bitfield<4> MipsISA::um

Definition at line 137 of file pra_constants.hh.

const Addr MipsISA::USegBase = ULL(0x0)

Definition at line 73 of file isa_traits.hh.

const Addr MipsISA::USegEnd = ULL(0x7FFFFFFF)

Definition at line 74 of file isa_traits.hh.

Bitfield<30> MipsISA::ut

Definition at line 75 of file dt_constants.hh.

Bitfield<5> MipsISA::ux

Definition at line 135 of file pra_constants.hh.

Bitfield<1> MipsISA::v

Definition at line 60 of file pra_constants.hh.

const unsigned MipsISA::VABits = 32

Definition at line 101 of file isa_traits.hh.

MipsISA::vaddr

Definition at line 277 of file pra_constants.hh.

Referenced by ArmISA::TLB::checkPermissions(), ArmISA::TLB::checkPermissions64(), Process::clone(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execSt(), AlphaISA::TLB::flushAddr(), ArmISA::TLB::getTE(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::initiateAcc(), FetchUnit::initiateFetch(), AlphaISA::TLB::insert(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), AlphaISA::ItbPageFault::invoke(), FuncPageTable::map(), ComputeUnit::DTLBPort::recvReqRetry(), ComputeUnit::ITLBPort::recvReqRetry(), ComputeUnit::DTLBPort::recvTimingResp(), FuncPageTable::remap(), ComputeUnit::sendRequest(), Request::setVirt(), SparcISA::TLB::translateData(), ArmISA::TLB::translateFs(), SparcISA::TLB::translateInst(), ArmISA::TLB::translateSe(), SETranslatingPortProxy::tryReadString(), SETranslatingPortProxy::tryWriteString(), FuncPageTable::unserialize(), PageTableBase::updateCache(), X86ISA::vtophys(), AlphaISA::vtophys(), and Sinic::Device::write().

const Addr MipsISA::VAddrImplMask = (ULL(1) << VABits) - 1

Definition at line 103 of file isa_traits.hh.

Referenced by VAddrImpl().

const Addr MipsISA::VAddrUnImplMask = ~VAddrImplMask

Definition at line 104 of file isa_traits.hh.

Bitfield<6, 5> MipsISA::validModes

Definition at line 98 of file dt_constants.hh.

Bitfield<6> MipsISA::veic

Definition at line 267 of file pra_constants.hh.

Bitfield<3> MipsISA::vi

Definition at line 227 of file pra_constants.hh.

Bitfield<5> MipsISA::vint

Definition at line 268 of file pra_constants.hh.

Bitfield<0> MipsISA::vpa

Definition at line 74 of file mt_constants.hh.

Bitfield<1> MipsISA::vpc

Definition at line 44 of file mt_constants.hh.

Bitfield<39, 13> MipsISA::vpn2

Definition at line 99 of file pra_constants.hh.

Bitfield<12, 11> MipsISA::vpn2x

Definition at line 100 of file pra_constants.hh.

Bitfield<9, 5> MipsISA::vs

Definition at line 148 of file pra_constants.hh.

Bitfield< 30 > MipsISA::w

Definition at line 280 of file pra_constants.hh.

Referenced by ComputeUnit::AllAtBarrier(), HsailISA::Call::calcAddr(), RegAddrOperand< RegOperandType >::calcLane(), RegAddrOperand< RegOperandType >::calcVector(), ArmISA::TLB::checkPermissions64(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::completeAcc(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::completeAcc(), LocalMemPipeline::exec(), GlobalMemPipeline::exec(), HsailISA::Call::execPseudoInst(), HsailISA::BrnInstBase< TargetType >::execute(), HsailISA::LdaInst< DestDataType, AddrOperandType >::execute(), HsailISA::CbrInstBase< TargetType >::execute(), HsailISA::BrInstBase< TargetType >::execute(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::execute(), HsailISA::Ret::execute(), HsailISA::Barrier::execute(), HsailISA::MemFence::execute(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execute(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execute(), SRegOperand::get(), DRegOperand::get(), CRegOperand::get(), ImmOperand< SrcCType >::get(), RegOrImmOperand< RegOperand, T >::get(), ListOperand::get(), PowerModel::getDynamicPower(), PowerModel::getStaticPower(), SRegOperand::getTarget(), HsailISA::Call::MagicAtomicNRAddGlobalU32Reg(), HsailISA::Call::MagicAtomicNRAddGroupU32Reg(), HsailISA::Call::MagicMaskLower(), HsailISA::Call::MagicMaskUpper(), HsailISA::Call::MagicMostSigBroadcast(), HsailISA::Call::MagicMostSigThread(), HsailISA::Call::MagicPanic(), HsailISA::Call::MagicPrefixSum(), HsailISA::Call::MagicPrintLane(), HsailISA::Call::MagicPrintLane64(), HsailISA::Call::MagicPrintWF32(), HsailISA::Call::MagicPrintWF32ID(), HsailISA::Call::MagicPrintWF64(), HsailISA::Call::MagicPrintWFFloat(), HsailISA::Call::MagicPrintWFID64(), HsailISA::Call::MagicReduction(), HsailISA::Call::MagicXactCasLd(), ComputeUnit::DataPort::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::StartWorkgroup(), and VGic::writeVCpu().

MipsISA::wired

Definition at line 88 of file pra_constants.hh.

Bitfield<22> MipsISA::wp

Definition at line 184 of file pra_constants.hh.

Bitfield<3> MipsISA::wr

Definition at line 243 of file pra_constants.hh.

Bitfield<28, 21> MipsISA::xtc

Definition at line 68 of file mt_constants.hh.

const int MipsISA::ZeroReg = 0

Definition at line 104 of file registers.hh.

Referenced by zeroRegisters().