46 #include "debug/PL111.hh"
47 #include "debug/Uart.hh"
60 :
AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
61 lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
63 clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
64 clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
65 clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
66 pixelClock(p->pixel_clock),
68 vnc(p->vnc), bmp(&
fb), pic(NULL),
69 width(LcdMaxWidth), height(LcdMaxHeight),
70 bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
71 waterMark(0), dmaPendingNum(0), readEvent(this), fillFifoEvent(this),
72 dmaDoneEventAll(maxOutstandingDma, this),
73 dmaDoneEventFree(maxOutstandingDma),
74 intEvent(this), enableCapture(p->enable_capture)
110 DPRINTF(PL111,
" read register %#x size=%d\n", daddr, pkt->
getSize());
144 panic(
"LCD register at offset %#x is Write-Only\n", daddr);
174 panic(
"CLCD register at offset %#x is Write-Only\n", daddr);
185 data = pkt->
get<uint32_t>();
187 }
else if (daddr >=
CrsrImage && daddr <= 0xBFC) {
193 }
else if (daddr >=
LcdPalette && daddr <= 0x3FC) {
200 panic(
"Tried to read CLCD register at offset %#x that "
201 "doesn't exist\n", daddr);
217 panic(
"CLCD controller read size too big?\n");
236 data = pkt->
get<uint8_t>();
239 data = pkt->
get<uint16_t>();
242 data = pkt->
get<uint32_t>();
245 panic(
"PL111 CLCD controller write size too big?\n");
254 DPRINTF(PL111,
" write register %#x value %#x size=%d\n", daddr,
276 DPRINTF(PL111,
"####### Upper panel base set to: %#x #######\n",
lcdUpbase);
279 warn_once(
"LCD dual screen mode not supported\n");
301 panic(
"Interrupting on vcomp not supported\n");
310 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
313 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
316 lcdRis = lcdRis & ~data;
324 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
327 panic(
"LCD register at offset %#x is Read-Only\n", daddr);
354 panic(
"CLCD register at offset %#x is Read-Only\n", daddr);
357 panic(
"CLCD register at offset %#x is Read-Only\n", daddr);
360 if (daddr >=
CrsrImage && daddr <= 0xBFC) {
366 }
else if (daddr >=
LcdPalette && daddr <= 0x3FC) {
373 panic(
"Tried to write PL111 register at offset %#x that "
374 "doesn't exist\n", daddr);
407 panic(
"Unimplemented video mode\n");
413 offsets[2], offsets[1], offsets[0],
419 offsets[0], offsets[1], offsets[2],
487 assert(!
event->scheduled());
511 warn(
"CLCD controller buffer underrun, took %d ticks when should"
524 DPRINTF(PL111,
"-- write out frame buffer into bmp\n");
554 DPRINTF(PL111,
"Serializing ARM PL111\n");
574 uint8_t lcdImsc_serial =
lcdImsc;
577 uint8_t lcdRis_serial =
lcdRis;
580 uint8_t lcdMis_serial =
lcdMis;
617 Tick int_event_time = 0;
618 Tick read_event_time = 0;
619 Tick fill_fifo_event_time = 0;
644 DPRINTF(PL111,
"Unserializing ARM PL111\n");
646 uint32_t lcdTiming0_serial;
650 uint32_t lcdTiming1_serial;
654 uint32_t lcdTiming2_serial;
658 uint32_t lcdTiming3_serial;
665 uint32_t lcdControl_serial;
669 uint8_t lcdImsc_serial;
673 uint8_t lcdRis_serial;
677 uint8_t lcdMis_serial;
691 uint8_t clcdCrsrImsc_serial;
695 uint8_t clcdCrsrIcr_serial;
699 uint8_t clcdCrsrRis_serial;
703 uint8_t clcdCrsrMis_serial;
719 Tick int_event_time = 0;
720 Tick read_event_time = 0;
721 Tick fill_fifo_event_time = 0;
731 if (fill_fifo_event_time)
739 if (dma_done_event_tick[
x])
757 DPRINTF(PL111,
"Generate Interrupt: lcdImsc=0x%x lcdRis=0x%x lcdMis=0x%x\n",
759 lcdMis = lcdImsc &
lcdRis;
761 if (lcdMis.underflow || lcdMis.baseaddr || lcdMis.vcomp || lcdMis.ahbmaster) {
763 DPRINTF(PL111,
" -- Generated\n");
776 Pl111Params::create()
778 return new Pl111(
this);
AddrRange RangeSize(Addr start, Addr size)
uint32_t clcdCrsrPalette1
static const int LcdTiming2
static const int CrsrImage
std::ostream * stream() const
Get the output underlying output stream.
void set(T v, ByteOrder endian)
Set the value in the data pointer to v using the specified endianness.
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
uint32_t clcdCrsrCtrl
Cursor control register.
static const int LcdLpBase
virtual void clearInt(uint32_t num)=0
Clear an interrupt from a device that is connected to the GIC.
InterruptReg lcdMis
Masked interrupt status register.
VncInput * vnc
VNC server.
AmbaDmaDeviceParams Params
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
void resize(unsigned width, unsigned height)
Resize the frame buffer.
Cycles ticksToCycles(Tick t) const
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
EventWrapper< Pl111,&Pl111::readFramebuffer > readEvent
DMA framebuffer read event.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
static const int LcdTiming1
static const int buffer_size
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
void copyIn(const uint8_t *fb, const PixelConverter &conv)
Fill the frame buffer with pixel data from an external buffer of the same width and height as this fr...
static const int LcdTiming0
ARM PL111 register map.
bool scheduled() const
Determine if the current event is scheduled.
uint32_t waterMark
DMA FIFO watermark.
uint16_t height
Frame buffer height - lines per panel.
void updateVideoParams()
Send updated parameters to the vnc server.
Addr maxAddr
Frame buffer max address.
static const int ClcdCrsrConfig
void dmaDone()
DMA done event.
static const int LcdTiming3
TimingReg1 lcdTiming1
Vertical axis panel control register.
static const int LcdPalette
uint32_t lcdUpbase
Upper panel frame base address register.
T get(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness.
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
InterruptReg lcdRis
Raw interrupt status register - const.
EventWrapper< Pl111,&Pl111::generateInterrupt > intEvent
Wrapper to create an event out of the interrupt.
uint32_t clcdCrsrXY
Cursor XY position register.
#define UNSERIALIZE_SCALAR(scalar)
TimingReg3 lcdTiming3
Line end control register.
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
#define SERIALIZE_CONTAINER(member)
ControlReg lcdControl
Control register.
Tick curTick()
The current simulated tick.
std::string csprintf(const char *format, const Args &...args)
static const int LcdControl
Tick pixelClock
Pixel clock.
void startDma()
start the dmas off after power is enabled
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
Tick when() const
Get the time that the event is scheduled.
virtual void sendInt(uint32_t num)=0
Post an interrupt from a device that is connected to the GIC.
void makeAtomicResponse()
uint64_t Tick
Tick count type.
static const int ClcdCrsrXY
uint32_t clcdCrsrClip
Cursor clip position register.
The request is to an uncacheable address.
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
static const int ClcdCrsrClip
#define SERIALIZE_ARRAY(member, size)
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
static const int ClcdCrsrRis
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
DmaDoneEvent(Pl111 *_obj)
Event wrapper for dmaDone()
static const int LcdUpCurr
Addr curAddr
Frame buffer current address.
static const int ClcdCrsrPalette1
uint32_t lcdLpbase
Lower panel frame base address register.
Bitmap bmp
Helper to write out bitmaps.
void fillFifo()
fillFIFO event
#define UNSERIALIZE_CONTAINER(member)
bool readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
uint8_t bytesPerPixel
Bytes per pixel.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
static const int maxOutstandingDma
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
static const int LcdLpCurr
Tick startTime
Start time for frame buffer dma read.
static const uint64_t AMBA_ID
static const int CrsrImageSize
static const int ClcdCrsrMis
uint32_t clcdCrsrConfig
Cursor configuration register.
Implementiation of a PL111 CLCD controller.
RequestPtr dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, uint8_t *data, Tick delay, Request::Flags flag=0)
#define SERIALIZE_SCALAR(scalar)
#define UNSERIALIZE_ARRAY(member, size)
static const int LcdUpBase
uint32_t dmaPendingNum
Number of pending dma reads.
void write(std::ostream &bmp) const
Write the frame buffer data into the provided ostream.
virtual const std::string name() const
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism...
Base class for ARM GIC implementations.
Declaration of the Packet class.
std::ostream CheckpointOut
PixelConverter pixelConverter() const
static const int ClcdCrsrIcr
InterruptReg lcdImsc
Interrupt mask set/clear register.
Addr startAddr
Frame buffer base address.
EventWrapper< Pl111,&Pl111::fillFifo > fillFifoEvent
Fill fifo.
static const int ClcdCrsrCtrl
void schedule(Event &event, Tick when)
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
void serialize(CheckpointOut &cp) const override
Serialize an object.
TimingReg0 lcdTiming0
Horizontal axis panel control register.
TimingReg2 lcdTiming2
Clock and signal polarity control register.
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
uint32_t clcdCrsrPalette0
Cursor palette registers.
void readFramebuffer()
DMA framebuffer read.
Configurable RGB pixel converter.
void generateInterrupt()
Function to generate interrupt.
static const int ClcdCrsrPalette0
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
OutputStream * pic
Picture of what the current frame buffer looks like.
static const int ClcdCrsrImsc
uint16_t width
Frame buffer width - pixels per line.
static const int LcdPaletteSize