A Packet is used to encapsulate a transfer between two objects in the memory system (e.g., the L1 and L2 cache). More...

#include <packet.hh>

Inheritance diagram for Packet:

Classes
class	PrintReqState
	Object used to maintain state of a PrintReq. More...

struct	SenderState
	A virtual base opaque structure used to hold state associated with the packet (e.g., an MSHR), specific to a MemObject that sees the packet. More...

Public Types
typedef uint32_t	FlagsType

typedef ::Flags< FlagsType >	Flags

typedef MemCmd::Command	Command

Public Member Functions
void	pushSenderState (SenderState *sender_state)
	Push a new sender state to the packet and make the current sender state the predecessor of the new one. More...

SenderState *	popSenderState ()
	Pop the top of the state stack and return a pointer to it. More...

template<typename T >
T *	findNextSenderState () const
	Go through the sender state stack and return the first instance that is of type T (as determined by a dynamic_cast). More...

const std::string &	cmdString () const
	Return the string name of the cmd field (for debugging and tracing). More...

int	cmdToIndex () const
	Return the index of this command. More...

bool	isRead () const

bool	isWrite () const

bool	isUpgrade () const

bool	isRequest () const

bool	isResponse () const

bool	needsWritable () const

bool	needsResponse () const

bool	isInvalidate () const

bool	isEviction () const

bool	fromCache () const

bool	isWriteback () const

bool	hasData () const

bool	hasRespData () const

bool	isLLSC () const

bool	isError () const

bool	isPrint () const

bool	isFlush () const

void	setExpressSnoop ()
	The express snoop flag is used for two purposes. More...

bool	isExpressSnoop () const

void	setResponderHadWritable ()
	On responding to a snoop request (which only happens for Modified or Owned lines), make sure that we can transform an Owned response to a Modified one. More...

bool	responderHadWritable () const

void	setSuppressFuncError ()

bool	suppressFuncError () const

void	setBlockCached ()

bool	isBlockCached () const

void	clearBlockCached ()

void	setBadAddress ()

void	copyError (Packet *pkt)

Addr	getAddr () const

void	setAddr (Addr _addr)
	Update the address of this packet mid-transaction. More...

unsigned	getSize () const

Addr	getOffset (unsigned int blk_size) const

Addr	getBlockAddr (unsigned int blk_size) const

bool	isSecure () const

AtomicOpFunctor *	getAtomicOp () const
	Accessor function to atomic op. More...

bool	isAtomicOp () const

void	convertScToWrite ()
	It has been determined that the SC packet should successfully update memory. More...

void	convertLlToRead ()
	When ruby is in use, Ruby will monitor the cache line and the phys memory should treat LL ops as normal reads. More...

	Packet (const RequestPtr _req, MemCmd _cmd)
	Constructor. More...

	Packet (const RequestPtr _req, MemCmd _cmd, int _blkSize)
	Alternate constructor if you are trying to create a packet with a request that is for a whole block, not the address from the req. More...

	Packet (const PacketPtr pkt, bool clear_flags, bool alloc_data)
	Alternate constructor for copying a packet. More...

	~Packet ()
	clean up packet variables More...

void	makeResponse ()
	Take a request packet and modify it in place to be suitable for returning as a response to that request. More...

void	makeAtomicResponse ()

void	makeTimingResponse ()

void	setFunctionalResponseStatus (bool success)

void	setSize (unsigned size)

bool	checkFunctional (PacketPtr other)
	Check a functional request against a memory value stored in another packet (i.e. More...

bool	mustCheckAbove () const
	Does the request need to check for cached copies of the same block in the memory hierarchy above. More...

bool	isCleanEviction () const
	Is this packet a clean eviction, including both actual clean evict packets, but also clean writebacks. More...

bool	checkFunctional (Printable obj, Addr base, bool is_secure, int size, uint8_t _data)
	Check a functional request against a memory value represented by a base/size pair and an associated data array. More...

void	pushLabel (const std::string &lbl)
	Push label for PrintReq (safe to call unconditionally). More...

void	popLabel ()
	Pop label for PrintReq (safe to call unconditionally). More...

void	print (std::ostream &o, int verbosity=0, const std::string &prefix="") const

std::string	print () const
	A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overheads in fast mode. More...


void	setCacheResponding ()
	Snoop flags. More...

bool	cacheResponding () const

void	setHasSharers ()
	On fills, the hasSharers flag is used by the caches in combination with the cacheResponding flag, as clarified above. More...

bool	hasSharers () const

Data accessor mehtods
template<typename T >
void	dataStatic (T *p)
	Set the data pointer to the following value that should not be freed. More...

template<typename T >
void	dataStaticConst (const T *p)
	Set the data pointer to the following value that should not be freed. More...

template<typename T >
void	dataDynamic (T *p)
	Set the data pointer to a value that should have delete [] called on it. More...

template<typename T >
T *	getPtr ()
	get a pointer to the data ptr. More...

template<typename T >
const T *	getConstPtr () const

template<typename T >
T	getBE () const
	Get the data in the packet byte swapped from big endian to host endian. More...

template<typename T >
T	getLE () const
	Get the data in the packet byte swapped from little endian to host endian. More...

template<typename T >
T	get (ByteOrder endian) const
	Get the data in the packet byte swapped from the specified endianness. More...

template<typename T >
T	get () const
	Get the data in the packet byte swapped from guest to host endian. More...

template<typename T >
void	setBE (T v)
	Set the value in the data pointer to v as big endian. More...

template<typename T >
void	setLE (T v)
	Set the value in the data pointer to v as little endian. More...

template<typename T >
void	set (T v, ByteOrder endian)
	Set the value in the data pointer to v using the specified endianness. More...

template<typename T >
void	set (T v)
	Set the value in the data pointer to v as guest endian. More...

void	setData (const uint8_t *p)
	Copy data into the packet from the provided pointer. More...

void	setDataFromBlock (const uint8_t *blk_data, int blkSize)
	Copy data into the packet from the provided block pointer, which is aligned to the given block size. More...

void	writeData (uint8_t *p) const
	Copy data from the packet to the provided block pointer, which is aligned to the given block size. More...

void	writeDataToBlock (uint8_t *blk_data, int blkSize) const
	Copy data from the packet to the memory at the provided pointer. More...

void	deleteData ()
	delete the data pointed to in the data pointer. More...

void	allocate ()
	Allocate memory for the packet. More...

Public Member Functions inherited from Printable
	Printable ()

virtual	~Printable ()

Static Public Member Functions
static MemCmd	makeReadCmd (const RequestPtr req)
	Generate the appropriate read MemCmd based on the Request flags. More...

static MemCmd	makeWriteCmd (const RequestPtr req)
	Generate the appropriate write MemCmd based on the Request flags. More...

static PacketPtr	createRead (const RequestPtr req)
	Constructor-like methods that return Packets based on Request objects. More...

static PacketPtr	createWrite (const RequestPtr req)

Public Attributes
MemCmd	cmd
	The command field of the packet. More...

const RequestPtr	req
	A pointer to the original request. More...

uint32_t	headerDelay
	The extra delay from seeing the packet until the header is transmitted. More...

uint32_t	snoopDelay
	Keep track of the extra delay incurred by snooping upwards before sending a request down the memory system. More...

uint32_t	payloadDelay
	The extra pipelining delay from seeing the packet until the end of payload is transmitted by the component that provided it (if any). More...

SenderState *	senderState
	This packet's sender state. More...

Private Types
enum	: FlagsType { COPY_FLAGS = 0x0000000F, HAS_SHARERS = 0x00000001, EXPRESS_SNOOP = 0x00000002, RESPONDER_HAD_WRITABLE = 0x00000004, CACHE_RESPONDING = 0x00000008, VALID_ADDR = 0x00000100, VALID_SIZE = 0x00000200, STATIC_DATA = 0x00001000, DYNAMIC_DATA = 0x00002000, SUPPRESS_FUNC_ERROR = 0x00008000, BLOCK_CACHED = 0x00010000 }

Private Member Functions
template<typename T >
T	getRaw () const
	Get the data in the packet without byte swapping. More...

template<typename T >
void	setRaw (T v)
	Set the value in the data pointer to v without byte swapping. More...

Private Attributes
Flags	flags

PacketDataPtr	data
	A pointer to the data being transfered. More...

Addr	addr
	The address of the request. More...

bool	_isSecure
	True if the request targets the secure memory space. More...

unsigned	size
	The size of the request or transfer. More...

std::vector< bool >	bytesValid
	Track the bytes found that satisfy a functional read. More...

Detailed Description

A Packet is used to encapsulate a transfer between two objects in the memory system (e.g., the L1 and L2 cache).

(In contrast, a single Request travels all the way from the requester to the ultimate destination and back, possibly being conveyed by several different Packets along the way.)

Definition at line 245 of file packet.hh.

Member Typedef Documentation

typedef MemCmd::Command Packet::Command

Definition at line 298 of file packet.hh.

typedef ::Flags<FlagsType> Packet::Flags

Definition at line 249 of file packet.hh.

typedef uint32_t Packet::FlagsType

Definition at line 248 of file packet.hh.

Member Enumeration Documentation

anonymous enum : FlagsType

private

Enumerator
COPY_FLAGS
HAS_SHARERS
EXPRESS_SNOOP	Special timing-mode atomic snoop for multi-level coherence.
RESPONDER_HAD_WRITABLE	Allow a responding cache to inform the cache hierarchy that it had a writable copy before responding. See setResponderHadWritable below.
CACHE_RESPONDING
VALID_ADDR	Are the 'addr' and 'size' fields valid?
VALID_SIZE
STATIC_DATA	Is the data pointer set to a value that shouldn't be freed when the packet is destroyed?
DYNAMIC_DATA	The data pointer points to a value that should be freed when the packet is destroyed. The pointer is assumed to be pointing to an array, and delete [] is consequently called
SUPPRESS_FUNC_ERROR	suppress the error if this packet encounters a functional access failure.
BLOCK_CACHED

Definition at line 253 of file packet.hh.

Constructor & Destructor Documentation

Packet::Packet	(	const RequestPtr	_req,
		MemCmd	_cmd
	)

inline

Constructor.

Note that a Request object must be constructed first, but the Requests's physical address and size fields need not be valid. The command must be supplied.

Definition at line 702 of file packet.hh.

References _isSecure, addr, flags, Request::getPaddr(), Request::getSize(), Request::hasPaddr(), Request::hasSize(), Request::isSecure(), req, Flags< T >::set(), size, VALID_ADDR, and VALID_SIZE.

Referenced by createRead(), and createWrite().

Packet::Packet	(	const RequestPtr	_req,
		MemCmd	_cmd,
		int	_blkSize
	)

inline

Alternate constructor if you are trying to create a packet with a request that is for a whole block, not the address from the req.

this allows for overriding the size/addr of the req.

Definition at line 723 of file packet.hh.

References _isSecure, addr, flags, Request::getPaddr(), Request::hasPaddr(), Request::isSecure(), req, Flags< T >::set(), size, VALID_ADDR, and VALID_SIZE.

Packet::Packet	(	const PacketPtr	pkt,
		bool	clear_flags,
		bool	alloc_data
	)

inline

Alternate constructor for copying a packet.

Copy all fields except if the original packet's data was dynamic, don't copy that, as we can't guarantee that the new packet's lifetime is less than that of the original packet. In this case the new packet should allocate its own data.

Definition at line 744 of file packet.hh.

References allocate(), COPY_FLAGS, data, flags, Flags< T >::isSet(), Flags< T >::set(), STATIC_DATA, VALID_ADDR, and VALID_SIZE.

Packet::~Packet ( )

inline

clean up packet variables

Definition at line 823 of file packet.hh.

References deleteData(), isExpressSnoop(), isRequest(), needsResponse(), and req.

Member Function Documentation

void Packet::allocate ( )

inline

Allocate memory for the packet.

Definition at line 1082 of file packet.hh.

References data, DYNAMIC_DATA, flags, getSize(), hasData(), hasRespData(), Flags< T >::noneSet(), Flags< T >::set(), and STATIC_DATA.

Referenced by Cache::cleanEvictBlk(), Cache::createMissPacket(), SeriesRequestGenerator::initiate(), InvalidateGenerator::initiate(), QueuedPrefetcher::insert(), Minor::Fetch1::FetchRequest::makePacket(), Minor::makePacketForRequest(), Packet(), X86ISA::prepIntRequest(), GpuDispatcher::read(), replaceUpgrade(), and Cache::writebackBlk().

bool Packet::cacheResponding ( ) const

inline

Definition at line 558 of file packet.hh.

References CACHE_RESPONDING, flags, and Flags< T >::isSet().

Referenced by AbstractMemory::access(), CoherentXBar::forwardAtomic(), Cache::handleFill(), Cache::handleSnoop(), Cache::isCachedAbove(), SnoopFilter::lookupRequest(), SimpleMemory::recvAtomic(), DRAMSim2::recvAtomic(), Bridge::BridgeSlavePort::recvAtomic(), CommMonitor::recvAtomic(), Cache::recvAtomic(), DRAMCtrl::recvAtomic(), SimpleTimingPort::recvTimingReq(), RubyPort::MemSlavePort::recvTimingReq(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), SimpleMemory::recvTimingReq(), DRAMSim2::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), AddrMapper::recvTimingReq(), CommMonitor::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), DRAMCtrl::recvTimingReq(), DmaPort::recvTimingResp(), FullO3CPU< Impl >::IcachePort::recvTimingResp(), CoherentXBar::recvTimingSnoopReq(), Cache::sendMSHRQueuePacket(), setResponderHadWritable(), CoherentXBar::sinkPacket(), SnoopFilter::updateSnoopForward(), and SnoopFilter::updateSnoopResponse().

bool Packet::checkFunctional ( PacketPtr other )

inline

Check a functional request against a memory value stored in another packet (i.e.

an in-transit request or response). Returns true if the current packet is a read, and the other packet provides the data, which is then copied to the current packet. If the current packet is a write, and the other packet intersects this one, then we update the data accordingly.

Definition at line 1115 of file packet.hh.

References getAddr(), getPtr(), getSize(), hasData(), and isSecure().

Referenced by WriteQueueEntry::TargetList::checkFunctional(), PacketQueue::checkFunctional(), WriteQueueEntry::checkFunctional(), MSHR::TargetList::checkFunctional(), SerialLink::SerialLinkMasterPort::checkFunctional(), Bridge::BridgeMasterPort::checkFunctional(), MSHR::checkFunctional(), Cache::functionalAccess(), SimpleMemory::recvFunctional(), SerialLink::SerialLinkSlavePort::recvFunctional(), DRAMSim2::recvFunctional(), and Bridge::BridgeSlavePort::recvFunctional().

bool Packet::checkFunctional	(	Printable *	obj,
		Addr	base,
		bool	is_secure,
		int	size,
		uint8_t *	_data
	)

Check a functional request against a memory value represented by a base/size pair and an associated data array.

If the current packet is a read, it may be satisfied by the memory value. If the current packet is a write, it may update the memory value.

Definition at line 205 of file packet.cc.

References addr, ArmISA::i, ArmISA::offset, panic, safe_cast(), and X86ISA::size().

void Packet::clearBlockCached ( )

inline

Definition at line 625 of file packet.hh.

References BLOCK_CACHED, Flags< T >::clear(), and flags.

Referenced by Cache::access().

const std::string& Packet::cmdString ( ) const

inline

Return the string name of the cmd field (for debugging and tracing).

Definition at line 497 of file packet.hh.

References cmd, and MemCmd::toString().

Referenced by AbstractMemory::functionalAccess(), DmaPort::handleResp(), Sequencer::hitCallback(), NoncoherentXBar::recvAtomic(), DRAMCtrl::recvAtomic(), AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), RubyPort::MemSlavePort::recvFunctional(), NoncoherentXBar::recvFunctional(), AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), RubyPort::MemSlavePort::recvTimingReq(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), SimpleMemory::recvTimingReq(), DRAMCtrl::recvTimingReq(), NoncoherentXBar::recvTimingResp(), SerialLink::SerialLinkMasterPort::recvTimingResp(), Bridge::BridgeMasterPort::recvTimingResp(), LSQ< Impl >::recvTimingSnoopReq(), RubyPort::ruby_hit_callback(), PacketQueue::schedSendTiming(), AtomicSimpleCPU::threadSnoop(), DmaPort::trySendTimingReq(), and TrafficGen::update().

int Packet::cmdToIndex ( ) const

inline

Return the index of this command.

Definition at line 500 of file packet.hh.

References cmd, and MemCmd::toInt().

Referenced by Cache::getNextQueueEntry(), BaseCache::incHitCount(), BaseCache::incMissCount(), NoncoherentXBar::recvAtomic(), CoherentXBar::recvAtomic(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), NoncoherentXBar::recvTimingResp(), CoherentXBar::recvTimingResp(), Cache::recvTimingResp(), CoherentXBar::recvTimingSnoopReq(), and CoherentXBar::recvTimingSnoopResp().

void Packet::convertLlToRead ( )

inline

When ruby is in use, Ruby will monitor the cache line and the phys memory should treat LL ops as normal reads.

Definition at line 690 of file packet.hh.

References cmd, isLLSC(), isRead(), and MemCmd::ReadReq.

Referenced by RubyPort::MemSlavePort::hitCallback().

void Packet::convertScToWrite ( )

inline

It has been determined that the SC packet should successfully update memory.

Therefore, convert this SC packet to a normal write.

Definition at line 678 of file packet.hh.

References cmd, isLLSC(), isWrite(), and MemCmd::WriteReq.

Referenced by RubyPort::MemSlavePort::hitCallback().

void Packet::copyError ( Packet * pkt )

inline

Definition at line 637 of file packet.hh.

References cmd, and isError().

Referenced by Cache::recvAtomic(), and Cache::recvTimingResp().

static PacketPtr Packet::createRead ( const RequestPtr req )

inlinestatic

Constructor-like methods that return Packets based on Request objects.

Fine-tune the MemCmd type if it's not a vanilla read or write.

Definition at line 809 of file packet.hh.

References makeReadCmd(), and Packet().

Referenced by TimingSimpleCPU::buildPacket(), TraceCPU::ElasticDataGen::executeMemReq(), Minor::makePacketForRequest(), AbstractController::queueMemoryRead(), LSQUnit< Impl >::read(), and CheckerCPU::readMem().

static PacketPtr Packet::createWrite ( const RequestPtr req )

inlinestatic

Definition at line 815 of file packet.hh.

References makeWriteCmd(), and Packet().

Referenced by TimingSimpleCPU::buildPacket(), TraceCPU::ElasticDataGen::executeMemReq(), Minor::makePacketForRequest(), AbstractController::queueMemoryWrite(), AbstractController::queueMemoryWritePartial(), and LSQUnit< Impl >::writebackStores().

template<typename T >

void Packet::dataDynamic ( T * p )

inline

Set the data pointer to a value that should have delete [] called on it.

Dynamic data is local to this packet, and as the packet travels from source to destination, forwarded packets will allocate their own data. When a packet reaches the final destination it will populate the dynamic data of that specific packet, and on the way back towards the source, memcpy will be invoked in every step where a new packet was created e.g. in the caches. Ultimately when the response reaches the source a final memcpy is needed to extract the data from the packet before it is deallocated.

Definition at line 947 of file packet.hh.

References data, DYNAMIC_DATA, flags, Flags< T >::noneSet(), Flags< T >::set(), and STATIC_DATA.

Referenced by TimingSimpleCPU::buildSplitPacket(), TraceCPU::ElasticDataGen::executeMemReq(), FetchUnit::fetch(), DefaultFetch< Impl >::finishTranslation(), BaseGen::getPacket(), Check::initiateAction(), Check::initiateCheck(), Check::initiatePrefetch(), Minor::makePacketForRequest(), AbstractController::queueMemoryRead(), AbstractController::queueMemoryWrite(), AbstractController::queueMemoryWritePartial(), TraceCPU::FixedRetryGen::send(), and TimingSimpleCPU::sendData().

template<typename T >

void Packet::dataStatic ( T * p )

inline

Set the data pointer to the following value that should not be freed.

Static data allows us to do a single memcpy even if multiple packets are required to get from source to destination and back. In essence the pointer is set calling dataStatic on the original packet, and whenever this packet is copied and forwarded the same pointer is passed on. When a packet eventually reaches the destination holding the data, it is copied once into the location originally set. On the way back to the source, no copies are necessary.

Definition at line 909 of file packet.hh.

References data, DYNAMIC_DATA, flags, Flags< T >::noneSet(), Flags< T >::set(), and STATIC_DATA.

Referenced by TimingSimpleCPU::buildSplitPacket(), DmaPort::dmaAction(), Shader::doFunctionalAccess(), BaseKvmCPU::doMMIOAccess(), CacheRecorder::enqueueNextFetchRequest(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execSt(), ArmISA::TableWalker::fetchDescriptor(), X86KvmCPU::handleKvmExitIO(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::initiateAcc(), LSQUnit< Impl >::read(), ArmISA::Stage2MMU::readDataUntimed(), AtomicSimpleCPU::readMem(), CheckerCPU::readMem(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::sendRequest(), AtomicSimpleCPU::tick(), Checker< Impl >::verify(), LSQUnit< Impl >::writebackStores(), Cache::writebackVisitor(), and AtomicSimpleCPU::writeMem().

template<typename T >

void Packet::dataStaticConst ( const T * p )

inline

Set the data pointer to the following value that should not be freed.

This version of the function allows the pointer passed to us to be const. To avoid issues down the line we cast the constness away, the alternative would be to keep both a const and non-const data pointer and cleverly choose between them. Note that this is only allowed for static data.

Definition at line 926 of file packet.hh.

References data, DYNAMIC_DATA, flags, Flags< T >::noneSet(), MipsISA::p, Flags< T >::set(), and STATIC_DATA.

void Packet::deleteData ( )

inline

delete the data pointed to in the data pointer.

Ok to call to matter how data was allocted.

Definition at line 1071 of file packet.hh.

References Flags< T >::clear(), data, DYNAMIC_DATA, flags, Flags< T >::isSet(), and STATIC_DATA.

Referenced by ~Packet().

template<typename T >

T* Packet::findNextSenderState ( ) const

inline

Go through the sender state stack and return the first instance that is of type T (as determined by a dynamic_cast).

If there is no sender state of type T, NULL is returned.

Returns: The topmost state of type T

Definition at line 484 of file packet.hh.

References Packet::SenderState::predecessor, senderState, and ArmISA::t.

Referenced by MSHR::TargetList::add(), Sequencer::hitCallback(), and Minor::LSQ::tryToSend().

bool Packet::fromCache ( ) const

inline

Definition at line 519 of file packet.hh.

References cmd, and MemCmd::fromCache().

Referenced by Cache::access(), SnoopFilter::lookupRequest(), Cache::recvAtomic(), Cache::recvTimingResp(), and Cache::satisfyRequest().

template<typename T >

T Packet::get ( ByteOrder endian ) const

inline

Get the data in the packet byte swapped from the specified endianness.

Definition at line 89 of file packet_access.hh.

References BigEndianByteOrder, LittleEndianByteOrder, and panic.

Referenced by CopyEngine::CopyEngineChannel::channelWrite(), IdeController::dispatchAccess(), SparcISA::TLB::doMmuRegWrite(), X86ISA::getMem(), getMem(), I2CBus::isClockSet(), I2CBus::isEnd(), I2CBus::isStart(), Pl011::read(), TsunamiCChip::read(), AlphaBackdoor::read(), PL031::read(), Sp804::Timer::read(), Pl050::read(), Pl111::read(), IdeController::readConfig(), PciDevice::readConfig(), X86ISA::Interrupts::recvMessage(), X86ISA::Walker::WalkerState::stepWalk(), I2CBus::updateSignals(), PciVirtIO::write(), X86ISA::I8237::write(), MmDisk::write(), NoMaliGpu::write(), Pl011::write(), X86ISA::Speaker::write(), TsunamiPChip::write(), X86ISA::Cmos::write(), IsaFake::write(), X86ISA::I8254::write(), X86ISA::I8259::write(), TsunamiCChip::write(), X86ISA::I82094AA::write(), Uart8250::write(), HDLcd::write(), Gicv2m::write(), AlphaBackdoor::write(), Sp804::Timer::write(), PL031::write(), TsunamiIO::write(), EnergyCtrl::write(), CpuLocalTimer::Timer::write(), GpuDispatcher::write(), Pl050::write(), RealViewCtrl::write(), CopyEngine::write(), X86ISA::I8042::write(), Sinic::Device::write(), GenericTimerMem::write(), NSGigE::write(), Pl111::write(), IGbE::write(), UFSHostDevice::write(), IdeController::writeConfig(), PciDevice::writeConfig(), Pl390::writeCpu(), VGic::writeCtrl(), Pl390::writeDistributor(), Iob::writeIob(), Iob::writeJBus(), and VGic::writeVCpu().

template<typename T >

T Packet::get ( ) const

inline

Get the data in the packet byte swapped from guest to host endian.

Definition at line 105 of file packet_access.hh.

References BigEndianGuest::gtoh().

Addr Packet::getAddr ( ) const

inline

Definition at line 639 of file packet.hh.

References addr, flags, Flags< T >::isSet(), and VALID_ADDR.

Referenced by PhysicalMemory::access(), Cache::access(), AbstractMemory::access(), DRAMSim2::accessAndRespond(), DRAMCtrl::accessAndRespond(), DRAMCtrl::addToReadQueue(), DRAMCtrl::addToWriteQueue(), GPUCoalescer::atomicCallback(), TaggedPrefetcher::calculatePrefetch(), StridePrefetcher::calculatePrefetch(), checkFunctional(), LSQUnit< Impl >::checkSnoop(), Cache::cmpAndSwap(), TimingSimpleCPU::completeIfetch(), Cache::createMissPacket(), IdeController::dispatchAccess(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), PhysicalMemory::functionalAccess(), AbstractMemory::functionalAccess(), Cache::functionalAccess(), RubySystem::functionalRead(), RubySystem::functionalWrite(), RubyRequest::functionalWrite(), getBlockAddr(), getOffset(), QueuedPrefetcher::getPacket(), GPUCoalescer::getRequestStatus(), Cache::handleFill(), GenericISA::handleGenericIprRead(), GenericISA::handleGenericIprWrite(), X86ISA::handleIprRead(), X86ISA::handleIprWrite(), MipsISA::handleLockedSnoop(), ArmISA::handleLockedSnoop(), AlphaISA::handleLockedSnoop(), RiscvISA::handleLockedSnoop(), Minor::Execute::handleMemResponse(), handlePseudoInst(), DmaPort::handleResp(), Cache::handleSnoop(), Sequencer::hitCallback(), GPUCoalescer::hitCallback(), LRU::insertBlock(), BaseSetAssoc::insertBlock(), Sequencer::insertRequest(), GPUCoalescer::insertRequest(), I2CBus::isClockSet(), I2CBus::isEnd(), I2CBus::isStart(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), DMASequencer::makeRequest(), GPUCoalescer::makeRequest(), BasePrefetcher::observeAccess(), PciVirtIO::read(), X86ISA::I8237::read(), MmDisk::read(), DumbTOD::read(), NoMaliGpu::read(), Pl011::read(), AmbaFake::read(), X86ISA::Speaker::read(), A9SCU::read(), IsaFake::read(), TsunamiPChip::read(), X86ISA::Cmos::read(), X86ISA::I8254::read(), X86ISA::I8259::read(), TsunamiCChip::read(), X86ISA::I82094AA::read(), Uart8250::read(), HDLcd::read(), Gicv2m::read(), AlphaBackdoor::read(), PL031::read(), TsunamiIO::read(), EnergyCtrl::read(), Iob::read(), I2CBus::read(), Sp804::read(), GpuDispatcher::read(), Pl050::read(), RealViewCtrl::read(), CpuLocalTimer::read(), CopyEngine::read(), VGic::read(), X86ISA::Interrupts::read(), X86ISA::I8042::read(), Sinic::Device::read(), GenericPciHost::read(), GenericTimerMem::read(), NSGigE::read(), Pl111::read(), Pl390::read(), IGbE::read(), UFSHostDevice::read(), IdeController::readConfig(), PciDevice::readConfig(), Pl390::readCpu(), VGic::readCtrl(), Pl390::readDistributor(), AmbaDevice::readId(), Iob::readIob(), Iob::readJBus(), AtomicSimpleCPU::readMem(), VGic::readVCpu(), GPUCoalescer::recordMissLatency(), StubSlavePort::recvAtomic(), NoncoherentXBar::recvAtomic(), AddrMapper::recvAtomic(), CoherentXBar::recvAtomic(), DRAMCtrl::recvAtomic(), AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), AddrMapper::recvAtomicSnoop(), Cache::recvAtomicSnoop(), RubyPort::MemSlavePort::recvFunctional(), NoncoherentXBar::recvFunctional(), MemCheckerMonitor::recvFunctional(), AddrMapper::recvFunctional(), CoherentXBar::recvFunctional(), AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), MemCheckerMonitor::recvFunctionalSnoop(), AddrMapper::recvFunctionalSnoop(), X86ISA::Interrupts::recvMessage(), RubyPort::MemSlavePort::recvTimingReq(), HMCController::recvTimingReq(), RubyPort::PioSlavePort::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), SimpleMemory::recvTimingReq(), DRAMSim2::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), AddrMapper::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), DRAMCtrl::recvTimingReq(), RubyDirectedTester::CpuPort::recvTimingResp(), RubyPort::MemMasterPort::recvTimingResp(), RubyPort::PioMasterPort::recvTimingResp(), AbstractController::recvTimingResp(), NoncoherentXBar::recvTimingResp(), TimingSimpleCPU::IcachePort::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), AddrMapper::recvTimingResp(), TimingSimpleCPU::DcachePort::recvTimingResp(), LSQ< Impl >::recvTimingResp(), SerialLink::SerialLinkMasterPort::recvTimingResp(), Bridge::BridgeMasterPort::recvTimingResp(), Cache::recvTimingResp(), Minor::LSQ::recvTimingResp(), CoherentXBar::recvTimingSnoopReq(), LSQ< Impl >::recvTimingSnoopReq(), Cache::recvTimingSnoopReq(), Cache::recvTimingSnoopResp(), GPUCoalescer::removeRequest(), RubyPort::ruby_hit_callback(), PacketQueue::schedSendTiming(), Cache::sendMSHRQueuePacket(), ComputeUnit::sendRequest(), testAndRead(), testAndReadMask(), testAndWrite(), AtomicSimpleCPU::threadSnoop(), AtomicSimpleCPU::tick(), SerialLink::SerialLinkSlavePort::trySendTiming(), Bridge::BridgeSlavePort::trySendTiming(), SerialLink::SerialLinkMasterPort::trySendTiming(), Bridge::BridgeMasterPort::trySendTiming(), DmaPort::trySendTimingReq(), TrafficGen::update(), I2CBus::updateSignals(), Sequencer::wakeup(), GPUCoalescer::wakeup(), PciVirtIO::write(), X86ISA::I8237::write(), MmDisk::write(), NoMaliGpu::write(), Pl011::write(), AmbaFake::write(), X86ISA::Speaker::write(), A9SCU::write(), TsunamiPChip::write(), X86ISA::Cmos::write(), IsaFake::write(), X86ISA::I8254::write(), X86ISA::I8259::write(), TsunamiCChip::write(), X86ISA::I82094AA::write(), Uart8250::write(), HDLcd::write(), Gicv2m::write(), AlphaBackdoor::write(), PL031::write(), TsunamiIO::write(), EnergyCtrl::write(), Iob::write(), I2CBus::write(), GpuDispatcher::write(), Pl050::write(), Sp804::write(), RealViewCtrl::write(), CpuLocalTimer::write(), CopyEngine::write(), VGic::write(), X86ISA::Interrupts::write(), X86ISA::I8042::write(), Sinic::Device::write(), GenericPciHost::write(), GenericTimerMem::write(), NSGigE::write(), Pl111::write(), Pl390::write(), IGbE::write(), UFSHostDevice::write(), IdeController::writeConfig(), PciDevice::writeConfig(), NSGigE::writeConfig(), IGbE::writeConfig(), Pl390::writeCpu(), VGic::writeCtrl(), Pl390::writeDistributor(), Iob::writeIob(), Iob::writeJBus(), AtomicSimpleCPU::writeMem(), and VGic::writeVCpu().

AtomicOpFunctor* Packet::getAtomicOp ( ) const

inline

Accessor function to atomic op.

Definition at line 670 of file packet.hh.

References Request::getAtomicOpFunctor(), and req.

Referenced by AbstractMemory::access(), and GPUCoalescer::issueRequest().

template<typename T >

T Packet::getBE ( ) const

inline

Get the data in the packet byte swapped from big endian to host endian.

Definition at line 75 of file packet_access.hh.

References betoh().

Addr Packet::getBlockAddr ( unsigned int blk_size ) const

inline

Definition at line 656 of file packet.hh.

References getAddr().

Referenced by BaseCache::allocateMissBuffer(), BaseCache::allocateWriteBuffer(), Cache::createMissPacket(), Cache::functionalAccess(), Cache::getNextQueueEntry(), Cache::handleFill(), SnoopFilter::lookupRequest(), SnoopFilter::lookupSnoop(), QueuedPrefetcher::notify(), Cache::recvTimingReq(), Cache::recvTimingSnoopReq(), SnoopFilter::updateResponse(), SnoopFilter::updateSnoopForward(), and SnoopFilter::updateSnoopResponse().

template<typename T >

const T* Packet::getConstPtr ( ) const

inline

template<typename T >

T Packet::getLE ( ) const

inline

Get the data in the packet byte swapped from little endian to host endian.

Definition at line 82 of file packet_access.hh.

References letoh().

Addr Packet::getOffset ( unsigned int blk_size ) const

inline

Definition at line 651 of file packet.hh.

References getAddr().

Referenced by Cache::promoteWholeLineWrites(), Cache::recvTimingResp(), Cache::satisfyRequest(), setDataFromBlock(), and writeDataToBlock().

template<typename T >

T* Packet::getPtr ( )

inline

get a pointer to the data ptr.

Definition at line 959 of file packet.hh.

References data, DYNAMIC_DATA, flags, Flags< T >::isSet(), and STATIC_DATA.

Referenced by AbstractMemory::access(), Minor::ForwardLineData::adoptPacketData(), GPUCoalescer::atomicCallback(), checkFunctional(), IdeController::dispatchAccess(), Minor::LSQ::StoreBuffer::forwardStoreData(), AbstractMemory::functionalAccess(), Sequencer::hitCallback(), GPUCoalescer::hitCallback(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), DMASequencer::makeRequest(), FetchUnit::processFetchReturn(), IsaFake::read(), GpuDispatcher::read(), GenericPciHost::read(), NSGigE::read(), AbstractController::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::sendRequest(), testAndRead(), testAndReadMask(), GpuDispatcher::write(), and Cache::writebackBlk().

template<typename T >

T Packet::getRaw ( ) const

inlineprivate

Get the data in the packet without byte swapping.

Definition at line 56 of file packet_access.hh.

References data, DYNAMIC_DATA, flags, Flags< T >::isSet(), size, and STATIC_DATA.

unsigned Packet::getSize ( ) const

inline

Definition at line 649 of file packet.hh.

References flags, Flags< T >::isSet(), size, and VALID_SIZE.

Referenced by Cache::access(), AbstractMemory::access(), DRAMCtrl::addToReadQueue(), DRAMCtrl::addToWriteQueue(), allocate(), GPUCoalescer::atomicCallback(), BaseXBar::calcPacketTiming(), checkFunctional(), Cache::cmpAndSwap(), IdeController::dispatchAccess(), AbstractMemory::functionalAccess(), RubyRequest::functionalWrite(), Cache::handleFill(), X86ISA::handleIprRead(), X86ISA::handleIprWrite(), Minor::Execute::handleMemResponse(), Sequencer::hitCallback(), GPUCoalescer::hitCallback(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), DMASequencer::makeRequest(), Cache::promoteWholeLineWrites(), PciVirtIO::read(), X86ISA::I8237::read(), MmDisk::read(), DumbTOD::read(), NoMaliGpu::read(), Pl011::read(), X86ISA::Speaker::read(), A9SCU::read(), IsaFake::read(), TsunamiPChip::read(), X86ISA::Cmos::read(), X86ISA::I8254::read(), X86ISA::I8259::read(), TsunamiCChip::read(), X86ISA::I82094AA::read(), Uart8250::read(), HDLcd::read(), AlphaBackdoor::read(), PL031::read(), TsunamiIO::read(), EnergyCtrl::read(), Sp804::read(), GpuDispatcher::read(), Pl050::read(), RealViewCtrl::read(), CpuLocalTimer::read(), CopyEngine::read(), X86ISA::Interrupts::read(), X86ISA::I8042::read(), Sinic::Device::read(), GenericPciHost::read(), GenericTimerMem::read(), NSGigE::read(), Pl111::read(), IGbE::read(), IdeController::readConfig(), PciDevice::readConfig(), VirtIODeviceBase::readConfigBlob(), Pl390::readDistributor(), AmbaDevice::readId(), StubSlavePort::recvAtomic(), NoncoherentXBar::recvAtomic(), CoherentXBar::recvAtomic(), CoherentXBar::recvAtomicSnoop(), RubyPort::MemSlavePort::recvFunctional(), MemCheckerMonitor::recvFunctional(), MemCheckerMonitor::recvFunctionalSnoop(), RubyPort::MemSlavePort::recvTimingReq(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), SimpleMemory::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), DRAMCtrl::recvTimingReq(), NoncoherentXBar::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), CoherentXBar::recvTimingResp(), SerialLink::SerialLinkMasterPort::recvTimingResp(), Cache::recvTimingResp(), CoherentXBar::recvTimingSnoopReq(), CoherentXBar::recvTimingSnoopResp(), Minor::LSQ::SplitDataRequest::retireResponse(), Cache::satisfyRequest(), PacketQueue::schedSendTiming(), ComputeUnit::sendRequest(), setData(), X86ISA::Walker::WalkerState::stepWalk(), testAndRead(), testAndReadMask(), testAndWrite(), SerialLink::SerialLinkSlavePort::trySendTiming(), SerialLink::SerialLinkMasterPort::trySendTiming(), PciVirtIO::write(), X86ISA::I8237::write(), MmDisk::write(), NoMaliGpu::write(), Pl011::write(), X86ISA::Speaker::write(), TsunamiPChip::write(), X86ISA::Cmos::write(), IsaFake::write(), X86ISA::I8254::write(), X86ISA::I8259::write(), TsunamiCChip::write(), X86ISA::I82094AA::write(), Uart8250::write(), HDLcd::write(), AlphaBackdoor::write(), PL031::write(), TsunamiIO::write(), EnergyCtrl::write(), GpuDispatcher::write(), Pl050::write(), Sp804::write(), CpuLocalTimer::write(), CopyEngine::write(), X86ISA::Interrupts::write(), X86ISA::I8042::write(), Sinic::Device::write(), GenericPciHost::write(), GenericTimerMem::write(), NSGigE::write(), Pl111::write(), IGbE::write(), UFSHostDevice::write(), IdeController::writeConfig(), PciDevice::writeConfig(), VirtIODeviceBase::writeConfigBlob(), writeData(), and Pl390::writeDistributor().

bool Packet::hasData ( ) const

inline

bool Packet::hasRespData ( ) const

inline

Definition at line 522 of file packet.hh.

References cmd, MemCmd::hasData(), and MemCmd::responseCommand().

Referenced by allocate(), replaceUpgrade(), and Cache::satisfyRequest().

bool Packet::hasSharers ( ) const

inline

Definition at line 585 of file packet.hh.

References flags, HAS_SHARERS, and Flags< T >::isSet().

Referenced by Cache::access(), Cache::createMissPacket(), Cache::handleFill(), Cache::handleSnoop(), DmaPort::recvTimingResp(), FullO3CPU< Impl >::IcachePort::recvTimingResp(), Cache::recvTimingResp(), Cache::satisfyRequest(), Cache::sendMSHRQueuePacket(), SnoopFilter::updateSnoopForward(), and SnoopFilter::updateSnoopResponse().

bool Packet::isAtomicOp ( ) const

inline

Definition at line 671 of file packet.hh.

References Request::isAtomic(), and req.

Referenced by AbstractMemory::access(), GPUCoalescer::issueRequest(), and GPUCoalescer::makeRequest().

bool Packet::isBlockCached ( ) const

inline

Definition at line 624 of file packet.hh.

References BLOCK_CACHED, flags, and Flags< T >::isSet().

Referenced by Cache::handleSnoop(), Cache::isCachedAbove(), SnoopFilter::lookupRequest(), Cache::sendMSHRQueuePacket(), and CoherentXBar::sinkPacket().

bool Packet::isCleanEviction ( ) const

inline

Is this packet a clean eviction, including both actual clean evict packets, but also clean writebacks.

Definition at line 1140 of file packet.hh.

References MemCmd::CleanEvict, cmd, and MemCmd::WritebackClean.

Referenced by Cache::access(), and CoherentXBar::sinkPacket().

bool Packet::isError ( ) const

inline

bool Packet::isEviction ( ) const

inline

Definition at line 518 of file packet.hh.

References cmd, and MemCmd::isEviction().

Referenced by Cache::access(), WriteQueueEntry::allocate(), Cache::createMissPacket(), Cache::isCachedAbove(), SnoopFilter::lookupRequest(), mustCheckAbove(), Cache::recvAtomic(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), and Cache::recvTimingSnoopReq().

bool Packet::isExpressSnoop ( ) const

inline

Definition at line 601 of file packet.hh.

References EXPRESS_SNOOP, flags, and Flags< T >::isSet().

Referenced by MSHR::handleSnoop(), HMCController::recvTimingReq(), Cache::CpuSidePort::recvTimingReq(), NoncoherentXBar::recvTimingReq(), CoherentXBar::recvTimingReq(), CoherentXBar::recvTimingSnoopReq(), CoherentXBar::recvTimingSnoopResp(), PacketQueue::schedSendTiming(), and ~Packet().

bool Packet::isFlush ( ) const

inline

Definition at line 530 of file packet.hh.

References cmd, and MemCmd::isFlush().

Referenced by RubyPort::MemSlavePort::hitCallback(), Sequencer::hitCallback(), Sequencer::issueRequest(), Sequencer::makeRequest(), and GPUCoalescer::makeRequest().

bool Packet::isInvalidate ( ) const

inline

bool Packet::isLLSC ( ) const

inline

Definition at line 527 of file packet.hh.

References cmd, and MemCmd::isLLSC().

Referenced by Cache::access(), AbstractMemory::access(), AbstractMemory::checkLockedAddrList(), CacheBlk::checkWrite(), convertLlToRead(), convertScToWrite(), Cache::createMissPacket(), RubyPort::MemSlavePort::hitCallback(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), MemCheckerMonitor::recvTimingResp(), Cache::satisfyRequest(), CacheBlk::trackLoadLocked(), and AbstractMemory::writeOK().

bool Packet::isPrint ( ) const

inline

Definition at line 529 of file packet.hh.

References cmd, and MemCmd::isPrint().

Referenced by WriteQueueEntry::checkFunctional(), MSHR::checkFunctional(), AbstractMemory::functionalAccess(), popLabel(), pushLabel(), NoncoherentXBar::recvFunctional(), CoherentXBar::recvFunctional(), and CoherentXBar::recvFunctionalSnoop().

bool Packet::isRead ( ) const

inline

Definition at line 502 of file packet.hh.

References cmd, and MemCmd::isRead().

Referenced by AbstractMemory::access(), MemTest::completeRequest(), convertLlToRead(), Cache::doTimingSupplyResponse(), AbstractMemory::functionalAccess(), Cache::handleFill(), handlePseudoInst(), TimingSimpleCPU::handleReadPacket(), Cache::handleSnoop(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), BasePrefetcher::observeAccess(), PioPort::recvAtomic(), CoherentXBar::recvAtomic(), Cache::recvAtomic(), RubyPort::MemSlavePort::recvFunctional(), X86ISA::Walker::WalkerState::recvPacket(), TimingSimpleCPU::DcachePort::recvReqRetry(), SimpleMemory::recvTimingReq(), DRAMSim2::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), CommMonitor::recvTimingReq(), CoherentXBar::recvTimingReq(), DRAMCtrl::recvTimingReq(), AbstractController::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), CommMonitor::recvTimingResp(), Cache::recvTimingResp(), Cache::recvTimingSnoopReq(), Cache::satisfyRequest(), ComputeUnit::sendRequest(), and CoherentXBar::sinkPacket().

bool Packet::isRequest ( ) const

inline

bool Packet::isResponse ( ) const

inline

Definition at line 506 of file packet.hh.

References cmd, and MemCmd::isResponse().

Referenced by DRAMSim2::accessAndRespond(), DRAMCtrl::accessAndRespond(), GarnetSyntheticTraffic::completeRequest(), CoherentXBar::forwardAtomic(), CoherentXBar::forwardFunctional(), Cache::handleFill(), DmaPort::handleResp(), Cache::handleSnoop(), PioPort::recvAtomic(), NoncoherentXBar::recvAtomic(), CommMonitor::recvAtomic(), CoherentXBar::recvAtomic(), Cache::recvAtomic(), CoherentXBar::recvAtomicSnoop(), CoherentXBar::recvFunctional(), X86ISA::Walker::WalkerState::recvPacket(), SimpleTimingPort::recvTimingReq(), SimpleMemory::recvTimingReq(), RubyPort::MemMasterPort::recvTimingResp(), AbstractController::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), CommMonitor::recvTimingResp(), Cache::recvTimingResp(), Cache::recvTimingSnoopResp(), X86ISA::IntDevice::IntMasterPort::sendMessage(), SlavePort::sendTimingResp(), MasterPort::sendTimingSnoopResp(), setBadAddress(), SnoopFilter::updateResponse(), SnoopFilter::updateSnoopForward(), and SnoopFilter::updateSnoopResponse().

bool Packet::isSecure ( ) const

inline

bool Packet::isUpgrade ( ) const

inline

Definition at line 504 of file packet.hh.

References cmd, and MemCmd::isUpgrade().

Referenced by Cache::createMissPacket(), Cache::satisfyRequest(), and MSHR::TargetList::updateFlags().

bool Packet::isWrite ( ) const

inline

Definition at line 503 of file packet.hh.

References cmd, and MemCmd::isWrite().

Referenced by Cache::access(), AbstractMemory::access(), DRAMCtrl::addToReadQueue(), DRAMCtrl::addToWriteQueue(), WriteQueueEntry::allocate(), BaseCache::allocateWriteBuffer(), CacheBlk::checkWrite(), TraceCPU::ElasticDataGen::completeMemAccess(), GarnetSyntheticTraffic::completeRequest(), MemTest::completeRequest(), convertScToWrite(), AbstractMemory::functionalAccess(), ArmISA::handleLockedSnoop(), RubyPort::MemSlavePort::hitCallback(), GPUCoalescer::issueRequest(), DMASequencer::makeRequest(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), CoherentXBar::recvAtomic(), Cache::recvAtomic(), AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), RubyPort::MemSlavePort::recvFunctional(), TimingSimpleCPU::DcachePort::recvReqRetry(), SimpleMemory::recvTimingReq(), DRAMSim2::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), CommMonitor::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), DRAMCtrl::recvTimingReq(), AbstractController::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), CommMonitor::recvTimingResp(), Cache::recvTimingResp(), TimingSimpleCPU::DcachePort::recvTimingSnoopReq(), Minor::LSQ::recvTimingSnoopReq(), Cache::satisfyRequest(), Cache::sendMSHRQueuePacket(), ComputeUnit::sendRequest(), setFunctionalResponseStatus(), CoherentXBar::sinkPacket(), and Minor::LSQ::threadSnoop().

bool Packet::isWriteback ( ) const

inline

Definition at line 520 of file packet.hh.

References cmd, and MemCmd::isWriteback().

Referenced by Cache::access(), SnoopFilter::lookupSnoop(), Cache::recvTimingReq(), and SnoopFilter::updateSnoopResponse().

void Packet::makeAtomicResponse ( )

inline

Definition at line 857 of file packet.hh.

References makeResponse().

Referenced by IdeController::dispatchAccess(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), Cache::handleSnoop(), X86ISA::I8237::read(), MmDisk::read(), DumbTOD::read(), Pl011::read(), AmbaFake::read(), A9SCU::read(), X86ISA::Speaker::read(), IsaFake::read(), TsunamiPChip::read(), X86ISA::Cmos::read(), X86ISA::I8254::read(), X86ISA::I8259::read(), TsunamiCChip::read(), X86ISA::I82094AA::read(), Uart8250::read(), HDLcd::read(), Gicv2m::read(), AlphaBackdoor::read(), PL031::read(), TsunamiIO::read(), EnergyCtrl::read(), Iob::read(), I2CBus::read(), Sp804::read(), GpuDispatcher::read(), Pl050::read(), RealViewCtrl::read(), CpuLocalTimer::read(), CopyEngine::read(), X86ISA::Interrupts::read(), X86ISA::I8042::read(), GenericPciHost::read(), NSGigE::read(), Pl111::read(), IGbE::read(), IdeController::readConfig(), PciDevice::readConfig(), Pl390::readCpu(), VGic::readCtrl(), Pl390::readDistributor(), VGic::readVCpu(), Cache::recvAtomic(), X86ISA::Interrupts::recvMessage(), X86ISA::I8237::write(), MmDisk::write(), NoMaliGpu::write(), Pl011::write(), AmbaFake::write(), X86ISA::Speaker::write(), A9SCU::write(), TsunamiPChip::write(), X86ISA::Cmos::write(), IsaFake::write(), X86ISA::I8254::write(), X86ISA::I8259::write(), TsunamiCChip::write(), X86ISA::I82094AA::write(), Uart8250::write(), HDLcd::write(), Gicv2m::write(), AlphaBackdoor::write(), PL031::write(), TsunamiIO::write(), EnergyCtrl::write(), Iob::write(), GpuDispatcher::write(), Pl050::write(), Sp804::write(), RealViewCtrl::write(), CpuLocalTimer::write(), CopyEngine::write(), X86ISA::Interrupts::write(), X86ISA::I8042::write(), NSGigE::write(), Pl111::write(), IGbE::write(), IdeController::writeConfig(), PciDevice::writeConfig(), Pl390::writeCpu(), VGic::writeCtrl(), Pl390::writeDistributor(), and VGic::writeVCpu().

static MemCmd Packet::makeReadCmd ( const RequestPtr req )

inlinestatic

Generate the appropriate read MemCmd based on the Request flags.

Definition at line 780 of file packet.hh.

References Request::isLLSC(), Request::isPrefetch(), MemCmd::LoadLockedReq, MemCmd::ReadReq, and MemCmd::SoftPFReq.

Referenced by createRead(), and AtomicSimpleCPU::readMem().

void Packet::makeResponse ( )

inline

Take a request packet and modify it in place to be suitable for returning as a response to that request.

Definition at line 845 of file packet.hh.

References Flags< T >::clear(), cmd, EXPRESS_SNOOP, flags, isRequest(), needsResponse(), and MemCmd::responseCommand().

Referenced by AbstractMemory::access(), SerialLink::SerialLinkMasterPort::checkFunctional(), Bridge::BridgeMasterPort::checkFunctional(), AbstractMemory::functionalAccess(), Cache::functionalAccess(), RubyPort::MemSlavePort::hitCallback(), makeAtomicResponse(), makeTimingResponse(), StubSlavePort::ResponseEvent::process(), PciVirtIO::read(), NoMaliGpu::read(), GenericTimerMem::read(), UFSHostDevice::read(), VirtIODeviceBase::readConfigBlob(), CoherentXBar::recvAtomic(), NoncoherentXBar::recvFunctional(), SerialLink::SerialLinkSlavePort::recvFunctional(), Bridge::BridgeSlavePort::recvFunctional(), CoherentXBar::recvFunctional(), CoherentXBar::recvFunctionalSnoop(), CoherentXBar::recvTimingReq(), TimingSimpleCPU::sendData(), TimingSimpleCPU::sendSplitData(), Minor::LSQ::tryToSendToTransfers(), PciVirtIO::write(), GenericTimerMem::write(), UFSHostDevice::write(), and VirtIODeviceBase::writeConfigBlob().

void Packet::makeTimingResponse ( )

inline

Definition at line 863 of file packet.hh.

References makeResponse().

Referenced by X86ISA::GpuTLB::handleTranslationReturn(), LdsState::process(), Cache::recvTimingReq(), Cache::recvTimingResp(), and TLBCoalescer::updatePhysAddresses().

static MemCmd Packet::makeWriteCmd ( const RequestPtr req )

inlinestatic

Generate the appropriate write MemCmd based on the Request flags.

Definition at line 794 of file packet.hh.

References Request::isLLSC(), Request::isSwap(), MemCmd::StoreCondReq, MemCmd::SwapReq, and MemCmd::WriteReq.

Referenced by createWrite().

bool Packet::mustCheckAbove ( ) const

inline

Does the request need to check for cached copies of the same block in the memory hierarchy above.

Definition at line 1130 of file packet.hh.

References cmd, MemCmd::HardPFReq, and isEviction().

Referenced by Cache::handleSnoop(), and Cache::recvTimingSnoopReq().

bool Packet::needsResponse ( ) const

inline

Definition at line 516 of file packet.hh.

References cmd, and MemCmd::needsResponse().

Referenced by Cache::access(), AbstractMemory::access(), DRAMSim2::accessAndRespond(), DRAMCtrl::accessAndRespond(), Cache::createMissPacket(), Cache::doTimingSupplyResponse(), MSHR::handleSnoop(), Cache::handleSnoop(), RubyPort::MemSlavePort::hitCallback(), SnoopFilter::lookupRequest(), makeResponse(), CommMonitor::recvAtomic(), CoherentXBar::recvAtomic(), Cache::recvAtomic(), RubyPort::MemSlavePort::recvFunctional(), NoncoherentXBar::recvFunctional(), CoherentXBar::recvFunctional(), CoherentXBar::recvFunctionalSnoop(), SimpleTimingPort::recvTimingReq(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), SimpleMemory::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), AddrMapper::recvTimingReq(), CommMonitor::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), Cache::recvTimingSnoopReq(), CoherentXBar::sinkPacket(), Minor::Fetch1::tryToSendToTransfers(), and ~Packet().

bool Packet::needsWritable ( ) const

inline

Definition at line 507 of file packet.hh.

References cmd, isRequest(), and MemCmd::needsWritable().

Referenced by Cache::access(), MSHR::allocateTarget(), MSHR::handleSnoop(), Cache::handleSnoop(), SnoopFilter::lookupSnoop(), Cache::recvAtomic(), Cache::recvTimingReq(), Cache::recvTimingSnoopReq(), Cache::satisfyRequest(), CoherentXBar::sinkPacket(), and MSHR::TargetList::updateFlags().

void Packet::popLabel ( )

inline

Pop label for PrintReq (safe to call unconditionally).

Definition at line 1170 of file packet.hh.

References isPrint(), safe_cast(), and senderState.

Referenced by PacketQueue::checkFunctional(), Queue< WriteQueueEntry >::checkFunctional(), Cache::functionalAccess(), DRAMCtrl::MemoryPort::recvFunctional(), SimpleMemory::recvFunctional(), SerialLink::SerialLinkSlavePort::recvFunctional(), DRAMSim2::recvFunctional(), and Bridge::BridgeSlavePort::recvFunctional().

Packet::SenderState * Packet::popSenderState ( )

Pop the top of the state stack and return a pointer to it.

This assumes the current sender state is not NULL. This should be preferred over direct manipulation of the senderState member variable.

Returns: The current top of the stack

Definition at line 337 of file packet.cc.

References Packet::SenderState::predecessor.

Referenced by MemCheckerMonitor::recvTimingReq(), AddrMapper::recvTimingReq(), CommMonitor::recvTimingReq(), RubyPort::MemMasterPort::recvTimingResp(), X86ISA::Walker::recvTimingResp(), Cache::recvTimingResp(), Minor::Fetch1::recvTimingResp(), Minor::LSQ::recvTimingResp(), RubyPort::ruby_hit_callback(), and X86ISA::Walker::sendTiming().

void Packet::print	(	std::ostream &	o,
		int	verbosity = `0`,
		const std::string &	prefix = `""`
	)		const

virtual

Implements Printable.

Referenced by Cache::access(), BaseCache::allocateWriteBuffer(), Cache::cleanEvictBlk(), Cache::createMissPacket(), Cache::doTimingSupplyResponse(), CoherentXBar::forwardTiming(), Cache::functionalAccess(), MSHR::handleSnoop(), Cache::handleSnoop(), SnoopFilter::lookupRequest(), SnoopFilter::lookupSnoop(), CoherentXBar::recvAtomic(), Cache::recvAtomic(), CoherentXBar::recvAtomicSnoop(), CoherentXBar::recvFunctional(), CoherentXBar::recvFunctionalSnoop(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), CoherentXBar::recvTimingResp(), Cache::recvTimingResp(), CoherentXBar::recvTimingSnoopReq(), Cache::recvTimingSnoopReq(), CoherentXBar::recvTimingSnoopResp(), Cache::recvTimingSnoopResp(), Cache::satisfyRequest(), Cache::sendMSHRQueuePacket(), Cache::sendWriteQueuePacket(), SnoopFilter::updateResponse(), SnoopFilter::updateSnoopForward(), SnoopFilter::updateSnoopResponse(), and Cache::writebackBlk().

std::string Packet::print ( ) const

A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overheads in fast mode.

Returns: string with the request's type and start<->end addresses

Definition at line 358 of file packet.cc.

void Packet::pushLabel ( const std::string & lbl )

inline

Push label for PrintReq (safe to call unconditionally).

Definition at line 1160 of file packet.hh.

References isPrint(), safe_cast(), and senderState.

Referenced by PacketQueue::checkFunctional(), Queue< WriteQueueEntry >::checkFunctional(), Cache::functionalAccess(), DRAMCtrl::MemoryPort::recvFunctional(), SimpleMemory::recvFunctional(), SerialLink::SerialLinkSlavePort::recvFunctional(), DRAMSim2::recvFunctional(), and Bridge::BridgeSlavePort::recvFunctional().

void Packet::pushSenderState ( Packet::SenderState * sender_state )

Push a new sender state to the packet and make the current sender state the predecessor of the new one.

This should be prefered over direct manipulation of the senderState member variable.

Parameters

sender_state SenderState to push at the top of the stack

Definition at line 329 of file packet.cc.

References Packet::SenderState::predecessor.

Referenced by Minor::Fetch1::FetchRequest::makePacket(), Minor::makePacketForRequest(), AbstractController::queueMemoryRead(), AbstractController::queueMemoryWrite(), AbstractController::queueMemoryWritePartial(), RubyPort::MemSlavePort::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), AddrMapper::recvTimingReq(), CommMonitor::recvTimingReq(), Cache::sendMSHRQueuePacket(), and X86ISA::Walker::sendTiming().

bool Packet::responderHadWritable ( ) const

inline

Definition at line 618 of file packet.hh.

References flags, Flags< T >::isSet(), and RESPONDER_HAD_WRITABLE.

Referenced by Cache::recvAtomic(), Cache::recvTimingReq(), setResponderHadWritable(), and CoherentXBar::sinkPacket().

template<typename T >

void Packet::set	(	T	v,
		ByteOrder	endian
	)

inline

Set the value in the data pointer to v using the specified endianness.

Definition at line 126 of file packet_access.hh.

References BigEndianByteOrder, LittleEndianByteOrder, panic, and ArmISA::v.

Referenced by X86ISA::buildIntRequest(), CopyEngine::CopyEngineChannel::channelRead(), SparcISA::TLB::doMmuRegRead(), handlePseudoInst(), PciVirtIO::read(), MmDisk::read(), DumbTOD::read(), NoMaliGpu::read(), Pl011::read(), AmbaFake::read(), A9SCU::read(), X86ISA::Speaker::read(), IsaFake::read(), TsunamiPChip::read(), X86ISA::Cmos::read(), X86ISA::I8254::read(), X86ISA::I8259::read(), TsunamiCChip::read(), X86ISA::I82094AA::read(), Uart8250::read(), HDLcd::read(), Gicv2m::read(), AlphaBackdoor::read(), PL031::read(), Sp804::Timer::read(), TsunamiIO::read(), EnergyCtrl::read(), CpuLocalTimer::Timer::read(), I2CBus::read(), GpuDispatcher::read(), Pl050::read(), RealViewCtrl::read(), CopyEngine::read(), X86ISA::I8042::read(), Sinic::Device::read(), GenericTimerMem::read(), NSGigE::read(), Pl111::read(), IGbE::read(), UFSHostDevice::read(), IdeController::readConfig(), PciDevice::readConfig(), Pl390::readCpu(), VGic::readCtrl(), Pl390::readDistributor(), AmbaDevice::readId(), Iob::readIob(), Iob::readJBus(), VGic::readVCpu(), and X86ISA::Walker::WalkerState::stepWalk().

template<typename T >

void Packet::set ( T v )

inline

Set the value in the data pointer to v as guest endian.

Definition at line 142 of file packet_access.hh.

References BigEndianGuest::htog(), and setRaw().

void Packet::setAddr ( Addr _addr )

inline

Update the address of this packet mid-transaction.

This is used by the address mapper to change an already set address to a new one based on the system configuration. It is intended to remap an existing address, so it asserts that the current address is valid.

Definition at line 647 of file packet.hh.

References addr, flags, Flags< T >::isSet(), and VALID_ADDR.

Referenced by AddrMapper::recvAtomic(), AddrMapper::recvAtomicSnoop(), AddrMapper::recvFunctional(), AddrMapper::recvFunctionalSnoop(), AddrMapper::recvTimingReq(), and AddrMapper::recvTimingResp().

void Packet::setBadAddress ( )

inline

Definition at line 631 of file packet.hh.

References MemCmd::BadAddressError, cmd, and isResponse().

Referenced by IsaFake::read(), AlphaBackdoor::read(), and IsaFake::write().

template<typename T >

void Packet::setBE ( T v )

inline

Set the value in the data pointer to v as big endian.

Definition at line 112 of file packet_access.hh.

References htobe(), and setRaw().

void Packet::setBlockCached ( )

inline

Definition at line 623 of file packet.hh.

References BLOCK_CACHED, flags, and Flags< T >::set().

Referenced by Cache::doWritebacks(), Cache::handleSnoop(), CoherentXBar::recvTimingReq(), Cache::recvTimingResp(), and Cache::recvTimingSnoopReq().

void Packet::setCacheResponding ( )

inline

Snoop flags.

Set the cacheResponding flag. This is used by the caches to signal another cache that they are responding to a request. A cache will only respond to snoops if it has the line in either Modified or Owned state. Note that on snoop hits we always pass the line as Modified and never Owned. In the case of an Owned line we proceed to invalidate all other copies.

On a cache fill (see Cache::handleFill), we check hasSharers first, ignoring the cacheResponding flag if hasSharers is set. A line is consequently allocated as:

hasSharers cacheResponding state true false Shared true true Shared false false Exclusive false true Modified

Definition at line 552 of file packet.hh.

References CACHE_RESPONDING, flags, isRequest(), Flags< T >::isSet(), and Flags< T >::set().

Referenced by MSHR::handleSnoop(), Cache::handleSnoop(), Cache::recvTimingSnoopReq(), and Cache::satisfyRequest().

void Packet::setData ( const uint8_t * p )

inline

Copy data into the packet from the provided pointer.

Definition at line 1024 of file packet.hh.

References flags, getSize(), Flags< T >::isSet(), MipsISA::p, and STATIC_DATA.

Referenced by Cache::cmpAndSwap(), X86ISA::handleIprRead(), X86ISA::Interrupts::read(), VirtIODeviceBase::readConfigBlob(), Cache::recvTimingResp(), and setDataFromBlock().

void Packet::setDataFromBlock	(	const uint8_t *	blk_data,
		int	blkSize
	)

inline

Copy data into the packet from the provided block pointer, which is aligned to the given block size.

Definition at line 1042 of file packet.hh.

References getOffset(), and setData().

Referenced by Cache::handleSnoop(), and Cache::satisfyRequest().

void Packet::setExpressSnoop ( )

inline

The express snoop flag is used for two purposes.

Firstly, it is used to bypass flow control for normal (non-snoop) requests going downstream in the memory system. In cases where a cache is responding to a snoop from another cache (it had a dirty line), but the line is not writable (and there are possibly other copies), the express snoop flag is set by the downstream cache to invalidate all other copies in zero time. Secondly, the express snoop flag is also set to be able to distinguish snoop packets that came from a downstream cache, rather than snoop packets from neighbouring caches.

Definition at line 600 of file packet.hh.

References EXPRESS_SNOOP, flags, and Flags< T >::set().

Referenced by Cache::handleSnoop(), Cache::isCachedAbove(), CoherentXBar::recvTimingReq(), and Cache::sendMSHRQueuePacket().

void Packet::setFunctionalResponseStatus ( bool success )

inline

Definition at line 869 of file packet.hh.

References cmd, MemCmd::FunctionalReadError, MemCmd::FunctionalWriteError, and isWrite().

Referenced by RubyPort::MemSlavePort::recvFunctional().

void Packet::setHasSharers ( )

inline

On fills, the hasSharers flag is used by the caches in combination with the cacheResponding flag, as clarified above.

If the hasSharers flag is not set, the packet is passing writable. Thus, a response from a memory passes the line as writable by default.

The hasSharers flag is also used by upstream caches to inform a downstream cache that they have the block (by calling setHasSharers on snoop request packets that hit in upstream cachs tags or MSHRs). If the snoop packet has sharers, a downstream cache is prevented from passing a dirty line upwards if it was not explicitly asked for a writable copy. See Cache::satisfyCpuSideRequest.

The hasSharers flag is also used on writebacks, in combination with the WritbackClean or WritebackDirty commands, to allocate the block downstream either as:

command hasSharers state WritebackDirty false Modified WritebackDirty true Owned WritebackClean false Exclusive WritebackClean true Shared

Definition at line 584 of file packet.hh.

References flags, HAS_SHARERS, and Flags< T >::set().

Referenced by Cache::createMissPacket(), MSHR::handleSnoop(), Cache::handleSnoop(), Cache::recvTimingSnoopReq(), Cache::satisfyRequest(), and Cache::writebackBlk().

template<typename T >

void Packet::setLE ( T v )

inline

Set the value in the data pointer to v as little endian.

Definition at line 119 of file packet_access.hh.

References htole(), and setRaw().

template<typename T >

void Packet::setRaw ( T v )

inlineprivate

Set the value in the data pointer to v without byte swapping.

Definition at line 65 of file packet_access.hh.

References data, DYNAMIC_DATA, flags, Flags< T >::isSet(), size, and STATIC_DATA.

Referenced by set(), setBE(), and setLE().

void Packet::setResponderHadWritable ( )

inline

On responding to a snoop request (which only happens for Modified or Owned lines), make sure that we can transform an Owned response to a Modified one.

If this flag is not set, the responding cache had the line in the Owned state, and there are possibly other Shared copies in the memory system. A downstream cache helps in orchestrating the invalidation of these copies by sending out the appropriate express snoops.

Definition at line 612 of file packet.hh.

References cacheResponding(), flags, RESPONDER_HAD_WRITABLE, responderHadWritable(), and Flags< T >::set().

Referenced by MSHR::handleSnoop(), Cache::handleSnoop(), and Cache::recvTimingSnoopReq().

void Packet::setSize ( unsigned size )

inline

Definition at line 881 of file packet.hh.

References flags, Flags< T >::isSet(), Flags< T >::set(), size, and VALID_SIZE.

void Packet::setSuppressFuncError ( )

inline

Definition at line 621 of file packet.hh.

References flags, Flags< T >::set(), and SUPPRESS_FUNC_ERROR.

Referenced by Shader::doFunctionalAccess().

bool Packet::suppressFuncError ( ) const

inline

Definition at line 622 of file packet.hh.

References flags, Flags< T >::isSet(), and SUPPRESS_FUNC_ERROR.

Referenced by RubyPort::MemSlavePort::recvFunctional().

void Packet::writeData ( uint8_t * p ) const

inline

Copy data from the packet to the provided block pointer, which is aligned to the given block size.

Definition at line 1052 of file packet.hh.

References getSize().

Referenced by Cache::cmpAndSwap(), X86ISA::handleIprWrite(), X86ISA::Interrupts::write(), VirtIODeviceBase::writeConfigBlob(), and writeDataToBlock().

void Packet::writeDataToBlock	(	uint8_t *	blk_data,
		int	blkSize
	)		const

inline

Copy data from the packet to the memory at the provided pointer.

Definition at line 1061 of file packet.hh.

References getOffset(), and writeData().

Referenced by Cache::satisfyRequest().

Member Data Documentation

bool Packet::_isSecure

private

True if the request targets the secure memory space.

Definition at line 321 of file packet.hh.

Referenced by isSecure(), and Packet().

Addr Packet::addr

private

The address of the request.

This address could be virtual or physical, depending on the system configuration.

Definition at line 318 of file packet.hh.

Referenced by getAddr(), Packet(), and setAddr().

std::vector<bool> Packet::bytesValid

private

Track the bytes found that satisfy a functional read.

Definition at line 329 of file packet.hh.

MemCmd Packet::cmd

The command field of the packet.

Definition at line 301 of file packet.hh.

Referenced by Cache::access(), AbstractMemory::access(), MSHR::allocate(), MSHR::allocateTarget(), BaseCache::allocateWriteBuffer(), TimingSimpleCPU::buildSplitPacket(), cmdString(), cmdToIndex(), convertLlToRead(), convertScToWrite(), copyError(), Cache::createMissPacket(), Cache::doWritebacks(), Cache::doWritebacksAtomic(), MSHR::extractServiceableTargets(), CoherentXBar::forwardAtomic(), fromCache(), Cache::handleFill(), MSHR::handleSnoop(), hasData(), hasRespData(), RubyPort::MemSlavePort::hitCallback(), isCleanEviction(), isError(), isEviction(), isFlush(), isInvalidate(), isLLSC(), isPrint(), isRead(), isRequest(), isResponse(), isUpgrade(), isWrite(), isWriteback(), makeResponse(), mustCheckAbove(), needsResponse(), needsWritable(), BasePrefetcher::observeAccess(), Cache::promoteWholeLineWrites(), MessageSlavePort::recvAtomic(), CoherentXBar::recvAtomic(), Cache::recvAtomic(), CoherentXBar::recvAtomicSnoop(), X86ISA::Interrupts::recvMessage(), X86ISA::Interrupts::recvResponse(), RubyPort::MemSlavePort::recvTimingReq(), Cache::recvTimingReq(), Cache::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::ITLBPort::recvTimingResp(), Minor::LSQ::recvTimingResp(), Cache::recvTimingSnoopResp(), replaceUpgrade(), Cache::satisfyRequest(), Cache::sendMSHRQueuePacket(), ComputeUnit::sendRequest(), setBadAddress(), setFunctionalResponseStatus(), X86ISA::Walker::WalkerState::stepWalk(), and MSHR::TargetList::updateFlags().

PacketDataPtr Packet::data

private

A pointer to the data being transfered.

It can be differnt sizes at each level of the heirarchy so it belongs in the packet, not request. This may or may not be populated when a responder recieves the packet. If not populated it memory should be allocated.

Definition at line 314 of file packet.hh.

Referenced by allocate(), dataDynamic(), dataStatic(), dataStaticConst(), deleteData(), getConstPtr(), getPtr(), getRaw(), Packet(), and setRaw().

Flags Packet::flags

private

Definition at line 295 of file packet.hh.

Referenced by allocate(), cacheResponding(), clearBlockCached(), dataDynamic(), dataStatic(), dataStaticConst(), deleteData(), getAddr(), getConstPtr(), getPtr(), getRaw(), getSize(), hasSharers(), isBlockCached(), isExpressSnoop(), isSecure(), makeResponse(), Packet(), responderHadWritable(), setAddr(), setBlockCached(), setCacheResponding(), setData(), setExpressSnoop(), setHasSharers(), setRaw(), setResponderHadWritable(), setSize(), setSuppressFuncError(), and suppressFuncError().

uint32_t Packet::headerDelay

The extra delay from seeing the packet until the header is transmitted.

This delay is used to communicate the crossbar forwarding latency to the neighbouring object (e.g. a cache) that actually makes the packet wait. As the delay is relative, a 32-bit unsigned should be sufficient.

Definition at line 340 of file packet.hh.

Referenced by DRAMSim2::accessAndRespond(), DRAMCtrl::accessAndRespond(), BaseXBar::calcPacketTiming(), Cache::handleSnoop(), Cache::handleUncacheableWriteResp(), StubSlavePort::ResponseEvent::process(), GenericPciHost::read(), PioPort::recvAtomic(), X86ISA::IntDevice::IntSlavePort::recvMessage(), X86ISA::Walker::WalkerState::recvPacket(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), SimpleMemory::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), NoncoherentXBar::recvTimingResp(), CoherentXBar::recvTimingResp(), SerialLink::SerialLinkMasterPort::recvTimingResp(), Bridge::BridgeMasterPort::recvTimingResp(), Cache::recvTimingResp(), CoherentXBar::recvTimingSnoopReq(), CoherentXBar::recvTimingSnoopResp(), Cache::recvTimingSnoopResp(), and GenericPciHost::write().

uint32_t Packet::payloadDelay

The extra pipelining delay from seeing the packet until the end of payload is transmitted by the component that provided it (if any).

This includes the header delay. Similar to the header delay, this is used to make up for the fact that the crossbar does not make the packet wait. As the delay is relative, a 32-bit unsigned should be sufficient.

Definition at line 358 of file packet.hh.

Referenced by DRAMSim2::accessAndRespond(), DRAMCtrl::accessAndRespond(), BaseXBar::calcPacketTiming(), Cache::handleFill(), Cache::handleSnoop(), Cache::handleUncacheableWriteResp(), StubSlavePort::ResponseEvent::process(), GenericPciHost::read(), PioPort::recvAtomic(), NoncoherentXBar::recvAtomic(), CoherentXBar::recvAtomic(), CoherentXBar::recvAtomicSnoop(), X86ISA::IntDevice::IntSlavePort::recvMessage(), X86ISA::Walker::WalkerState::recvPacket(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), SerialLink::SerialLinkSlavePort::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), SimpleMemory::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), NoncoherentXBar::recvTimingResp(), CoherentXBar::recvTimingResp(), SerialLink::SerialLinkMasterPort::recvTimingResp(), Bridge::BridgeMasterPort::recvTimingResp(), Cache::recvTimingResp(), CoherentXBar::recvTimingSnoopResp(), Cache::recvTimingSnoopResp(), and GenericPciHost::write().

const RequestPtr Packet::req

A pointer to the original request.

Definition at line 304 of file packet.hh.

Referenced by Cache::access(), AbstractMemory::access(), TraceCPU::ElasticDataGen::addToSortedReadyList(), Minor::ForwardLineData::adoptPacketData(), WriteQueueEntry::allocate(), MSHR::allocate(), StridePrefetcher::calculatePrefetch(), TLBCoalescer::canCoalesce(), AbstractMemory::checkLockedAddrList(), CacheBlk::checkWrite(), Cache::cmpAndSwap(), BaseO3DynInst< Impl >::completeAcc(), LSQUnit< Impl >::completeDataAccess(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), GPUCoalescer::completeIssue(), TraceCPU::ElasticDataGen::completeMemAccess(), GarnetSyntheticTraffic::completeRequest(), MemTest::completeRequest(), Cache::createMissPacket(), Shader::doFunctionalAccess(), BaseKvmCPU::doMMIOAccess(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), Cache::doTimingSupplyResponse(), TraceCPU::ElasticDataGen::execute(), FetchUnit::fetch(), getAtomicOp(), Cache::getNextQueueEntry(), X86ISA::GpuTLB::handleFuncTranslationReturn(), Sequencer::handleLlsc(), GPUCoalescer::handleLlsc(), TimingSimpleCPU::handleReadPacket(), DmaPort::handleResp(), MSHR::handleSnoop(), Cache::handleSnoop(), X86ISA::GpuTLB::handleTranslationReturn(), TimingSimpleCPU::handleWritePacket(), RubyPort::MemSlavePort::hitCallback(), Sequencer::hitCallback(), BaseCache::incHitCount(), BaseCache::incMissCount(), InvalidateGenerator::initiate(), SeriesRequestGenerator::initiate(), Check::initiateAction(), Check::initiateCheck(), Check::initiatePrefetch(), BaseSetAssoc::insertBlock(), GPUCoalescer::insertRequest(), isAtomicOp(), GenericISA::isGenericIprAccess(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), X86ISA::GpuTLB::issueTLBLookup(), SnoopFilter::lookupRequest(), SnoopFilter::lookupSnoop(), VIPERCoalescer::makeRequest(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), QueuedPrefetcher::notify(), BasePrefetcher::observeAccess(), Packet(), X86ISA::GpuTLB::pagingProtectionChecks(), TLBCoalescer::IssueProbeEvent::process(), DefaultFetch< Impl >::processCacheCompletion(), FetchStage::processFetchReturn(), FetchUnit::processFetchReturn(), TsunamiCChip::read(), CpuLocalTimer::read(), Sinic::Device::read(), Pl390::readCpu(), VGic::readCtrl(), Pl390::readDistributor(), Iob::readJBus(), VGic::readVCpu(), Cache::recvAtomic(), TLBCoalescer::CpuSidePort::recvFunctional(), X86ISA::GpuTLB::CpuSidePort::recvFunctional(), ComputeUnit::DataPort::recvReqRetry(), ComputeUnit::SQCPort::recvReqRetry(), ComputeUnit::DTLBPort::recvReqRetry(), ComputeUnit::ITLBPort::recvReqRetry(), X86ISA::I82094AA::recvResponse(), HMCController::recvTimingReq(), NoncoherentXBar::recvTimingReq(), MemCheckerMonitor::recvTimingReq(), CoherentXBar::recvTimingReq(), Cache::recvTimingReq(), RubyDirectedTester::CpuPort::recvTimingResp(), RubyTester::CpuPort::recvTimingResp(), AbstractController::recvTimingResp(), DmaPort::recvTimingResp(), FullO3CPU< Impl >::IcachePort::recvTimingResp(), NoncoherentXBar::recvTimingResp(), TrafficGen::TrafficGenPort::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), TraceCPU::IcachePort::recvTimingResp(), TraceCPU::DcachePort::recvTimingResp(), CoherentXBar::recvTimingResp(), LSQ< Impl >::recvTimingResp(), X86ISA::GpuTLB::MemSidePort::recvTimingResp(), Cache::recvTimingResp(), ComputeUnit::DataPort::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), BaseKvmCPU::KVMCpuPort::recvTimingResp(), ComputeUnit::ITLBPort::recvTimingResp(), ComputeUnit::LDSPort::recvTimingResp(), CoherentXBar::recvTimingSnoopReq(), Cache::recvTimingSnoopReq(), CoherentXBar::recvTimingSnoopResp(), Cache::recvTimingSnoopResp(), Minor::LSQ::SplitDataRequest::retireResponse(), DmaPort::sendDma(), Cache::sendMSHRQueuePacket(), ComputeUnit::sendRequest(), ComputeUnit::sendSyncRequest(), ComputeUnit::LDSPort::sendTimingReq(), X86ISA::Walker::WalkerState::stepWalk(), BaseKvmCPU::KVMCpuPort::submitIO(), AbstractMemory::trackLoadLocked(), CacheBlk::trackLoadLocked(), X86ISA::GpuTLB::translationReturn(), Minor::LSQ::tryToSend(), TrafficGen::update(), TLBCoalescer::updatePhysAddresses(), SnoopFilter::updateResponse(), SnoopFilter::updateSnoopResponse(), GpuDispatcher::write(), CpuLocalTimer::write(), Sinic::Device::write(), LSQUnit< Impl >::writebackStores(), Pl390::writeCpu(), VGic::writeCtrl(), Pl390::writeDistributor(), Iob::writeJBus(), AbstractMemory::writeOK(), VGic::writeVCpu(), and ~Packet().

SenderState* Packet::senderState

This packet's sender state.

Devices should use dynamic_cast<> to cast to the state appropriate to the sender. The intent of this variable is to allow a device to attach extra information to a request. A response packet must return the sender state that was attached to the original request (even if a new packet is created).

Definition at line 454 of file packet.hh.

Referenced by GPUCoalescer::atomicCallback(), TimingSimpleCPU::buildSplitPacket(), TLBCoalescer::canCoalesce(), TimingSimpleCPU::SplitFragmentSenderState::clearFromParent(), LSQUnit< Impl >::completeDataAccess(), TimingSimpleCPU::completeDataAccess(), LdsState::countBankConflicts(), DmaPort::dmaAction(), FetchUnit::fetch(), findNextSenderState(), AbstractMemory::functionalAccess(), Shader::functionalTLBAccess(), LdsState::getDynInstr(), X86ISA::GpuTLB::handleFuncTranslationReturn(), DmaPort::handleResp(), X86ISA::GpuTLB::handleTranslationReturn(), GPUCoalescer::hitCallback(), Check::initiateAction(), Check::initiateCheck(), Check::initiateFlush(), Check::initiatePrefetch(), Cache::isCachedAbove(), X86ISA::GpuTLB::issueTLBLookup(), popLabel(), MasterPort::printAddr(), TLBCoalescer::IssueProbeEvent::process(), LdsState::process(), FetchStage::processFetchReturn(), FetchUnit::processFetchReturn(), pushLabel(), LSQUnit< Impl >::read(), TLBCoalescer::CpuSidePort::recvFunctional(), X86ISA::GpuTLB::CpuSidePort::recvFunctional(), TimingSimpleCPU::DcachePort::recvReqRetry(), TLBCoalescer::CpuSidePort::recvTimingReq(), RubyTester::CpuPort::recvTimingResp(), AbstractController::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), AddrMapper::recvTimingResp(), CommMonitor::recvTimingResp(), ComputeUnit::DataPort::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::ITLBPort::recvTimingResp(), ComputeUnit::LDSPort::recvTimingResp(), Cache::sendMSHRQueuePacket(), ComputeUnit::sendRequest(), TimingSimpleCPU::sendSplitData(), ComputeUnit::sendSyncRequest(), ComputeUnit::LDSPort::sendTimingReq(), ComputeUnit::sendToLds(), X86ISA::GpuTLB::translationReturn(), TLBCoalescer::updatePhysAddresses(), and LSQUnit< Impl >::writebackStores().

unsigned Packet::size

private

The size of the request or transfer.

Definition at line 324 of file packet.hh.

Referenced by getRaw(), getSize(), Packet(), setRaw(), and setSize().

uint32_t Packet::snoopDelay

Keep track of the extra delay incurred by snooping upwards before sending a request down the memory system.

This is used by the coherent crossbar to account for the additional request delay.

Definition at line 348 of file packet.hh.

Referenced by CoherentXBar::recvTimingReq(), CoherentXBar::recvTimingSnoopReq(), and Cache::recvTimingSnoopReq().

The documentation for this class was generated from the following files:

Classes

Public Types

Public Member Functions

Static Public Member Functions

Public Attributes

Private Types

Private Member Functions

Private Attributes

Detailed Description

Member Typedef Documentation

Member Enumeration Documentation

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation