42 #include "config/the_isa.hh"
43 #include "debug/Tsunami.hh"
54 using namespace TheISA;
59 pioDelay(p->pio_latency)
61 for (
int i = 0;
i < 4;
i++) {
68 pctl = (
ULL(0x1) << 20) | (
ULL(0x1) << 32) | (
ULL(0x2) << 36);
71 p->tsunami->pchip =
this;
83 assert(pkt->
getSize() ==
sizeof(uint64_t));
129 panic(
"PC_PLAT not implemented\n");
131 panic(
"PC_RES not implemented\n");
133 pkt->
set((uint64_t)0x00);
136 pkt->
set((uint64_t)0x00);
139 panic(
"PC_PERRSET not implemented\n");
141 panic(
"PC_TLBIV not implemented\n");
143 pkt->
set((uint64_t)0x00);
146 panic(
"PC_PMONCTL not implemented\n");
148 panic(
"PC_PMONCTN not implemented\n");
150 panic(
"Default in PChip Read reached reading 0x%x\n", daddr);
168 assert(pkt->
getSize() ==
sizeof(uint64_t));
174 wsba[0] = pkt->
get<uint64_t>();
177 wsba[1] = pkt->
get<uint64_t>();
180 wsba[2] = pkt->
get<uint64_t>();
183 wsba[3] = pkt->
get<uint64_t>();
186 wsm[0] = pkt->
get<uint64_t>();
189 wsm[1] = pkt->
get<uint64_t>();
192 wsm[2] = pkt->
get<uint64_t>();
195 wsm[3] = pkt->
get<uint64_t>();
198 tba[0] = pkt->
get<uint64_t>();
201 tba[1] = pkt->
get<uint64_t>();
204 tba[2] = pkt->
get<uint64_t>();
207 tba[3] = pkt->
get<uint64_t>();
213 panic(
"PC_PLAT not implemented\n");
215 panic(
"PC_RES not implemented\n");
219 panic(
"PC_PERRMASK not implemented\n");
221 panic(
"PC_PERRSET not implemented\n");
223 panic(
"PC_TLBIV not implemented\n");
227 panic(
"PC_PMONCTL not implemented\n");
229 panic(
"PC_PMONCTN not implemented\n");
231 panic(
"Default in PChip write reached reading 0x%x\n", daddr);
250 #define DMA_ADDR_MASK ULL(0x3ffffffff)
256 uint64_t tbaMask = 0;
259 uint64_t windowMask = 0;
260 uint64_t windowBase = 0;
262 uint64_t pteEntry = 0;
269 for (
int i = 0;
i < 4;
i++) {
273 windowBase =
wsba[
i];
274 windowMask = ~
wsm[
i] & (
ULL(0xfff) << 20);
276 if ((busAddr & windowMask) == (windowBase & windowMask)) {
277 DPRINTF(
IdeDisk,
"Would have matched %d (wb:%#x wm:%#x --> ba&wm:%#x wb&wm:%#x)\n",
278 i, windowBase, windowMask, (busAddr & windowMask),
279 (windowBase & windowMask));
284 for (
int i = 0;
i < 4;
i++) {
286 windowBase =
wsba[
i];
287 windowMask = ~
wsm[
i] & (
ULL(0xfff) << 20);
289 if ((busAddr & windowMask) == (windowBase & windowMask)) {
303 tbaMask = ~(((
wsm[
i] & (
ULL(0xfff) << 20)) >> 10) |
ULL(0x3ff));
304 baMask = (
wsm[
i] & (
ULL(0xfff) << 20)) | (
ULL(0x7f) << 13);
305 pteAddr = (
tba[
i] & tbaMask) | ((busAddr & baMask) >> 10);
310 dmaAddr = ((pteEntry & ~
ULL(0x1)) << 12) | (busAddr &
ULL(0x1fff));
313 baMask = (
wsm[
i] & (
ULL(0xfff) << 20)) |
ULL(0xfffff);
315 dmaAddr = (
tba[
i] & tbaMask) | (busAddr & baMask);
347 TsunamiPChipParams::create()
AddrRange RangeSize(Addr start, Addr size)
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
void set(T v, ByteOrder endian)
Set the value in the data pointer to v using the specified endianness.
uint64_t tba[4]
Translated Base Addresses.
uint64_t wsba[4]
Window Base addresses.
Emulation of the Tsunami CChip CSRs.
Addr start() const
Get the start address of the range.
Configurable generic PCI host interface.
Tsunami PCI interface CSRs.
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
Top level class for Tsunami Chipset emulation.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
bool contains(const Addr &a) const
Determine if the range contains an address.
TsunamiPChipParams Params
T get(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness.
uint64_t wsm[4]
Window masks.
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
#define UNSERIALIZE_SCALAR(scalar)
TsunamiPChip(const Params *p)
Register the PChip with the mmu and init all wsba, wsm, and tba to 0.
#define TSDEV_PC_PERRMASK
void makeAtomicResponse()
uint64_t Tick
Tick count type.
A very simple implementation of the Tsunami PCI interface chips.
Declaration of top level class for the Tsunami chipset.
#define SERIALIZE_ARRAY(member, size)
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
#define ULL(N)
uint64_t constant
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Addr dmaAddr(const PciBusAddr &addr, Addr pci_addr) const override
Translate a PCI bus address to a memory address for DMA.
#define SERIALIZE_SCALAR(scalar)
uint64_t pctl
Pchip control register.
virtual void readBlob(Addr addr, uint8_t *p, int size) const
Read size bytes memory at address and store in p.
#define UNSERIALIZE_ARRAY(member, size)
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Declaration of the Packet class.
std::ostream CheckpointOut
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void serialize(CheckpointOut &cp) const override
Serialize an object.