37 #ifndef __DEV_TSUNAMI_HH__
38 #define __DEV_TSUNAMI_HH__
41 #include "params/Tsunami.hh"
100 #endif // __DEV_TSUNAMI_HH__
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
Top level class for Tsunami Chipset emulation.
Device model for an Intel PIIX4 IDE controller.
System * system
Pointer to the system.
static const int Max_CPUs
Max number of CPUs in a Tsunami.
void serialize(CheckpointOut &cp) const override
Serialize an object.
TsunamiCChip * cchip
Pointer to the Tsunami CChip.
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
void clearConsoleInt() override
Clear a posted CPU interrupt.
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
A very simple implementation of the Tsunami PCI interface chips.
int intr_sum_type[Tsunami::Max_CPUs]
int ipi_pending[Tsunami::Max_CPUs]
Tsunami CChip CSR Emulation.
std::ostream CheckpointOut
Tsunami I/O device is a catch all for all the south bridge stuff we care to implement.
TsunamiIO * io
Pointer to the TsunamiIO device which has the RTC.
TsunamiPChip * pchip
Pointer to the Tsunami PChip.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.