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tsunami.hh
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1 /*
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28  * Authors: Ali Saidi
29  */
30 
37 #ifndef __DEV_TSUNAMI_HH__
38 #define __DEV_TSUNAMI_HH__
39 
40 #include "dev/platform.hh"
41 #include "params/Tsunami.hh"
42 
43 class IdeController;
44 class TsunamiCChip;
45 class TsunamiPChip;
46 class TsunamiIO;
47 class System;
48 
56 class Tsunami : public Platform
57 {
58  public:
60  static const int Max_CPUs = 64;
61 
64 
67 
73 
79 
82 
83  void init() override;
84 
85  public:
86  typedef TsunamiParams Params;
87  Tsunami(const Params *p);
88 
89  void serialize(CheckpointOut &cp) const override;
90  void unserialize(CheckpointIn &cp) override;
91 
92  public: // Public Platform interfaces
93  void postConsoleInt() override;
94  void clearConsoleInt() override;
95 
96  void postPciInt(int line) override;
97  void clearPciInt(int line) override;
98 };
99 
100 #endif // __DEV_TSUNAMI_HH__
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
Definition: tsunami.cc:81
Tsunami(const Params *p)
Definition: tsunami.cc:53
TsunamiParams Params
Definition: tsunami.hh:86
Top level class for Tsunami Chipset emulation.
Definition: tsunami.hh:56
Device model for an Intel PIIX4 IDE controller.
Definition: ide_ctrl.hh:51
System * system
Pointer to the system.
Definition: tsunami.hh:63
static const int Max_CPUs
Max number of CPUs in a Tsunami.
Definition: tsunami.hh:60
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: tsunami.cc:93
Definition: system.hh:83
TsunamiCChip * cchip
Pointer to the Tsunami CChip.
Definition: tsunami.hh:72
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: tsunami.cc:61
void clearConsoleInt() override
Clear a posted CPU interrupt.
Definition: tsunami.cc:75
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
Definition: tsunami.cc:69
A very simple implementation of the Tsunami PCI interface chips.
int intr_sum_type[Tsunami::Max_CPUs]
Definition: tsunami.hh:80
int ipi_pending[Tsunami::Max_CPUs]
Definition: tsunami.hh:81
Generic interface for platforms.
Tsunami CChip CSR Emulation.
std::ostream CheckpointOut
Definition: serialize.hh:67
Tsunami I/O device is a catch all for all the south bridge stuff we care to implement.
Definition: tsunami_io.hh:52
TsunamiIO * io
Pointer to the TsunamiIO device which has the RTC.
Definition: tsunami.hh:66
TsunamiPChip * pchip
Pointer to the Tsunami PChip.
Definition: tsunami.hh:78
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: tsunami.cc:99
Bitfield< 0 > p
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
Definition: tsunami.cc:87

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