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tsunami.cc
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1 /*
2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
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12  * neither the name of the copyright holders nor the names of its
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14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * Authors: Ali Saidi
29  */
30 
35 #include "dev/alpha/tsunami.hh"
36 
37 #include <deque>
38 #include <string>
39 #include <vector>
40 
41 #include "arch/alpha/system.hh"
42 #include "config/the_isa.hh"
43 #include "cpu/intr_control.hh"
45 #include "dev/alpha/tsunami_io.hh"
47 #include "dev/terminal.hh"
48 
49 using namespace std;
50 //Should this be AlphaISA?
51 using namespace TheISA;
52 
54  : Platform(p), system(p->system)
55 {
56  for (int i = 0; i < Tsunami::Max_CPUs; i++)
57  intr_sum_type[i] = 0;
58 }
59 
60 void
62 {
63  AlphaSystem *alphaSystem = dynamic_cast<AlphaSystem *>(system);
64  assert(alphaSystem);
65  alphaSystem->setIntrFreq(io->frequency());
66 }
67 
68 void
70 {
71  io->postPIC(0x10);
72 }
73 
74 void
76 {
77  io->clearPIC(0x10);
78 }
79 
80 void
82 {
83  cchip->postDRIR(line);
84 }
85 
86 void
88 {
89  cchip->clearDRIR(line);
90 }
91 
92 void
94 {
96 }
97 
98 void
100 {
102 }
103 
104 Tsunami *
105 TsunamiParams::create()
106 {
107  return new Tsunami(this);
108 }
void postPciInt(int line) override
Cause the chipset to post a cpi interrupt to the CPU.
Definition: tsunami.cc:81
Emulation of the Tsunami CChip CSRs.
Tsunami(const Params *p)
Definition: tsunami.cc:53
TsunamiParams Params
Definition: tsunami.hh:86
Bitfield< 7 > i
Definition: miscregs.hh:1378
Tsunami PCI interface CSRs.
void postDRIR(uint32_t interrupt)
post an interrupt to the CPU.
Top level class for Tsunami Chipset emulation.
Definition: tsunami.hh:56
System * system
Pointer to the system.
Definition: tsunami.hh:63
static const int Max_CPUs
Max number of CPUs in a Tsunami.
Definition: tsunami.hh:60
void clearPIC(uint8_t bitvector)
Clear a posted interrupt.
Definition: tsunami_io.cc:244
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: tsunami.cc:93
void setIntrFreq(Tick freq)
Definition: system.hh:127
TsunamiCChip * cchip
Pointer to the Tsunami CChip.
Definition: tsunami.hh:72
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: tsunami.cc:61
void clearConsoleInt() override
Clear a posted CPU interrupt.
Definition: tsunami.cc:75
void postConsoleInt() override
Cause the cpu to post a serial interrupt to the CPU.
Definition: tsunami.cc:69
system
Definition: isa.cc:226
Declaration of top level class for the Tsunami chipset.
#define SERIALIZE_ARRAY(member, size)
Definition: serialize.hh:158
int intr_sum_type[Tsunami::Max_CPUs]
Definition: tsunami.hh:80
Tsunami I/O Space mapping including RTC/timer interrupts.
Tick frequency() const
Return the freqency of the RTC.
Definition: tsunami_io.cc:85
#define UNSERIALIZE_ARRAY(member, size)
Definition: serialize.hh:161
std::ostream CheckpointOut
Definition: serialize.hh:67
void clearDRIR(uint32_t interrupt)
clear an interrupt previously posted to the CPU.
TsunamiIO * io
Pointer to the TsunamiIO device which has the RTC.
Definition: tsunami.hh:66
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: tsunami.cc:99
void postPIC(uint8_t bitvector)
Post an PIC interrupt to the CPU via the CChip.
Definition: tsunami_io.cc:233
Bitfield< 0 > p
void clearPciInt(int line) override
Clear a posted PCI->CPU interrupt.
Definition: tsunami.cc:87

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