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gem5
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Tsunami CChip CSR Emulation. More...
#include <tsunami_cchip.hh>
Public Types | |
| typedef TsunamiCChipParams | Params |
Public Types inherited from BasicPioDevice | |
| typedef BasicPioDeviceParams | Params |
Public Types inherited from PioDevice | |
| typedef PioDeviceParams | Params |
Public Types inherited from MemObject | |
| typedef MemObjectParams | Params |
Public Types inherited from ClockedObject | |
| typedef ClockedObjectParams | Params |
| Parameters of ClockedObject. More... | |
Public Types inherited from SimObject | |
| typedef SimObjectParams | Params |
Public Member Functions | |
| TsunamiCChip (const Params *p) | |
| Initialize the Tsunami CChip by setting all of the device register to 0. More... | |
| const Params * | params () const |
| Tick | read (PacketPtr pkt) override |
| Pure virtual function that the device must implement. More... | |
| Tick | write (PacketPtr pkt) override |
| Pure virtual function that the device must implement. More... | |
| void | postRTC () |
| post an RTC interrupt to the CPU More... | |
| void | postDRIR (uint32_t interrupt) |
| post an interrupt to the CPU. More... | |
| void | clearDRIR (uint32_t interrupt) |
| clear an interrupt previously posted to the CPU. More... | |
| void | clearIPI (uint64_t ipintr) |
| post an ipi interrupt to the CPU. More... | |
| void | clearITI (uint64_t itintr) |
| clear a timer interrupt previously posted to the CPU. More... | |
| void | reqIPI (uint64_t ipreq) |
| request an interrupt be posted to the CPU. More... | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
Public Member Functions inherited from BasicPioDevice | |
| BasicPioDevice (const Params *p, Addr size) | |
| const Params * | params () const |
| virtual AddrRangeList | getAddrRanges () const |
| Determine the address ranges that this device responds to. More... | |
Public Member Functions inherited from PioDevice | |
| PioDevice (const Params *p) | |
| virtual | ~PioDevice () |
| const Params * | params () const |
| virtual void | init () |
| init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
| virtual BaseSlavePort & | getSlavePort (const std::string &if_name, PortID idx=InvalidPortID) |
| Get a slave port with a given name and index. More... | |
Public Member Functions inherited from MemObject | |
| const Params * | params () const |
| MemObject (const Params *params) | |
| virtual BaseMasterPort & | getMasterPort (const std::string &if_name, PortID idx=InvalidPortID) |
| Get a master port with a given name and index. More... | |
Public Member Functions inherited from ClockedObject | |
| ClockedObject (const ClockedObjectParams *p) | |
| const Params * | params () const |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
| Enums::PwrState | pwrState () const |
| std::string | pwrStateName () const |
| std::vector< double > | pwrStateWeights () const |
| Returns the percentage residency for each power state. More... | |
| void | computeStats () |
| Record stats values like state residency by computing the time difference from previous update. More... | |
| void | pwrState (Enums::PwrState) |
| void | regStats () override |
| Register statistics for this object. More... | |
Public Member Functions inherited from SimObject | |
| const Params * | params () const |
| SimObject (const Params *_params) | |
| virtual | ~SimObject () |
| virtual const std::string | name () const |
| virtual void | loadState (CheckpointIn &cp) |
| loadState() is called on each SimObject when restoring from a checkpoint. More... | |
| virtual void | initState () |
| initState() is called on each SimObject when not restoring from a checkpoint. More... | |
| virtual void | resetStats () |
| Reset statistics associated with this object. More... | |
| virtual void | regProbePoints () |
| Register probe points for this object. More... | |
| virtual void | regProbeListeners () |
| Register probe listeners for this object. More... | |
| ProbeManager * | getProbeManager () |
| Get the probe manager for this object. More... | |
| virtual void | startup () |
| startup() is the final initialization call before simulation. More... | |
| DrainState | drain () override |
| Provide a default implementation of the drain interface for objects that don't need draining. More... | |
| virtual void | memWriteback () |
| Write back dirty buffers to memory using functional writes. More... | |
| virtual void | memInvalidate () |
| Invalidate the contents of memory buffers. More... | |
| void | serialize (CheckpointOut &cp) const override |
| Serialize an object. More... | |
| void | unserialize (CheckpointIn &cp) override |
| Unserialize an object. More... | |
Public Member Functions inherited from EventManager | |
| EventManager (EventManager &em) | |
| EventManager (EventManager *em) | |
| EventManager (EventQueue *eq) | |
| EventQueue * | eventQueue () const |
| void | schedule (Event &event, Tick when) |
| void | deschedule (Event &event) |
| void | reschedule (Event &event, Tick when, bool always=false) |
| void | schedule (Event *event, Tick when) |
| void | deschedule (Event *event) |
| void | reschedule (Event *event, Tick when, bool always=false) |
| void | wakeupEventQueue (Tick when=(Tick)-1) |
| void | setCurTick (Tick newVal) |
Public Member Functions inherited from Serializable | |
| Serializable () | |
| virtual | ~Serializable () |
| void | serializeSection (CheckpointOut &cp, const char *name) const |
| Serialize an object into a new section. More... | |
| void | serializeSection (CheckpointOut &cp, const std::string &name) const |
| void | unserializeSection (CheckpointIn &cp, const char *name) |
| Unserialize an a child object. More... | |
| void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from Drainable | |
| DrainState | drainState () const |
| Return the current drain state of an object. More... | |
| virtual void | notifyFork () |
| Notify a child process of a fork. More... | |
Public Member Functions inherited from Clocked | |
| void | updateClockPeriod () const |
| Update the tick to the current tick. More... | |
| Tick | clockEdge (Cycles cycles=Cycles(0)) const |
| Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
| Cycles | curCycle () const |
| Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
| Tick | nextCycle () const |
| Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
| uint64_t | frequency () const |
| Tick | clockPeriod () const |
| double | voltage () const |
| Cycles | ticksToCycles (Tick t) const |
| Tick | cyclesToTicks (Cycles c) const |
Protected Attributes | |
| Tsunami * | tsunami |
| pointer to the tsunami object. More... | |
| uint64_t | dim [Tsunami::Max_CPUs] |
| The dims are device interrupt mask registers. More... | |
| uint64_t | dir [Tsunami::Max_CPUs] |
| The dirs are device interrupt registers. More... | |
| uint64_t | drir |
| This register contains bits for each PCI interrupt that can occur. More... | |
| uint64_t | ipint |
| Indicator of which CPUs have an IPI interrupt. More... | |
| uint64_t | itint |
| Indicator of which CPUs have an RTC interrupt. More... | |
Protected Attributes inherited from BasicPioDevice | |
| Addr | pioAddr |
| Address that the device listens to. More... | |
| Addr | pioSize |
| Size that the device's address range. More... | |
| Tick | pioDelay |
| Delay that the device experinces on an access. More... | |
Protected Attributes inherited from PioDevice | |
| System * | sys |
| PioPort | pioPort |
| The pioPort that handles the requests for us and provides us requests that it sees. More... | |
Protected Attributes inherited from ClockedObject | |
| Enums::PwrState | _currPwrState |
| To keep track of the current power state. More... | |
| Tick | prvEvalTick |
| Stats::Scalar | numPwrStateTransitions |
| Stats::Distribution | pwrStateClkGateDist |
| Stats::Vector | pwrStateResidencyTicks |
Protected Attributes inherited from SimObject | |
| const SimObjectParams * | _params |
| Cached copy of the object parameters. More... | |
Protected Attributes inherited from EventManager | |
| EventQueue * | eventq |
| A pointer to this object's event queue. More... | |
Additional Inherited Members | |
Static Public Member Functions inherited from SimObject | |
| static void | serializeAll (CheckpointOut &cp) |
| Serialize all SimObjects in the system. More... | |
| static SimObject * | find (const char *name) |
| Find the SimObject with the given name and return a pointer to it. More... | |
Static Public Member Functions inherited from Serializable | |
| static const std::string & | currentSection () |
| Get the fully-qualified name of the active section. More... | |
| static void | serializeAll (const std::string &cpt_dir) |
| static void | unserializeGlobals (CheckpointIn &cp) |
Static Public Attributes inherited from Serializable | |
| static int | ckptCount = 0 |
| static int | ckptMaxCount = 0 |
| static int | ckptPrevCount = -1 |
Protected Member Functions inherited from Drainable | |
| Drainable () | |
| virtual | ~Drainable () |
| virtual void | drainResume () |
| Resume execution after a successful drain. More... | |
| void | signalDrainDone () const |
| Signal that an object is drained. More... | |
Protected Member Functions inherited from Clocked | |
| Clocked (ClockDomain &clk_domain) | |
| Create a clocked object and set the clock domain based on the parameters. More... | |
| Clocked (Clocked &)=delete | |
| Clocked & | operator= (Clocked &)=delete |
| virtual | ~Clocked () |
| Virtual destructor due to inheritance. More... | |
| void | resetClock () const |
| Reset the object's clock using the current global tick value. More... | |
Tsunami CChip CSR Emulation.
This device includes all the interrupt handling code for the chipset.
Definition at line 46 of file tsunami_cchip.hh.
| typedef TsunamiCChipParams TsunamiCChip::Params |
Definition at line 81 of file tsunami_cchip.hh.
| TsunamiCChip::TsunamiCChip | ( | const Params * | p | ) |
Initialize the Tsunami CChip by setting all of the device register to 0.
| p | params struct |
Definition at line 60 of file tsunami_cchip.cc.
References Tsunami::cchip, dim, dir, drir, ipint, itint, Tsunami::Max_CPUs, tsunami, and X86ISA::x.
| void TsunamiCChip::clearDRIR | ( | uint32_t | interrupt | ) |
clear an interrupt previously posted to the CPU.
| interrupt | the interrupt number to post (0-64) |
Definition at line 486 of file tsunami_cchip.cc.
References IntrControl::clear(), dim, dir, DPRINTF, drir, ArmISA::i, interrupt, AlphaISA::INTLEVEL_IRQ1, Platform::intrctrl, Tsunami::Max_CPUs, X86ISA::size(), PioDevice::sys, System::threadContexts, tsunami, and ULL.
Referenced by Tsunami::clearPciInt(), TsunamiIO::clearPIC(), and TsunamiIO::write().
| void TsunamiCChip::clearIPI | ( | uint64_t | ipintr | ) |
post an ipi interrupt to the CPU.
| ipintr | the cpu number to clear(bitvector) |
Definition at line 378 of file tsunami_cchip.cc.
References IntrControl::clear(), DPRINTF, AlphaISA::INTLEVEL_IRQ3, Platform::intrctrl, ipint, Tsunami::Max_CPUs, panic, PioDevice::sys, System::threadContexts, tsunami, ULL, and warn.
Referenced by write().
| void TsunamiCChip::clearITI | ( | uint64_t | itintr | ) |
clear a timer interrupt previously posted to the CPU.
| itintr | the cpu number to clear(bitvector) |
Definition at line 404 of file tsunami_cchip.cc.
References IntrControl::clear(), DPRINTF, ArmISA::i, AlphaISA::INTLEVEL_IRQ2, Platform::intrctrl, itint, Tsunami::Max_CPUs, panic, PioDevice::sys, System::threadContexts, tsunami, and ULL.
Referenced by write().
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inline |
Definition at line 90 of file tsunami_cchip.hh.
References SimObject::_params.
| void TsunamiCChip::postDRIR | ( | uint32_t | interrupt | ) |
post an interrupt to the CPU.
| interrupt | the interrupt number to post (0-64) |
Definition at line 468 of file tsunami_cchip.cc.
References dim, dir, DPRINTF, drir, ArmISA::i, interrupt, AlphaISA::INTLEVEL_IRQ1, Platform::intrctrl, Tsunami::Max_CPUs, IntrControl::post(), X86ISA::size(), PioDevice::sys, System::threadContexts, tsunami, and ULL.
Referenced by Tsunami::postPciInt(), TsunamiIO::postPIC(), and TsunamiIO::write().
| void TsunamiCChip::postRTC | ( | ) |
post an RTC interrupt to the CPU
Definition at line 451 of file tsunami_cchip.cc.
References DPRINTF, ArmISA::i, AlphaISA::INTLEVEL_IRQ2, Platform::intrctrl, itint, Tsunami::Max_CPUs, IntrControl::post(), X86ISA::size(), PioDevice::sys, System::threadContexts, tsunami, and ULL.
Referenced by TsunamiIO::RTC::handleEvent().
Pure virtual function that the device must implement.
Called when a read command is recieved by the port.
| pkt | Packet describing this request |
Implements PioDevice.
Definition at line 78 of file tsunami_cchip.cc.
References Request::contextId(), dim, dir, DPRINTF, drir, Packet::get(), Packet::getAddr(), Packet::getSize(), ipint, itint, Packet::makeAtomicResponse(), panic, BasicPioDevice::pioAddr, BasicPioDevice::pioDelay, BasicPioDevice::pioSize, Packet::req, Packet::set(), TSDEV_CC_AAR0, TSDEV_CC_AAR1, TSDEV_CC_AAR2, TSDEV_CC_AAR3, TSDEV_CC_BDIMS, TSDEV_CC_BDIRS, TSDEV_CC_CSR, TSDEV_CC_DIM0, TSDEV_CC_DIM1, TSDEV_CC_DIM2, TSDEV_CC_DIM3, TSDEV_CC_DIR0, TSDEV_CC_DIR1, TSDEV_CC_DIR2, TSDEV_CC_DIR3, TSDEV_CC_DRIR, TSDEV_CC_IIC0, TSDEV_CC_IIC1, TSDEV_CC_IIC2, TSDEV_CC_IIC3, TSDEV_CC_IPIR, TSDEV_CC_ITIR, TSDEV_CC_MISC, TSDEV_CC_MPR0, TSDEV_CC_MPR1, TSDEV_CC_MPR2, TSDEV_CC_MPR3, TSDEV_CC_MTR, and TSDEV_CC_PRBEN.
| void TsunamiCChip::reqIPI | ( | uint64_t | ipreq | ) |
request an interrupt be posted to the CPU.
| ipreq | the cpu number to interrupt(bitvector) |
Definition at line 424 of file tsunami_cchip.cc.
References DPRINTF, AlphaISA::INTLEVEL_IRQ3, Platform::intrctrl, ipint, Tsunami::Max_CPUs, panic, IntrControl::post(), PioDevice::sys, System::threadContexts, tsunami, ULL, and warn.
Referenced by write().
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overridevirtual |
Serialize an object.
Output an object's state into the current checkpoint section.
| cp | Checkpoint state |
Implements Serializable.
Definition at line 511 of file tsunami_cchip.cc.
References dim, dir, drir, ipint, itint, Tsunami::Max_CPUs, SERIALIZE_ARRAY, and SERIALIZE_SCALAR.
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overridevirtual |
Unserialize an object.
Read an object's state from the current checkpoint section.
| cp | Checkpoint state |
Implements Serializable.
Definition at line 521 of file tsunami_cchip.cc.
References dim, dir, drir, ipint, itint, Tsunami::Max_CPUs, UNSERIALIZE_ARRAY, and UNSERIALIZE_SCALAR.
Pure virtual function that the device must implement.
Called when a write command is recieved by the port.
| pkt | Packet describing this request |
Implements PioDevice.
Definition at line 194 of file tsunami_cchip.cc.
References IntrControl::clear(), clearIPI(), clearITI(), dim, dir, DPRINTF, drir, Packet::get(), Packet::getAddr(), Packet::getSize(), AlphaISA::INTLEVEL_IRQ1, Platform::intrctrl, Packet::makeAtomicResponse(), Tsunami::Max_CPUs, panic, BasicPioDevice::pioAddr, BasicPioDevice::pioDelay, BasicPioDevice::pioSize, IntrControl::post(), reqIPI(), TSDEV_CC_AAR0, TSDEV_CC_AAR1, TSDEV_CC_AAR2, TSDEV_CC_AAR3, TSDEV_CC_BDIMS, TSDEV_CC_CSR, TSDEV_CC_DIM0, TSDEV_CC_DIM1, TSDEV_CC_DIM2, TSDEV_CC_DIM3, TSDEV_CC_DIR0, TSDEV_CC_DIR1, TSDEV_CC_DIR2, TSDEV_CC_DIR3, TSDEV_CC_DRIR, TSDEV_CC_IIC0, TSDEV_CC_IIC1, TSDEV_CC_IIC2, TSDEV_CC_IIC3, TSDEV_CC_IPIQ, TSDEV_CC_IPIR, TSDEV_CC_ITIR, TSDEV_CC_MISC, TSDEV_CC_MPR0, TSDEV_CC_MPR1, TSDEV_CC_MPR2, TSDEV_CC_MPR3, TSDEV_CC_MTR, TSDEV_CC_PRBEN, tsunami, ULL, and X86ISA::x.
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protected |
The dims are device interrupt mask registers.
One exists for each CPU, the DRIR X DIM = DIR
Definition at line 60 of file tsunami_cchip.hh.
Referenced by clearDRIR(), postDRIR(), read(), serialize(), TsunamiCChip(), unserialize(), and write().
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protected |
The dirs are device interrupt registers.
One exists for each CPU, the DRIR X DIM = DIR
Definition at line 66 of file tsunami_cchip.hh.
Referenced by clearDRIR(), postDRIR(), read(), serialize(), TsunamiCChip(), unserialize(), and write().
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protected |
This register contains bits for each PCI interrupt that can occur.
Definition at line 72 of file tsunami_cchip.hh.
Referenced by clearDRIR(), postDRIR(), read(), serialize(), TsunamiCChip(), unserialize(), and write().
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protected |
Indicator of which CPUs have an IPI interrupt.
Definition at line 75 of file tsunami_cchip.hh.
Referenced by clearIPI(), read(), reqIPI(), serialize(), TsunamiCChip(), and unserialize().
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protected |
Indicator of which CPUs have an RTC interrupt.
Definition at line 78 of file tsunami_cchip.hh.
Referenced by clearITI(), postRTC(), read(), serialize(), TsunamiCChip(), and unserialize().
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protected |
pointer to the tsunami object.
This is our access to all the other tsunami devices.
Definition at line 54 of file tsunami_cchip.hh.
Referenced by clearDRIR(), clearIPI(), clearITI(), postDRIR(), postRTC(), reqIPI(), TsunamiCChip(), and write().