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tsunami_cchip.hh
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30 
35 #ifndef __TSUNAMI_CCHIP_HH__
36 #define __TSUNAMI_CCHIP_HH__
37 
38 #include "dev/alpha/tsunami.hh"
39 #include "dev/io_device.hh"
40 #include "params/TsunamiCChip.hh"
41 
47 {
48  protected:
55 
61 
67 
72  uint64_t drir;
73 
75  uint64_t ipint;
76 
78  uint64_t itint;
79 
80  public:
81  typedef TsunamiCChipParams Params;
87  TsunamiCChip(const Params *p);
88 
89  const Params *
90  params() const
91  {
92  return dynamic_cast<const Params *>(_params);
93  }
94 
95  Tick read(PacketPtr pkt) override;
96 
97  Tick write(PacketPtr pkt) override;
98 
102  void postRTC();
103 
108  void postDRIR(uint32_t interrupt);
109 
114  void clearDRIR(uint32_t interrupt);
115 
120  void clearIPI(uint64_t ipintr);
121 
126  void clearITI(uint64_t itintr);
127 
132  void reqIPI(uint64_t ipreq);
133 
134  void serialize(CheckpointOut &cp) const override;
135  void unserialize(CheckpointIn &cp) override;
136 };
137 
138 #endif // __TSUNAMI_CCHIP_HH__
Tsunami * tsunami
pointer to the tsunami object.
void postDRIR(uint32_t interrupt)
post an interrupt to the CPU.
void postRTC()
post an RTC interrupt to the CPU
void reqIPI(uint64_t ipreq)
request an interrupt be posted to the CPU.
uint64_t drir
This register contains bits for each PCI interrupt that can occur.
TsunamiCChip(const Params *p)
Initialize the Tsunami CChip by setting all of the device register to 0.
Top level class for Tsunami Chipset emulation.
Definition: tsunami.hh:56
uint64_t ipint
Indicator of which CPUs have an IPI interrupt.
static const int Max_CPUs
Max number of CPUs in a Tsunami.
Definition: tsunami.hh:60
uint64_t dim[Tsunami::Max_CPUs]
The dims are device interrupt mask registers.
TsunamiCChipParams Params
void clearIPI(uint64_t ipintr)
post an ipi interrupt to the CPU.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
uint64_t Tick
Tick count type.
Definition: types.hh:63
void serialize(CheckpointOut &cp) const override
Serialize an object.
Declaration of top level class for the Tsunami chipset.
const Params * params() const
void clearITI(uint64_t itintr)
clear a timer interrupt previously posted to the CPU.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:245
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
cbk_int func interrupt
Definition: gpu_nomali.cc:94
Tsunami CChip CSR Emulation.
std::ostream CheckpointOut
Definition: serialize.hh:67
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:107
uint64_t dir[Tsunami::Max_CPUs]
The dirs are device interrupt registers.
void clearDRIR(uint32_t interrupt)
clear an interrupt previously posted to the CPU.
uint64_t itint
Indicator of which CPUs have an RTC interrupt.
Bitfield< 0 > p

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