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hdlcd.cc
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1 /*
2  * Copyright (c) 2010-2013, 2015, 2017 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
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8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
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15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
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22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Authors: Chris Emmons
38  * Andreas Sandberg
39  */
40 
41 #include "dev/arm/hdlcd.hh"
42 
43 #include "base/output.hh"
44 #include "base/trace.hh"
45 #include "base/vnc/vncinput.hh"
46 #include "debug/Checkpoint.hh"
47 #include "debug/HDLcd.hh"
48 #include "dev/arm/amba_device.hh"
49 #include "dev/arm/base_gic.hh"
50 #include "mem/packet.hh"
51 #include "mem/packet_access.hh"
52 #include "params/HDLcd.hh"
53 #include "sim/system.hh"
54 
55 using std::vector;
56 
57 
58 // initialize hdlcd registers
59 HDLcd::HDLcd(const HDLcdParams *p)
60  : AmbaDmaDevice(p, 0xFFFF),
61  // Parameters
62  vnc(p->vnc),
63  workaroundSwapRB(p->workaround_swap_rb),
64  workaroundDmaLineCount(p->workaround_dma_line_count),
65  addrRanges{RangeSize(pioAddr, pioSize)},
66  enableCapture(p->enable_capture),
67  pixelBufferSize(p->pixel_buffer_size),
68  virtRefreshRate(p->virt_refresh_rate),
69 
70  // Registers
71  version(VERSION_RESETV),
72  int_rawstat(0), int_mask(0),
73 
74  fb_base(0), fb_line_length(0), fb_line_count(0), fb_line_pitch(0),
75  bus_options(BUS_OPTIONS_RESETV),
76 
77  v_sync(0), v_back_porch(0), v_data(0), v_front_porch(0),
78  h_sync(0), h_back_porch(0), h_data(0), h_front_porch(0),
79  polarities(0),
80 
81  command(0),
82 
83  pixel_format(0),
84  red_select(0), green_select(0), blue_select(0),
85 
86  virtRefreshEvent(this),
87  // Other
88  bmp(&pixelPump.fb), pic(NULL), conv(PixelConverter::rgba8888_le),
89  pixelPump(*this, *p->pxl_clk, p->pixel_chunk)
90 {
91  if (vnc)
92  vnc->setFrameBuffer(&pixelPump.fb);
93 }
94 
96 {
97 }
98 
99 void
101 {
103 
104  using namespace Stats;
105 
106  stats.underruns
107  .name(name() + ".underruns")
108  .desc("number of buffer underruns")
109  .flags(nozero)
110  ;
111 }
112 
113 void
115 {
116  DPRINTF(Checkpoint, "Serializing ARM HDLCD\n");
117 
120 
126 
131 
136 
138 
144 
146  if (enabled())
147  dmaEngine->serializeSection(cp, "dmaEngine");
148 }
149 
150 void
152 {
153  DPRINTF(Checkpoint, "Unserializing ARM HDLCD\n");
154 
157 
163 
168 
173 
175 
181 
182  {
183  // Try to unserialize the pixel pump. It might not exist if
184  // we're unserializing an old checkpoint.
185  ScopedCheckpointSection sec(cp, "pixelPump");
188  }
189 
190  if (enabled()) {
191  // Create the DMA engine and read its state from the
192  // checkpoint. We don't need to worry about the pixel pump as
193  // it is a proper SimObject.
194  createDmaEngine();
195  dmaEngine->unserializeSection(cp, "dmaEngine");
196 
197  conv = pixelConverter();
198  }
199 }
200 
201 void
203 {
205 
206  if (enabled()) {
207  if (sys->bypassCaches()) {
208  // We restart the HDLCD if we are in KVM mode. This
209  // ensures that we always use the fast refresh logic if we
210  // resume in KVM mode.
211  cmdDisable();
212  cmdEnable();
213  } else if (!pixelPump.active()) {
214  // We restored from an old checkpoint without a pixel
215  // pump, start an new refresh. This typically happens when
216  // restoring from old checkpoints.
217  cmdEnable();
218  }
219  }
220 
221  // We restored from a checkpoint and need to update the VNC server
222  if (pixelPump.active() && vnc)
223  vnc->setDirty();
224 }
225 
226 void
228 {
231 }
232 
233 // read registers and frame buffer
234 Tick
236 {
237  assert(pkt->getAddr() >= pioAddr &&
238  pkt->getAddr() < pioAddr + pioSize);
239 
240  const Addr daddr(pkt->getAddr() - pioAddr);
241  panic_if(pkt->getSize() != 4,
242  "Unhandled read size (address: 0x.4x, size: %u)",
243  daddr, pkt->getSize());
244 
245  const uint32_t data(readReg(daddr));
246  DPRINTF(HDLcd, "read register 0x%04x: 0x%x\n", daddr, data);
247 
248  pkt->set<uint32_t>(data);
249  pkt->makeAtomicResponse();
250  return pioDelay;
251 }
252 
253 // write registers and frame buffer
254 Tick
256 {
257  assert(pkt->getAddr() >= pioAddr &&
258  pkt->getAddr() < pioAddr + pioSize);
259 
260  const Addr daddr(pkt->getAddr() - pioAddr);
261  panic_if(pkt->getSize() != 4,
262  "Unhandled read size (address: 0x.4x, size: %u)",
263  daddr, pkt->getSize());
264  const uint32_t data(pkt->get<uint32_t>());
265  DPRINTF(HDLcd, "write register 0x%04x: 0x%x\n", daddr, data);
266 
267  writeReg(daddr, data);
268 
269  pkt->makeAtomicResponse();
270  return pioDelay;
271 }
272 
273 uint32_t
275 {
276  switch (offset) {
277  case Version: return version;
278 
279  case Int_RawStat: return int_rawstat;
280  case Int_Clear:
281  panic("HDLCD INT_CLEAR register is Write-Only\n");
282  case Int_Mask: return int_mask;
283  case Int_Status: return intStatus();
284 
285  case Fb_Base: return fb_base;
286  case Fb_Line_Length: return fb_line_length;
287  case Fb_Line_Count: return fb_line_count;
288  case Fb_Line_Pitch: return fb_line_pitch;
289  case Bus_Options: return bus_options;
290 
291  case V_Sync: return v_sync;
292  case V_Back_Porch: return v_back_porch;
293  case V_Data: return v_data;
294  case V_Front_Porch: return v_front_porch;
295  case H_Sync: return h_sync;
296  case H_Back_Porch: return h_back_porch;
297  case H_Data: return h_data;
298  case H_Front_Porch: return h_front_porch;
299  case Polarities: return polarities;
300 
301  case Command: return command;
302  case Pixel_Format: return pixel_format;
303  case Red_Select: return red_select;
304  case Green_Select: return green_select;
305  case Blue_Select: return blue_select;
306 
307  default:
308  panic("Tried to read HDLCD register that doesn't exist\n", offset);
309  }
310 }
311 
312 void
313 HDLcd::writeReg(Addr offset, uint32_t value)
314 {
315  switch (offset) {
316  case Version:
317  panic("HDLCD VERSION register is read-Only\n");
318 
319  case Int_RawStat:
320  intRaise(value);
321  return;
322  case Int_Clear:
323  intClear(value);
324  return;
325  case Int_Mask:
326  intMask(value);
327  return;
328  case Int_Status:
329  panic("HDLCD INT_STATUS register is read-Only\n");
330  break;
331 
332  case Fb_Base:
333  fb_base = value;
334  return;
335 
336  case Fb_Line_Length:
337  fb_line_length = value;
338  return;
339 
340  case Fb_Line_Count:
341  fb_line_count = value;
342  return;
343 
344  case Fb_Line_Pitch:
345  fb_line_pitch = value;
346  return;
347 
348  case Bus_Options: {
349  const BusOptsReg old_bus_options(bus_options);
350  bus_options = value;
351 
352  if (bus_options.max_outstanding != old_bus_options.max_outstanding) {
353  DPRINTF(HDLcd,
354  "Changing HDLcd outstanding DMA transactions: %d -> %d\n",
355  old_bus_options.max_outstanding,
356  bus_options.max_outstanding);
357 
358  }
359 
360  if (bus_options.burst_len != old_bus_options.burst_len) {
361  DPRINTF(HDLcd,
362  "Changing HDLcd DMA burst flags: 0x%x -> 0x%x\n",
363  old_bus_options.burst_len, bus_options.burst_len);
364  }
365  } return;
366 
367  case V_Sync:
368  v_sync = value;
369  return;
370  case V_Back_Porch:
371  v_back_porch = value;
372  return;
373  case V_Data:
374  v_data = value;
375  return;
376  case V_Front_Porch:
377  v_front_porch = value;
378  return;
379 
380  case H_Sync:
381  h_sync = value;
382  return;
383  case H_Back_Porch:
384  h_back_porch = value;
385  return;
386  case H_Data:
387  h_data = value;
388  return;
389  case H_Front_Porch:
390  h_front_porch = value;
391  return;
392 
393  case Polarities:
394  polarities = value;
395  return;
396 
397  case Command: {
398  const CommandReg new_command(value);
399 
400  if (new_command.enable != command.enable) {
401  DPRINTF(HDLcd, "HDLCD switched %s\n",
402  new_command.enable ? "on" : "off");
403 
404  if (new_command.enable) {
405  cmdEnable();
406  } else {
407  cmdDisable();
408  }
409  }
410  command = new_command;
411  } return;
412 
413  case Pixel_Format:
414  pixel_format = value;
415  return;
416 
417  case Red_Select:
418  red_select = value;
419  return;
420  case Green_Select:
421  green_select = value;
422  return;
423  case Blue_Select:
424  blue_select = value;
425  return;
426 
427  default:
428  panic("Tried to write HDLCD register that doesn't exist\n", offset);
429  return;
430  }
431 }
432 
435 {
436  ByteOrder byte_order(
438 
439  /* Some Linux kernels have a broken driver that swaps the red and
440  * blue color select registers. */
441  if (!workaroundSwapRB) {
442  return PixelConverter(
443  pixel_format.bytes_per_pixel + 1,
444  red_select.offset, green_select.offset, blue_select.offset,
445  red_select.size, green_select.size, blue_select.size,
446  byte_order);
447  } else {
448  return PixelConverter(
449  pixel_format.bytes_per_pixel + 1,
450  blue_select.offset, green_select.offset, red_select.offset,
451  blue_select.size, green_select.size, red_select.size,
452  byte_order);
453  }
454 }
455 
458 {
459  return DisplayTimings(
460  h_data.val + 1, v_data.val + 1,
461  h_back_porch.val + 1, h_sync.val + 1, h_front_porch.val + 1,
462  v_back_porch.val + 1, v_sync.val + 1, v_front_porch.val + 1);
463 }
464 
465 void
467 {
468  if (bus_options.max_outstanding == 0) {
469  warn("Maximum number of outstanding DMA transfers set to 0.");
470  return;
471  }
472 
473  const uint32_t dma_burst_flags(bus_options.burst_len);
474  const uint32_t dma_burst_len(
475  dma_burst_flags ?
476  (1UL << (findMsbSet(dma_burst_flags) - 1)) :
477  MAX_BURST_LEN);
478  // Some drivers seem to set the DMA line count incorrectly. This
479  // could either be a driver bug or a specification bug. Unlike for
480  // timings, the specification does not require 1 to be added to
481  // the DMA engine's line count.
482  const uint32_t dma_lines(
484 
485  dmaEngine.reset(new DmaEngine(
486  *this, pixelBufferSize,
487  AXI_PORT_WIDTH * dma_burst_len,
488  bus_options.max_outstanding,
489  fb_line_length, fb_line_pitch, dma_lines));
490 }
491 
492 void
494 {
495  createDmaEngine();
496  conv = pixelConverter();
497 
498  // Update timing parameter before rendering frames
500 
501  if (sys->bypassCaches()) {
503  } else {
504  pixelPump.start();
505  }
506 }
507 
508 void
510 {
511  pixelPump.stop();
512  // Disable the virtual refresh event
513  if (virtRefreshEvent.scheduled()) {
514  assert(sys->bypassCaches());
516  }
517  dmaEngine->abortFrame();
518 }
519 
520 bool
522 {
523  uint8_t pixel_data[MAX_PIXEL_SIZE];
524  assert(conv.length <= sizeof(pixel_data));
525  if (dmaEngine->tryGet(pixel_data, conv.length)) {
526  p = conv.toPixel(pixel_data);
527  return true;
528  } else {
529  return false;
530  }
531 }
532 
533 void
535 {
536  DPRINTF(HDLcd, "Raising VSYNC interrupt.\n");
538 }
539 
540 void
542 {
543  DPRINTF(HDLcd, "End of VSYNC, starting DMA engine\n");
544  dmaEngine->startFrame(fb_base);
545 }
546 
547 void
549 {
550  DPRINTF(HDLcd, "Buffer underrun, stopping DMA fill.\n");
551  ++stats.underruns;
553  dmaEngine->abortFrame();
554 }
555 
556 void
558 {
559  DPRINTF(HDLcd, "Reached end of last visible line.\n");
560 
561  if (dmaEngine->size()) {
562  warn("HDLCD %u bytes still in FIFO after frame: Ensure that DMA "
563  "and PixelPump configuration is consistent\n",
564  dmaEngine->size());
565  dmaEngine->dumpSettings();
567  }
568 
569  if (vnc)
570  vnc->setDirty();
571 
572  if (enableCapture) {
573  if (!pic) {
574  pic = simout.create(
575  csprintf("%s.framebuffer.bmp", sys->name()),
576  true);
577  }
578 
579  assert(pic);
580  pic->stream()->seekp(0);
581  bmp.write(*pic->stream());
582  }
583 }
584 
585 void
586 HDLcd::setInterrupts(uint32_t ints, uint32_t mask)
587 {
588  const bool old_ints(intStatus());
589 
590  int_mask = mask;
591  int_rawstat = ints;
592 
593  if (!old_ints && intStatus()) {
594  gic->sendInt(intNum);
595  } else if (old_ints && !intStatus()) {
596  gic->clearInt(intNum);
597  }
598 }
599 
601  unsigned request_size, unsigned max_pending,
602  size_t line_size, ssize_t line_pitch, unsigned num_lines)
603  : DmaReadFifo(
604  _parent.dmaPort, size, request_size, max_pending,
605  Request::UNCACHEABLE),
606  parent(_parent),
607  lineSize(line_size), linePitch(line_pitch), numLines(num_lines),
608  nextLineAddr(0)
609 {
610 }
611 
612 void
614 {
616 
617  SERIALIZE_SCALAR(nextLineAddr);
618  SERIALIZE_SCALAR(frameEnd);
619 }
620 
621 void
623 {
625 
626  UNSERIALIZE_SCALAR(nextLineAddr);
627  UNSERIALIZE_SCALAR(frameEnd);
628 }
629 
630 void
632 {
633  nextLineAddr = fb_base;
634  frameEnd = fb_base + numLines * linePitch;
635 
636  startFill(nextLineAddr, lineSize);
637 }
638 
639 void
641 {
642  nextLineAddr = frameEnd;
643  stopFill();
644  flush();
645 }
646 
647 
648 void
650 {
651  inform("DMA line size: %u bytes", lineSize);
652  inform("DMA line pitch: %i bytes", linePitch);
653  inform("DMA num lines: %u", numLines);
654 }
655 
656 void
658 {
659  if (nextLineAddr == frameEnd)
660  // We're done with this frame. Ignore calls to this method
661  // until the next frame has been started.
662  return;
663 
664  nextLineAddr += linePitch;
665  if (nextLineAddr != frameEnd)
666  startFill(nextLineAddr, lineSize);
667 }
668 
669 void
671 {
672  parent.intRaise(INT_DMA_END);
673 }
674 
675 void
677 {
678  const DisplayTimings &t(timings());
679 
680  inform("PixelPump width: %u", t.width);
681  inform("PixelPump height: %u", t.height);
682 
683  inform("PixelPump horizontal back porch: %u", t.hBackPorch);
684  inform("PixelPump horizontal fron porch: %u", t.hFrontPorch);
685  inform("PixelPump horizontal fron porch: %u", t.hSync);
686 
687  inform("PixelPump vertical back porch: %u", t.vBackPorch);
688  inform("PixelPump vertical fron porch: %u", t.vFrontPorch);
689  inform("PixelPump vertical fron porch: %u", t.vSync);
690 }
691 
692 
693 HDLcd *
694 HDLcdParams::create()
695 {
696  return new HDLcd(this);
697 }
TimingReg v_back_porch
Vertical back porch width register.
Definition: hdlcd.hh:243
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: hdlcd.cc:622
#define DPRINTF(x,...)
Definition: trace.hh:212
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: hdlcd.cc:114
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:398
Pixel toPixel(uint32_t word) const
Get the Pixel representation of a color word.
Definition: framebuffer.hh:137
unsigned vSync
Vertical sync signal in lines.
Definition: pixelpump.hh:121
OutputDirectory simout
Definition: output.cc:65
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:64
void set(T v, ByteOrder endian)
Set the value in the data pointer to v using the specified endianness.
static constexpr size_t MAX_PIXEL_SIZE
Maximum number of bytes per pixel.
Definition: hdlcd.hh:163
burst_len
Definition: hdlcd.hh:187
struct HDLcd::@45 stats
bool pxlNext(Pixel &p)
Definition: hdlcd.cc:521
virtual void clearInt(uint32_t num)=0
Clear an interrupt from a device that is connected to the GIC.
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: dma_device.cc:307
uint32_t fb_base
Frame buffer base address register.
Definition: hdlcd.hh:237
Buffered DMA engine helper class.
Definition: dma_device.hh:315
Definition: hdlcd.hh:93
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition: output.cc:206
#define panic(...)
Definition: misc.hh:153
void cmdEnable()
Definition: hdlcd.cc:493
TimingReg h_front_porch
Horizontal front porch width reg.
Definition: hdlcd.hh:249
const bool workaroundDmaLineCount
Definition: hdlcd.hh:115
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: hdlcd.cc:613
unsigned length
Bytes per pixel when stored in memory (including padding)
Definition: framebuffer.hh:183
Bitfield< 11, 8 > max_outstanding
Definition: hdlcd.hh:189
virtual void setDirty()
The frame buffer uses this call to notify the vnc server that the frame buffer has been updated and a...
Definition: vncinput.cc:91
void intMask(uint32_t mask)
Convenience function to update the interrupt mask.
Definition: hdlcd.hh:298
bool bypassCaches() const
Should caches be bypassed?
Definition: system.hh:165
void pxlVSyncBegin()
Definition: hdlcd.cc:534
PixelPump pixelPump
Definition: hdlcd.hh:361
void dumpSettings()
Definition: hdlcd.cc:649
DmaEngine(HDLcd &_parent, size_t size, unsigned request_size, unsigned max_pending, size_t line_size, ssize_t line_pitch, unsigned num_lines)
Definition: hdlcd.cc:600
panic_if(!root,"Invalid expression\n")
bool scheduled() const
Determine if the current event is scheduled.
Definition: eventq.hh:381
void stop()
Immediately stop pushing pixels.
Definition: pixelpump.cc:163
PixelFormatReg pixel_format
Pixel format register.
Definition: hdlcd.hh:252
unsigned hBackPorch
Horizontal back porch in pixels.
Definition: pixelpump.hh:110
ColorSelectReg green_select
Green color select register.
Definition: hdlcd.hh:254
ColorSelectReg blue_select
Blue color select register.
Definition: hdlcd.hh:255
CommandReg command
Command register.
Definition: hdlcd.hh:251
BusOptsReg bus_options
Bus options register.
Definition: hdlcd.hh:241
void abortFrame()
Definition: hdlcd.cc:640
unsigned vFrontPorch
Vertical front porch in lines.
Definition: pixelpump.hh:119
void start()
Starting pushing pixels in timing mode.
Definition: pixelpump.cc:156
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pixelpump.cc:123
const Tick virtRefreshRate
Definition: hdlcd.hh:119
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: hdlcd.cc:151
Implementiation of the ARM HDLcd controller.
HDLcd(const HDLcdParams *p)
Definition: hdlcd.cc:59
TimingReg v_front_porch
Vertical front porch width register.
Definition: hdlcd.hh:245
void deschedule(Event &event)
Definition: eventq.hh:734
T get(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness.
static constexpr size_t MAX_BURST_LEN
max number of beats delivered in one dma burst
Definition: hdlcd.hh:160
const char data[]
Definition: circlebuf.cc:43
bool enabled() const
Definition: hdlcd.hh:269
void startFrame(Addr fb_base)
Definition: hdlcd.cc:631
#define warn(...)
Definition: misc.hh:219
const Addr pixelBufferSize
Definition: hdlcd.hh:118
std::unique_ptr< DmaEngine > dmaEngine
Definition: hdlcd.hh:391
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:145
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
OutputStream * pic
Picture of what the current frame buffer looks like.
Definition: hdlcd.hh:356
TimingReg h_back_porch
Horizontal back porch width register.
Definition: hdlcd.hh:247
Tick curTick()
The current simulated tick.
Definition: core.hh:47
Bitfield< 11, 8 > size
Definition: hdlcd.hh:222
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:161
uint32_t int_mask
Interrupt mask register.
Definition: hdlcd.hh:236
offset
Definition: hdlcd.hh:220
bool active() const
Is the pixel pump active and refreshing the display?
Definition: pixelpump.hh:175
PixelConverter pixelConverter() const
Definition: hdlcd.cc:434
uint32_t fb_line_length
Frame buffer Line length register.
Definition: hdlcd.hh:238
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
virtual void sendInt(uint32_t num)=0
Post an interrupt from a device that is connected to the GIC.
void makeAtomicResponse()
Definition: packet.hh:857
void renderFrame()
Render an entire frame in KVM execution mode.
Definition: pixelpump.cc:252
uint64_t Tick
Tick count type.
Definition: types.hh:63
#define SERIALIZE_OBJ(obj)
Definition: serialize.hh:178
TimingReg h_sync
Horizontal sync width register.
Definition: hdlcd.hh:246
void intClear(uint32_t ints)
Convenience function to clear interrupts.
Definition: hdlcd.hh:316
ByteOrder
Definition: types.hh:204
static const PixelConverter rgba8888_le
Predefined 32-bit RGB (red in least significant bits, 8 bits/channel, little endian) conversion helpe...
Definition: framebuffer.hh:202
void cmdDisable()
Definition: hdlcd.cc:509
PolaritiesReg polarities
Polarities register.
Definition: hdlcd.hh:250
PixelConverter conv
Cached pixel converter, set when the converter is enabled.
Definition: hdlcd.hh:359
void updateTimings(const DisplayTimings &timings)
Update frame size using display timing.
Definition: pixelpump.cc:140
EventWrapper< HDLcd,&HDLcd::virtRefresh > virtRefreshEvent
Definition: hdlcd.hh:350
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: hdlcd.cc:235
void dumpSettings()
Definition: hdlcd.cc:676
void setInterrupts(uint32_t ints, uint32_t mask)
Assign new interrupt values and update interrupt signals.
Definition: hdlcd.cc:586
TimingReg h_data
Horizontal data width register.
Definition: hdlcd.hh:248
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
BaseGic * gic
Definition: amba_device.hh:108
System * sys
Definition: io_device.hh:87
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:245
void onIdle() override
Last response received callback.
Definition: hdlcd.cc:670
unsigned height
Display height in pixels.
Definition: pixelpump.hh:107
Bitfield< 15, 8 > vector
Definition: intmessage.hh:45
VncInput * vnc
Definition: hdlcd.hh:113
void pxlUnderrun()
Definition: hdlcd.cc:548
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:143
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: dma_device.cc:317
ColorSelectReg red_select
Red color select register.
Definition: hdlcd.hh:253
unsigned hFrontPorch
Horizontal front porch in pixels.
Definition: pixelpump.hh:112
static constexpr size_t AXI_PORT_WIDTH
AXI port width in bytes.
Definition: hdlcd.hh:157
void write(std::ostream &bmp) const
Write the frame buffer data into the provided ostream.
Definition: bitmap.cc:93
uint32_t int_rawstat
Interrupt raw status register.
Definition: hdlcd.hh:235
unsigned hSync
Horizontal sync signal length in pixels.
Definition: pixelpump.hh:114
Declaration of a VNC input.
virtual const std::string name() const
Definition: sim_object.hh:117
Base class for ARM GIC implementations.
void virtRefresh()
Handler for fast frame refresh in KVM-mode.
Definition: hdlcd.cc:227
Declaration of the Packet class.
void pxlVSyncEnd()
Definition: hdlcd.cc:541
std::ostream CheckpointOut
Definition: serialize.hh:67
void writeReg(Addr offset, uint32_t value)
Definition: hdlcd.cc:313
int32_t fb_line_pitch
Frame buffer Line pitch register.
Definition: hdlcd.hh:240
virtual void drainResume()
Resume execution after a successful drain.
Definition: drain.hh:257
bool sectionExists(const std::string &section)
Definition: serialize.cc:724
void pxlFrameDone()
Definition: hdlcd.cc:557
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: hdlcd.cc:255
static const std::string & currentSection()
Get the fully-qualified name of the active section.
Definition: serialize.cc:652
uint32_t readReg(Addr offset)
Definition: hdlcd.cc:274
void createDmaEngine()
Definition: hdlcd.cc:466
int findMsbSet(uint64_t val)
Returns the bit position of the MSB that is set in the input.
Definition: bitfield.hh:163
Bitmap bmp
Helper to write out bitmaps.
Definition: hdlcd.hh:353
void schedule(Event &event, Tick when)
Definition: eventq.hh:728
static constexpr uint32_t INT_VSYNC
Definition: hdlcd.hh:178
unsigned vBackPorch
Vertical back porch in lines.
Definition: pixelpump.hh:117
const bool workaroundSwapRB
Definition: hdlcd.hh:114
~HDLcd()
Definition: hdlcd.cc:95
Bitfield< 3, 0 > mask
Definition: types.hh:64
DmaPort dmaPort
Definition: dma_device.hh:157
Configurable RGB pixel converter.
Definition: framebuffer.hh:91
Internal gem5 representation of a Pixel.
Definition: framebuffer.hh:58
fb_line_count
Definition: hdlcd.hh:182
Bitfield< 5 > t
Definition: miscregs.hh:1382
unsigned getSize() const
Definition: packet.hh:649
void drainResume() override
Resume execution after a successful drain.
Definition: hdlcd.cc:202
DisplayTimings displayTimings() const
Definition: hdlcd.cc:457
static constexpr uint32_t INT_UNDERRUN
Definition: hdlcd.hh:179
#define inform(...)
Definition: misc.hh:221
Scoped checkpoint section helper class.
Definition: serialize.hh:240
const FlagsType nozero
Don't print if this is zero.
Definition: info.hh:57
Bitfield< 0 > p
uint32_t intStatus() const
Masked interrupt status register.
Definition: hdlcd.hh:321
const bool enableCapture
Definition: hdlcd.hh:117
unsigned width
Display width in pixels.
Definition: pixelpump.hh:105
void regStats() override
Register statistics for this object.
void intRaise(uint32_t ints)
Convenience function to raise a new interrupt.
Definition: hdlcd.hh:306
TimingReg v_sync
Vertical sync width register.
Definition: hdlcd.hh:242
void regStats() override
Register statistics for this object.
Definition: hdlcd.cc:100
TimingReg v_data
Vertical data width register.
Definition: hdlcd.hh:244
void onEndOfBlock() override
End of block callback.
Definition: hdlcd.cc:657
Addr getAddr() const
Definition: packet.hh:639

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