gem5
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#include <inttypes.h>
Go to the source code of this file.
Macros | |
#define | __has_builtin(foo) 0 |
Functions | |
uint64_t | mask (int nbits) |
Generate a 64-bit mask of 'nbits' 1s, right justified. More... | |
template<class T > | |
T | bits (T val, int first, int last) |
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it. More... | |
template<class T > | |
T | bits (T val, int bit) |
Extract the bit from this position from 'val' and right justify it. More... | |
template<class T > | |
T | mbits (T val, int first, int last) |
Mask off the given bits in place like bits() but without shifting. More... | |
uint64_t | mask (int first, int last) |
template<int N> | |
uint64_t | sext (uint64_t val) |
Sign-extend an N-bit value to 64 bits. More... | |
template<class T , class B > | |
T | insertBits (T val, int first, int last, B bit_val) |
Return val with bits first to last set to bit_val. More... | |
template<class T , class B > | |
T | insertBits (T val, int bit, B bit_val) |
Overloaded for access to only one bit in value. More... | |
template<class T , class B > | |
void | replaceBits (T &val, int first, int last, B bit_val) |
A convenience function to replace bits first to last of val with bit_val in place. More... | |
template<class T , class B > | |
void | replaceBits (T &val, int bit, B bit_val) |
Overloaded function to allow to access only 1 bit. More... | |
int | findMsbSet (uint64_t val) |
Returns the bit position of the MSB that is set in the input. More... | |
int | findLsbSet (uint64_t val) |
Returns the bit position of the LSB that is set in the input. More... | |
template<class T > | |
bool | isPow2 (T v) |
Checks if a number is a power of two, or zero. More... | |
int | popCount (uint64_t val) |
Returns the number of set ones in the provided value. More... | |
uint64_t | alignToPowerOfTwo (uint64_t val) |
Align to the next highest power of two. More... | |
#define __has_builtin | ( | foo | ) | 0 |
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Align to the next highest power of two.
The number passed in is aligned to the next highest power of two, if it is not already a power of two. Please note that if 0 is passed in, 0 is returned.
This code has been modified from the following: http://graphics.stanford.edu/~seander/bithacks.html#RoundUpPowerOf2
Definition at line 237 of file bitfield.hh.
References X86ISA::val.
Referenced by PciVirtIO::PciVirtIO().
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Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
MSB is numbered 63, LSB is 0.
Definition at line 67 of file bitfield.hh.
References mask().
Referenced by SparcISA::PageTableEntry::_size(), ArmISA::TableWalker::LongDescriptor::af(), ArmISA::TableWalker::L1Descriptor::ap(), ArmISA::TableWalker::L2Descriptor::ap(), ArmISA::TableWalker::LongDescriptor::ap(), ArmISA::TableWalker::LongDescriptor::apTable(), ArmISA::ArmStaticInst::ArmStaticInst(), ArmISA::TableWalker::LongDescriptor::attrIndx(), bits(), ArmISA::bitsToFp(), CopyEngine::CopyEngineChannel::channelRead(), ArmISA::TableWalker::checkAddrSizeFaultAArch64(), X86ISA::Interrupts::checkInterrupts(), X86ISA::Interrupts::checkInterruptsRaw(), AddrRange::contains(), ArmISA::TableWalker::LongDescriptor::contiguousHint(), SparcISA::PageTableEntry::cp(), ArmISA::ArmStaticInst::cpsrWriteByInstr(), CustomNoMaliGpu::CustomNoMaliGpu(), SparcISA::PageTableEntry::cv(), GenericPciHost::decodeAddress(), ArmISA::decodeMrsMsrBankedReg(), ImmOperand< T >::disassemble(), X86ISA::doCpuid(), ArmISA::TableWalker::doL1Descriptor(), ArmISA::TableWalker::doL2Descriptor(), ArmISA::TableWalker::L1Descriptor::domain(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), X86ISA::Decoder::doVex2Of3State(), X86ISA::Decoder::doVex3Of3State(), MipsISA::dspDpaq(), MipsISA::dspDpsq(), MipsISA::dspExtp(), MipsISA::dspExtpd(), MipsISA::dspExtr(), MipsISA::dspPick(), MipsISA::dspShll(), MipsISA::dspShra(), MipsISA::dspShrl(), ArmISA::EndBitUnion(), iGbReg::TxdOp::eop(), ArmISA::ArmStaticInst::extendReg64(), findLsbSet(), findMsbSet(), findNegative(), ArmISA::fixFpDFpSDest(), ArmISA::fixFpSFpDDest(), ArmISA::fpRecipEstimate(), ArmISA::fprSqrtEstimate(), ArmISA::fpToBits(), MipsISA::genCCVector(), MultiGrainBloomFilter::get_page_index(), BitfieldBackend::BitfieldBase< Type >::getBits(), iGbReg::TxdOp::getCso(), iGbReg::TxdOp::getCss(), ArmISA::AbortFault< T >::getFsr(), iGbReg::TxdOp::getLen(), X86ISA::Interrupts::getRegArrayBit(), ArmISA::getRestoredITBits(), Sparc32Process::getSyscallArg(), iGbReg::TxdOp::getTsoLen(), iGbReg::TxdOp::getType(), X86ISA::I8259::getVector(), ArmISA::TableWalker::L1Descriptor::global(), ArmISA::TableWalker::L2Descriptor::global(), ArmISA::TableWalker::LongDescriptor::global(), iGbReg::TxdOp::hdrlen(), iGbReg::TxdOp::ic(), iGbReg::TxdOp::ide(), SparcISA::PageTableEntry::ie(), iGbReg::TxdOp::ifcs(), ImmOperand< T >::init(), X86ISA::X86_64Process::initState(), PowerISA::PowerStaticInst::insertCRField(), ArmISA::TableWalker::L2Descriptor::invalid(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), ArmISA::AbortFault< T >::invoke(), iGbReg::TxdOp::ip(), iGbReg::TxdOp::ipcse(), iGbReg::TxdOp::ipcso(), iGbReg::TxdOp::ipcss(), PowerISA::FloatOp::isDenormalized(), PowerISA::FloatOp::isInfinity(), iGbReg::TxdOp::isLegacy(), PowerISA::FloatOp::isNan(), MipsISA::isNan(), PowerISA::FloatOp::isNegative(), PowerISA::FloatOp::isNormalized(), PowerISA::FloatOp::isQnan(), MipsISA::isQnan(), ArmISA::UndefinedInstruction::iss(), ArmISA::SecureMonitorCall::iss(), PowerISA::FloatOp::isSnan(), MipsISA::isSnan(), PowerISA::FloatOp::isZero(), iGbReg::TxdOp::ixsm(), ArmISA::TableWalker::L2Descriptor::large(), SparcISA::PageTableEntry::locked(), ArmISA::MacroMemOp::MacroMemOp(), SparcISA::TLB::MakeTsbPtr(), ArmISA::TableWalker::LongDescriptor::memAttr(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), SparcISA::Decoder::moreBytes(), iGbReg::TxdOp::mss(), ArmISA::TableWalker::LongDescriptor::nextDescAddr(), SparcISA::PageTableEntry::nofault(), ArmISA::TableWalker::L1Descriptor::pfn(), SparcISA::PageTableEntry::pfn(), ArmISA::TableWalker::L2Descriptor::pfn(), ArmISA::TableWalker::LongDescriptor::pfn(), SparcISA::PageTableEntry::populate(), ArmISA::PredImmOp::PredImmOp(), MsrBase::printMsrBase(), SparcISA::PageTableEntry::priv(), ArmISA::Decoder::process(), X86ISA::PS2Keyboard::processData(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkAArch64(), ArmISA::TableWalker::processWalkLPAE(), ArmISA::purifyTaggedAddr(), ArmISA::TableWalker::LongDescriptor::pxn(), ArmISA::TableWalker::LongDescriptor::pxnTable(), IdeController::readConfig(), Pl390::readCpu(), RiscvISA::ISA::readMiscRegNoEffect(), SparcISA::ISA::readMiscRegNoEffect(), DRAMCtrl::reorderQueue(), X86ISA::I8259::requestInterrupt(), Sp804::Timer::restartCounter(), iGbReg::TxdOp::rs(), ArmISA::TableWalker::LongDescriptor::rw(), ArmISA::TableWalker::LongDescriptor::rwTable(), ArmISA::ArmStaticInst::saturateOp(), ArmISA::TableWalker::L1Descriptor::secure(), ArmISA::TableWalker::LongDescriptor::secure(), ArmISA::TableWalker::LongDescriptor::secureTable(), PciDevice::serialize(), SatCounter::setBits(), SparcISA::ISA::setFSReg(), RiscvISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), RiscvISA::ISA::setMiscRegNoEffect(), ArmISA::ISA::setMiscRegNoEffect(), X86ISA::Interrupts::setReg(), ArmISA::ArmFault::setSyndrome(), Sparc32Process::setSyscallArg(), SparcProcess::setSyscallReturn(), setThreadArea32Func(), sext(), ArmISA::TableWalker::LongDescriptor::sh(), ArmISA::TableWalker::L1Descriptor::shareable(), ArmISA::TableWalker::L2Descriptor::shareable(), ArmISA::ArmStaticInst::shiftReg64(), SparcISA::PageTableEntry::sideffect(), X86ISA::I8259::signalInterrupt(), ArmISA::simd_modified_imm(), MipsISA::simdPack(), MipsISA::simdUnpack(), ArmISA::ArmStaticInst::spsrWriteByInstr(), X86ISA::Walker::WalkerState::stepWalk(), ArmISA::TableWalker::L1Descriptor::supersection(), iGbReg::TxdOp::tcp(), ArmISA::TableWalker::L1Descriptor::texcb(), ArmISA::TableWalker::L2Descriptor::texcb(), ArmISA::ISA::tlbiVA(), Trace::InstPBTrace::traceInst(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), SparcISA::TLB::translateData(), SparcISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), ElfObject::tryFile(), iGbReg::TxdOp::tse(), iGbReg::TxdOp::tucse(), iGbReg::TxdOp::tucso(), iGbReg::TxdOp::tucss(), iGbReg::TxdOp::txsm(), ArmISA::TableWalker::LongDescriptor::type(), PciDevice::unserialize(), ArmISA::unsignedRecipEstimate(), ArmISA::unsignedRSqrtEstimate(), Pl390::updateIntState(), ArmISA::TLB::updateMiscReg(), ArmISA::TableWalker::LongDescriptor::user(), ArmISA::TableWalker::LongDescriptor::userTable(), iGbReg::TxdOp::utcmd(), SparcISA::TteTag::va(), SparcISA::TteTag::valid(), SparcISA::PageTableEntry::valid(), ArmISA::vcvtFpFpH(), ArmISA::vcvtFpHFp(), ArmISA::vfp_modified_imm(), iGbReg::TxdOp::vle(), SparcISA::vtophys(), SparcISA::PageTableEntry::writable(), X86ISA::I8237::write(), X86ISA::I8259::write(), CopyEngine::write(), IGbE::write(), Pl390::writeDistributor(), Iob::writeIob(), Iob::writeJBus(), X86ISA::I82094AA::writeReg(), ArmISA::TableWalker::L1Descriptor::xn(), ArmISA::TableWalker::L2Descriptor::xn(), ArmISA::TableWalker::LongDescriptor::xn(), and ArmISA::TableWalker::LongDescriptor::xnTable().
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Extract the bit from this position from 'val' and right justify it.
Definition at line 79 of file bitfield.hh.
References bits().
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Returns the bit position of the LSB that is set in the input.
Definition at line 180 of file bitfield.hh.
References bits(), and X86ISA::val.
Referenced by UFSHostDevice::requestHandler().
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Returns the bit position of the MSB that is set in the input.
Definition at line 163 of file bitfield.hh.
References bits().
Referenced by CopyEngine::CopyEngine(), HDLcd::createDmaEngine(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), X86ISA::Interrupts::findRegArrayMSB(), X86ISA::I8259::getVector(), X86ISA::I8259::handleEOI(), and X86ISA::I8259::write().
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Return val with bits first to last set to bit_val.
Definition at line 120 of file bitfield.hh.
References mask().
Referenced by ArmISA::ISA::clear64(), GenericTimerMem::ctrlWrite(), MipsISA::dspDpaq(), MipsISA::dspDpsq(), MipsISA::dspExtp(), MipsISA::dspExtpd(), MipsISA::dspExtr(), MipsISA::dspMaq(), MipsISA::dspMulsaq(), MipsISA::dspPrecrq(), MipsISA::dspPrecrqu(), insertBits(), replaceBits(), and GenericTimerMem::timerWrite().
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Overloaded for access to only one bit in value.
Definition at line 133 of file bitfield.hh.
References insertBits().
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Checks if a number is a power of two, or zero.
Definition at line 198 of file bitfield.hh.
Referenced by SnoopFilter::lookupRequest(), and SnoopFilter::lookupSnoop().
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Generate a 64-bit mask of 'nbits' 1s, right justified.
Definition at line 53 of file bitfield.hh.
Referenced by bits(), insertBits(), mbits(), and sext().
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Definition at line 97 of file bitfield.hh.
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Mask off the given bits in place like bits() but without shifting.
msb = 63, lsb = 0
Definition at line 91 of file bitfield.hh.
References mask().
Referenced by IGbE::TxDescCache::actionAfterWb(), ArmISA::TableWalker::doLongDescriptor(), SparcISA::TLB::doMmuRegWrite(), SparcISA::TLB::GetTsbPtr(), ArmISA::TableWalker::L1Descriptor::l2Addr(), SparcISA::TLB::MakeTsbPtr(), mask(), ArmISA::TableWalker::LongDescriptor::nextTableAddr(), ArmISA::TableWalker::L1Descriptor::paddr(), SparcISA::PageTableEntry::paddr(), ArmISA::TableWalker::L2Descriptor::paddr(), ArmISA::TableWalker::LongDescriptor::paddr(), SparcISA::PageTableEntry::populate(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkLPAE(), Pl390::readDistributor(), SparcISA::ISA::readMiscReg(), ArmISA::ISA::setMiscReg(), SparcISA::ISA::setMiscReg(), SparcISA::TlbEntry::TlbEntry(), ArmISA::ISA::tlbiMVA(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), and SparcISA::TLB::writeTagAccess().
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Returns the number of set ones in the provided value.
PD algorithm from http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel
Definition at line 208 of file bitfield.hh.
References Stats::sum().
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A convenience function to replace bits first to last of val with bit_val in place.
Definition at line 145 of file bitfield.hh.
References insertBits().
Referenced by MipsISA::ISA::configCP(), SparcISA::doNormalFault(), SparcISA::doREDFault(), ArmISA::EndBitUnion(), DramGen::genStartAddr(), DramGen::getNextPacket(), DramRotGen::getNextPacket(), X86ISA::IntelMP::IntAssignment::IntAssignment(), ArmISA::MacroMemOp::MacroMemOp(), DRAMCtrl::minBankPrep(), X86ISA::IntelMP::Processor::Processor(), BitfieldBackend::BitfieldBase< Type >::setBits(), iGbReg::TxdOp::setDd(), ArmISA::vcvtFpFpH(), ArmISA::vcvtFpHFp(), X86ISA::I8237::write(), and IdeController::writeConfig().
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Overloaded function to allow to access only 1 bit.
Definition at line 154 of file bitfield.hh.
References insertBits().
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Sign-extend an N-bit value to 64 bits.
Definition at line 108 of file bitfield.hh.
References bits(), and mask().
Referenced by BitfieldBackend::SignedBitfieldTypes< Type >::SignedBitfield< first, last >::operator int64_t().