76 #ifndef __DEV_ARM_HDLCD_HH__
77 #define __DEV_ARM_HDLCD_HH__
96 HDLcd(
const HDLcdParams *
p);
176 static constexpr uint32_t INT_DMA_END = (1UL << 0);
199 Bitfield<0> vsync_polarity;
234 const VersionReg version;
269 bool enabled()
const {
return command.enable; }
368 unsigned request_size,
unsigned max_pending,
369 size_t line_size, ssize_t line_pitch,
unsigned num_lines);
TimingReg v_back_porch
Vertical back porch width register.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Bitfield< 4 > pxlclk_polarity
void serialize(CheckpointOut &cp) const override
Serialize an object.
size_t size() const
Get the amount of data stored in the FIFO.
Timing generator for a pixel-based display.
static constexpr size_t MAX_PIXEL_SIZE
Maximum number of bytes per pixel.
Bitfield< 15, 12 > reserved_15_12
uint32_t fb_base
Frame buffer base address register.
Buffered DMA engine helper class.
void onVSyncBegin() override
First pixel clock of the first VSync line.
TimingReg h_front_porch
Horizontal front porch width reg.
Bitfield< 23, 16 > default_color
const bool workaroundDmaLineCount
void serialize(CheckpointOut &cp) const override
Serialize an object.
Bitfield< 11, 8 > max_outstanding
Bitfield< 30, 5 > reserved_30_5
void intMask(uint32_t mask)
Convenience function to update the interrupt mask.
static constexpr size_t BUS_OPTIONS_RESETV
Reset value for Bus_Options register.
Bitfield< 7, 5 > reserved_7_5
DmaEngine(HDLcd &_parent, size_t size, unsigned request_size, unsigned max_pending, size_t line_size, ssize_t line_pitch, unsigned num_lines)
PixelFormatReg pixel_format
Pixel format register.
Bitfield< 31, 1 > reserved_31_1
ColorSelectReg green_select
Green color select register.
ColorSelectReg blue_select
Blue color select register.
CommandReg command
Command register.
BusOptsReg bus_options
Bus options register.
Bitfield< 3 > data_polarity
void onFrameDone() override
Finished displaying the visible region of a frame.
const Tick virtRefreshRate
void unserialize(CheckpointIn &cp) override
Unserialize an object.
HDLcd(const HDLcdParams *p)
PixelPump(HDLcd &p, ClockDomain &pxl_clk, unsigned pixel_chunk)
This is a simple scalar statistic, like a counter.
TimingReg v_front_porch
Vertical front porch width register.
static constexpr size_t MAX_BURST_LEN
max number of beats delivered in one dma burst
void startFrame(Addr fb_base)
Bitfield< 4, 3 > bytes_per_pixel
Bitfield< 15, 8 > version_major
const Addr pixelBufferSize
std::unique_ptr< DmaEngine > dmaEngine
OutputStream * pic
Picture of what the current frame buffer looks like.
TimingReg h_back_porch
Horizontal back porch width register.
bool nextPixel(Pixel &p) override
Get the next pixel from the scan line buffer.
uint32_t int_mask
Interrupt mask register.
PixelConverter pixelConverter() const
uint32_t fb_line_length
Frame buffer Line length register.
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
Bitfield< 1 > hsync_polarity
uint64_t Tick
Tick count type.
TimingReg h_sync
Horizontal sync width register.
void intClear(uint32_t ints)
Convenience function to clear interrupts.
Bitfield< 31, 24 > reserved_31_24
PolaritiesReg polarities
Polarities register.
PixelConverter conv
Cached pixel converter, set when the converter is enabled.
BitUnion32(VersionReg) Bitfield<7
EndBitUnion(VersionReg) static const expr uint32_t INT_DMA_END
EventWrapper< HDLcd,&HDLcd::virtRefresh > virtRefreshEvent
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
void setInterrupts(uint32_t ints, uint32_t mask)
Assign new interrupt values and update interrupt signals.
TimingReg h_data
Horizontal data width register.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
void onIdle() override
Last response received callback.
RegisterOffset
ARM HDLcd register offsets.
static constexpr size_t VERSION_RESETV
Reset value for Version register.
Bitfield< 31, 16 > product_id
ColorSelectReg red_select
Red color select register.
static constexpr size_t AXI_PORT_WIDTH
AXI port width in bytes.
uint32_t int_rawstat
Interrupt raw status register.
void onUnderrun(unsigned x, unsigned y) override
Buffer underrun occurred on a frame.
The ClockDomain provides clock to group of clocked objects bundled under the same clock domain...
void virtRefresh()
Handler for fast frame refresh in KVM-mode.
std::ostream CheckpointOut
void writeReg(Addr offset, uint32_t value)
int32_t fb_line_pitch
Frame buffer Line pitch register.
Bitfield< 31 > big_endian
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Bitfield< 31, 12 > reserved_31_12
static constexpr uint32_t INT_BUS_ERROR
uint32_t readReg(Addr offset)
Bitmap bmp
Helper to write out bitmaps.
static constexpr uint32_t INT_VSYNC
Bitfield< 31, 5 > reserved_31_5
const bool workaroundSwapRB
Bitfield< 2 > dataen_polarity
Configurable RGB pixel converter.
Internal gem5 representation of a Pixel.
void drainResume() override
Resume execution after a successful drain.
DisplayTimings displayTimings() const
void onVSyncEnd() override
Callback on the first pixel of the line after the end VSync region (typically the first pixel of the ...
static constexpr uint32_t INT_UNDERRUN
const AddrRangeList addrRanges
uint32_t intStatus() const
Masked interrupt status register.
void intRaise(uint32_t ints)
Convenience function to raise a new interrupt.
AddrRangeList getAddrRanges() const override
Every PIO device is obliged to provide an implementation that returns the address ranges the device r...
TimingReg v_sync
Vertical sync width register.
void regStats() override
Register statistics for this object.
TimingReg v_data
Vertical data width register.
void onEndOfBlock() override
End of block callback.