#include <request.hh>

Public Types
enum	: FlagsType { ARCH_BITS = 0x000000FF, INST_FETCH = 0x00000100, PHYSICAL = 0x00000200, UNCACHEABLE = 0x00000400, STRICT_ORDER = 0x00000800, MMAPPED_IPR = 0x00002000, PRIVILEGED = 0x00008000, CACHE_BLOCK_ZERO = 0x00010000, NO_ACCESS = 0x00080000, LOCKED_RMW = 0x00100000, LLSC = 0x00200000, MEM_SWAP = 0x00400000, MEM_SWAP_COND = 0x00800000, PREFETCH = 0x01000000, PF_EXCLUSIVE = 0x02000000, EVICT_NEXT = 0x04000000, ACQUIRE = 0x00020000, RELEASE = 0x00040000, ATOMIC_RETURN_OP = 0x40000000, ATOMIC_NO_RETURN_OP = 0x80000000, KERNEL = 0x00001000, GENERIC_IPR = 0x08000000, SECURE = 0x10000000, PT_WALK = 0x20000000, STICKY_FLAGS = INST_FETCH }

enum	: MemSpaceConfigFlagsType { SCOPE_VALID = 0x00000001, WAVEFRONT_SCOPE = 0x00000002, WORKGROUP_SCOPE = 0x00000004, DEVICE_SCOPE = 0x00000008, SYSTEM_SCOPE = 0x00000010, GLOBAL_SEGMENT = 0x00000020, GROUP_SEGMENT = 0x00000040, PRIVATE_SEGMENT = 0x00000080, KERNARG_SEGMENT = 0x00000100, READONLY_SEGMENT = 0x00000200, SPILL_SEGMENT = 0x00000400, ARG_SEGMENT = 0x00000800 }

typedef uint32_t	FlagsType

typedef uint8_t	ArchFlagsType

typedef ::Flags< FlagsType >	Flags

typedef uint32_t	MemSpaceConfigFlagsType

typedef ::Flags < MemSpaceConfigFlagsType >	MemSpaceConfigFlags


enum	: MasterID { wbMasterId = 0, funcMasterId = 1, intMasterId = 2, invldMasterId = std::numeric_limits<MasterID>::max() }
	Master Ids that are statically allocated. More...

Public Member Functions
	Request ()
	Minimal constructor. More...

	Request (Addr paddr, unsigned size, Flags flags, MasterID mid, InstSeqNum seq_num, ContextID cid)

	Request (Addr paddr, unsigned size, Flags flags, MasterID mid)
	Constructor for physical (e.g. More...

	Request (Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)

	Request (Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time, Addr pc)

	Request (int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid, Addr pc, ContextID cid)

	Request (int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid, Addr pc, ContextID cid, AtomicOpFunctor *atomic_op)

	~Request ()

void	setContext (ContextID context_id)
	Set up Context numbers. More...

void	setVirt (int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid, Addr pc)
	Set up a virtual (e.g., CPU) request in a previously allocated Request object. More...

void	setPaddr (Addr paddr)
	Set just the physical address. More...

void	splitOnVaddr (Addr split_addr, RequestPtr &req1, RequestPtr &req2)
	Generate two requests as if this request had been split into two pieces. More...

bool	hasPaddr () const
	Accessor for paddr. More...

Addr	getPaddr () const

bool	hasSize () const
	Accessor for size. More...

unsigned	getSize () const

Tick	time () const
	Accessor for time. More...

bool	hasAtomicOpFunctor ()
	Accessor for atomic-op functor. More...

AtomicOpFunctor *	getAtomicOpFunctor ()

Flags	getFlags ()
	Accessor for flags. More...

void	setFlags (Flags flags)
	Note that unlike other accessors, this function sets specific flags (ORs them in); it does not assign its argument to the _flags field. More...

void	setMemSpaceConfigFlags (MemSpaceConfigFlags extraFlags)

bool	hasVaddr () const
	Accessor function for vaddr. More...

Addr	getVaddr () const

MasterID	masterId () const
	Accesssor for the requestor id. More...

uint32_t	taskId () const

void	taskId (uint32_t id)

int	getAsid () const
	Accessor function for asid. More...

void	setAsid (int asid)
	Accessor function for asid. More...

ArchFlagsType	getArchFlags () const
	Accessor function for architecture-specific flags. More...

bool	extraDataValid () const
	Accessor function to check if sc result is valid. More...

uint64_t	getExtraData () const
	Accessor function for store conditional return value. More...

void	setExtraData (uint64_t extraData)
	Accessor function for store conditional return value. More...

bool	hasContextId () const

ContextID	contextId () const
	Accessor function for context ID. More...

void	setPC (Addr pc)

bool	hasPC () const

Addr	getPC () const
	Accessor function for pc. More...

void	incAccessDepth () const
	Increment/Get the depth at which this request is responded to. More...

int	getAccessDepth () const

void	setTranslateLatency ()
	Set/Get the time taken for this request to be successfully translated. More...

Tick	getTranslateLatency () const

void	setAccessLatency ()
	Set/Get the time taken to complete this request's access, not including the time to successfully translate the request. More...

Tick	getAccessLatency () const

bool	hasInstSeqNum () const
	Accessor for the sequence number of instruction that creates the request. More...

InstSeqNum	getReqInstSeqNum () const

void	setReqInstSeqNum (const InstSeqNum seq_num)

bool	isUncacheable () const
	Accessor functions for flags. More...

bool	isStrictlyOrdered () const

bool	isInstFetch () const

bool	isPrefetch () const

bool	isLLSC () const

bool	isPriv () const

bool	isLockedRMW () const

bool	isSwap () const

bool	isCondSwap () const

bool	isMmappedIpr () const

bool	isSecure () const

bool	isPTWalk () const

bool	isAcquire () const

bool	isRelease () const

bool	isKernel () const

bool	isAtomicReturn () const

bool	isAtomicNoReturn () const

bool	isAtomic () const

bool	isScoped () const
	Accessor functions for the memory space configuration flags and used by GPU ISAs such as the Heterogeneous System Architecture (HSA). More...

bool	isWavefrontScope () const

bool	isWorkgroupScope () const

bool	isDeviceScope () const

bool	isSystemScope () const

bool	isGlobalSegment () const

bool	isGroupSegment () const

bool	isPrivateSegment () const

bool	isKernargSegment () const

bool	isReadonlySegment () const

bool	isSpillSegment () const

bool	isArgSegment () const

Public Attributes
Tick	translateDelta
	Time for the TLB/table walker to successfully translate this request. More...

Tick	accessDelta
	Access latency to complete this memory transaction not including translation time. More...

int	depth
	Level of the cache hierachy where this request was responded to (e.g. More...

Private Types
enum	: PrivateFlagsType { VALID_SIZE = 0x00000001, VALID_PADDR = 0x00000002, VALID_VADDR = 0x00000004, VALID_INST_SEQ_NUM = 0x00000008, VALID_PC = 0x00000010, VALID_CONTEXT_ID = 0x00000020, VALID_EXTRA_DATA = 0x00000080, STICKY_PRIVATE_FLAGS = VALID_CONTEXT_ID }

typedef uint8_t	PrivateFlagsType

typedef ::Flags< PrivateFlagsType >	PrivateFlags

Private Member Functions
void	setPhys (Addr paddr, unsigned size, Flags flags, MasterID mid, Tick time)
	Set up a physical (e.g. More...

Private Attributes
Addr	_paddr
	The physical address of the request. More...

unsigned	_size
	The size of the request. More...

MasterID	_masterId
	The requestor ID which is unique in the system for all ports that are capable of issuing a transaction. More...

Flags	_flags
	Flag structure for the request. More...

MemSpaceConfigFlags	_memSpaceConfigFlags
	Memory space configuraiton flag structure for the request. More...

PrivateFlags	privateFlags
	Private flags for field validity checking. More...

Tick	_time
	The time this request was started. More...

uint32_t	_taskId
	The task id associated with this request. More...

int	_asid
	The address space ID. More...

Addr	_vaddr
	The virtual address of the request. More...

uint64_t	_extraData
	Extra data for the request, such as the return value of store conditional or the compare value for a CAS. More...

ContextID	_contextId
	The context ID (for statistics, locks, and wakeups). More...

Addr	_pc
	program counter of initiating access; for tracing/debugging More...

InstSeqNum	_reqInstSeqNum
	Sequence number of the instruction that creates the request. More...

AtomicOpFunctor *	atomicOpFunctor
	A pointer to an atomic operation. More...

Detailed Description

Definition at line 87 of file request.hh.

Member Typedef Documentation

typedef uint8_t Request::ArchFlagsType

Definition at line 91 of file request.hh.

typedef ::Flags<FlagsType> Request::Flags

Definition at line 92 of file request.hh.

typedef uint32_t Request::FlagsType

Definition at line 90 of file request.hh.

typedef ::Flags<MemSpaceConfigFlagsType> Request::MemSpaceConfigFlags

Definition at line 213 of file request.hh.

typedef uint32_t Request::MemSpaceConfigFlagsType

Definition at line 212 of file request.hh.

typedef ::Flags<PrivateFlagsType> Request::PrivateFlags

private

Definition at line 245 of file request.hh.

typedef uint8_t Request::PrivateFlagsType

private

Definition at line 244 of file request.hh.

Member Enumeration Documentation

anonymous enum : FlagsType

Enumerator
ARCH_BITS	Architecture specific flags. These bits int the flag field are reserved for architecture-specific code. For example, SPARC uses them to represent ASIs.
INST_FETCH	The request was an instruction fetch.
PHYSICAL	The virtual address is also the physical address.
UNCACHEABLE	The request is to an uncacheable address. Note Uncacheable accesses may be reordered by CPU models. The STRICT_ORDER flag should be set if such reordering is undesirable.
STRICT_ORDER	The request is required to be strictly ordered by CPU models and is non-speculative. A strictly ordered request is guaranteed to never be re-ordered or executed speculatively by a CPU model. The memory system may still reorder requests in caches unless the UNCACHEABLE flag is set as well.
MMAPPED_IPR	This request is to a memory mapped register.
PRIVILEGED	This request is made in privileged mode.
CACHE_BLOCK_ZERO	This is a write that is targeted and zeroing an entire cache block. There is no need for a read/modify/write
NO_ACCESS	The request should not cause a memory access.
LOCKED_RMW	This request will lock or unlock the accessed memory. When used with a load, the access locks the particular chunk of memory. When used with a store, it unlocks. The rule is that locked accesses have to be made up of a locked load, some operation on the data, and then a locked store.
LLSC	The request is a Load locked/store conditional.
MEM_SWAP	This request is for a memory swap.
MEM_SWAP_COND
PREFETCH	The request is a prefetch.
PF_EXCLUSIVE	The request should be prefetched into the exclusive state.
EVICT_NEXT	The request should be marked as LRU.
ACQUIRE	The request should be marked with ACQUIRE.
RELEASE	The request should be marked with RELEASE.
ATOMIC_RETURN_OP	The request is an atomic that returns data.
ATOMIC_NO_RETURN_OP	The request is an atomic that does not return data.
KERNEL	The request should be marked with KERNEL. Used to indicate the synchronization associated with a GPU kernel launch or completion.
GENERIC_IPR	The request should be handled by the generic IPR code (only valid together with MMAPPED_IPR)
SECURE	The request targets the secure memory space.
PT_WALK	The request is a page table walk.
STICKY_FLAGS	These flags are not cleared when a Request object is reused (assigned a new address).

Definition at line 94 of file request.hh.

anonymous enum : MasterID

Master Ids that are statically allocated.

Enumerator
wbMasterId	This master id is used for writeback requests by the caches.
funcMasterId	This master id is used for functional requests that don't come from a particular device.
intMasterId	This master id is used for message signaled interrupts.
invldMasterId	Invalid master id for assertion checking only. It is invalid behavior to ever send this id as part of a request.

Definition at line 194 of file request.hh.

anonymous enum : MemSpaceConfigFlagsType

Enumerator
SCOPE_VALID	Has a synchronization scope been set?
WAVEFRONT_SCOPE	Access has Wavefront scope visibility.
WORKGROUP_SCOPE	Access has Workgroup scope visibility.
DEVICE_SCOPE	Access has Device (e.g., GPU) scope visibility.
SYSTEM_SCOPE	Access has System (e.g., CPU + GPU) scope visibility.
GLOBAL_SEGMENT	Global Segment.
GROUP_SEGMENT	Group Segment.
PRIVATE_SEGMENT	Private Segment.
KERNARG_SEGMENT	Kergarg Segment.
READONLY_SEGMENT	Readonly Segment.
SPILL_SEGMENT	Spill Segment.
ARG_SEGMENT	Arg Segment.

Definition at line 215 of file request.hh.

anonymous enum : PrivateFlagsType

private

Enumerator
VALID_SIZE	Whether or not the size is valid.
VALID_PADDR	Whether or not paddr is valid (has been written yet).
VALID_VADDR	Whether or not the vaddr & asid are valid.
VALID_INST_SEQ_NUM	Whether or not the instruction sequence number is valid.
VALID_PC	Whether or not the pc is valid.
VALID_CONTEXT_ID	Whether or not the context ID is valid.
VALID_EXTRA_DATA	Whether or not the sc result is valid.
STICKY_PRIVATE_FLAGS	These flags are not cleared when a Request object is reused (assigned a new address).

Definition at line 247 of file request.hh.

Constructor & Destructor Documentation

Request::Request ( )

inline

Minimal constructor.

No fields are initialized. (Note that _flags and privateFlags are cleared by Flags default constructor.)

Definition at line 360 of file request.hh.

Referenced by splitOnVaddr().

Request::Request	(	Addr	paddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid,
		InstSeqNum	seq_num,
		ContextID	cid
	)

inline

Definition at line 368 of file request.hh.

References curTick(), privateFlags, setContext(), setPhys(), and VALID_INST_SEQ_NUM.

Request::Request	(	Addr	paddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid
	)

inline

Constructor for physical (e.g.

device) requests. Initializes just physical address, size, flags, and timestamp (to curTick()). These fields are adequate to perform a request.

Definition at line 386 of file request.hh.

References curTick(), and setPhys().

Request::Request	(	Addr	paddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid,
		Tick	time
	)

inline

Definition at line 396 of file request.hh.

References setPhys().

Request::Request	(	Addr	paddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid,
		Tick	time,
		Addr	pc
	)

inline

Definition at line 406 of file request.hh.

References privateFlags, setPhys(), and VALID_PC.

Request::Request	(	int	asid,
		Addr	vaddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid,
		Addr	pc,
		ContextID	cid
	)

inline

Definition at line 418 of file request.hh.

References setContext(), and setVirt().

Request::Request	(	int	asid,
		Addr	vaddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid,
		Addr	pc,
		ContextID	cid,
		AtomicOpFunctor *	atomic_op
	)

inline

Definition at line 430 of file request.hh.

References setContext(), and setVirt().

Request::~Request ( )

inline

Definition at line 438 of file request.hh.

References atomicOpFunctor, and hasAtomicOpFunctor().

Member Function Documentation

ContextID Request::contextId ( ) const

inline

Accessor function for context ID.

Definition at line 694 of file request.hh.

References _contextId, privateFlags, and VALID_CONTEXT_ID.

Referenced by AbstractMemory::checkLockedAddrList(), CacheBlk::clearLoadLocks(), DefaultFetch< Impl >::finishTranslation(), MipsISA::handleLockedRead(), RiscvISA::handleLockedRead(), MipsISA::handleLockedWrite(), RiscvISA::handleLockedWrite(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), VIPERCoalescer::makeRequest(), GPUCoalescer::makeRequest(), CacheBlk::Lock::matches(), LockedAddr::matchesContext(), DefaultFetch< Impl >::processCacheCompletion(), TsunamiCChip::read(), CpuLocalTimer::read(), Sinic::Device::read(), LSQ< Impl >::read(), Pl390::readCpu(), VGic::readCtrl(), Pl390::readDistributor(), Iob::readJBus(), VGic::readVCpu(), LSQ< Impl >::recvTimingResp(), AbstractMemory::trackLoadLocked(), Minor::LSQ::tryToSend(), GpuDispatcher::write(), CpuLocalTimer::write(), Sinic::Device::write(), LSQ< Impl >::write(), Pl390::writeCpu(), VGic::writeCtrl(), Pl390::writeDistributor(), Iob::writeJBus(), and VGic::writeVCpu().

bool Request::extraDataValid ( ) const

inline

Accessor function to check if sc result is valid.

Definition at line 665 of file request.hh.

References privateFlags, and VALID_EXTRA_DATA.

Referenced by CheckerCPU::writeMem().

int Request::getAccessDepth ( ) const

inline

Definition at line 726 of file request.hh.

References depth.

Tick Request::getAccessLatency ( ) const

inline

Definition at line 739 of file request.hh.

References accessDelta.

ArchFlagsType Request::getArchFlags ( ) const

inline

Accessor function for architecture-specific flags.

Definition at line 657 of file request.hh.

References _flags, ARCH_BITS, privateFlags, VALID_PADDR, and VALID_VADDR.

Referenced by SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), SparcISA::TLB::translateData(), and SparcISA::TLB::translateInst().

int Request::getAsid ( ) const

inline

Accessor function for asid.

Definition at line 642 of file request.hh.

References _asid, privateFlags, and VALID_VADDR.

Referenced by ComputeUnit::sendRequest().

AtomicOpFunctor* Request::getAtomicOpFunctor ( )

inline

Definition at line 576 of file request.hh.

References atomicOpFunctor.

Referenced by Packet::getAtomicOp().

uint64_t Request::getExtraData ( ) const

inline

Accessor function for store conditional return value.

Definition at line 672 of file request.hh.

References _extraData, privateFlags, and VALID_EXTRA_DATA.

Referenced by AbstractMemory::access(), Cache::cmpAndSwap(), BaseO3DynInst< Impl >::completeAcc(), RubyPort::MemSlavePort::hitCallback(), MemCheckerMonitor::recvTimingResp(), AtomicSimpleCPU::writeMem(), and CheckerCPU::writeMem().

Flags Request::getFlags ( )

inline

Accessor for flags.

Definition at line 584 of file request.hh.

References _flags, privateFlags, VALID_PADDR, and VALID_VADDR.

Referenced by TimingSimpleCPU::buildSplitPacket(), CheckerCPU::checkFlags(), ArmISA::TLB::checkPermissions(), ArmISA::TLB::checkPermissions64(), TimingSimpleCPU::completeDataAccess(), ElasticTrace::fetchReqTrace(), ArmISA::Stage2MMU::Stage2Translation::finish(), WholeTranslationState::finish(), WholeTranslationState::getFlags(), GenericISA::isGenericIprAccess(), Minor::LSQ::SplitDataRequest::makeFragmentPackets(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), X86ISA::GpuTLB::pagingProtectionChecks(), ArmISA::Stage2MMU::readDataUntimed(), AtomicSimpleCPU::readMem(), CheckerCPU::readMem(), Cache::recvTimingReq(), TimingSimpleCPU::sendData(), ComputeUnit::sendRequest(), TimingSimpleCPU::sendSplitData(), ArmISA::Stage2LookUp::Stage2LookUp(), X86ISA::Walker::WalkerState::stepWalk(), X86ISA::GpuTLB::tlbLookup(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), AlphaISA::TLB::translateData(), ArmISA::TLB::translateFs(), AlphaISA::TLB::translateInst(), ArmISA::TLB::translateSe(), LSQUnit< Impl >::write(), AtomicSimpleCPU::writeMem(), and CheckerCPU::writeMem().

Addr Request::getPaddr ( ) const

inline

Definition at line 519 of file request.hh.

References _paddr, privateFlags, and VALID_PADDR.

Referenced by Minor::LSQ::StoreBuffer::canForwardDataToLoad(), AlphaISA::TLB::checkCacheability(), CheckerCPU::checkFlags(), AbstractMemory::checkLockedAddrList(), GPUCoalescer::completeIssue(), GarnetSyntheticTraffic::completeRequest(), MemTest::completeRequest(), FetchUnit::fetch(), ElasticTrace::fetchReqTrace(), X86ISA::TLB::finalizePhysical(), ArmISA::TLB::finalizePhysical(), ArmISA::Stage2MMU::Stage2Translation::finish(), WholeTranslationState::finish(), DefaultFetch< Impl >::finishTranslation(), BaseDynInst< Impl >::finishTranslation(), Minor::LSQ::StoreBuffer::forwardStoreData(), GarnetSyntheticTraffic::generatePkt(), WholeTranslationState::getPaddr(), ArmISA::TLB::getResultTe(), MipsISA::handleLockedRead(), RiscvISA::handleLockedRead(), AlphaISA::handleLockedRead(), ArmISA::handleLockedRead(), MipsISA::handleLockedWrite(), RiscvISA::handleLockedWrite(), AlphaISA::handleLockedWrite(), ArmISA::handleLockedWrite(), Minor::Fetch1::handleTLBResponse(), GPUCoalescer::insertRequest(), CacheBlk::Lock::intersects(), Minor::LSQ::SplitDataRequest::makeFragmentPackets(), CacheBlk::Lock::matches(), Packet::Packet(), FetchUnit::processFetchReturn(), LSQUnit< Impl >::read(), CheckerCPU::readMem(), ComputeUnit::DataPort::recvReqRetry(), ComputeUnit::SQCPort::recvReqRetry(), Cache::recvTimingReq(), ComputeUnit::DataPort::recvTimingResp(), ComputeUnit::DTLBPort::recvTimingResp(), ComputeUnit::ITLBPort::recvTimingResp(), DmaPort::sendDma(), TimingSimpleCPU::sendFetch(), ComputeUnit::sendRequest(), ComputeUnit::sendSyncRequest(), ComputeUnit::LDSPort::sendTimingReq(), ArmISA::ISA::setMiscReg(), MemTest::tick(), AbstractMemory::trackLoadLocked(), X86ISA::GpuTLB::translate(), AlphaISA::TLB::translateData(), SparcISA::TLB::translateData(), AlphaISA::TLB::translateInst(), SparcISA::TLB::translateInst(), try_translate(), TLBCoalescer::updatePhysAddresses(), LSQUnit< Impl >::write(), LSQUnit< Impl >::writebackStores(), and CheckerCPU::writeMem().

Addr Request::getPC ( ) const

inline

Accessor function for pc.

Definition at line 715 of file request.hh.

References _pc, privateFlags, and VALID_PC.

Referenced by StridePrefetcher::calculatePrefetch(), ArmISA::TLB::checkPermissions(), ArmISA::TLB::checkPermissions64(), ElasticTrace::fetchReqTrace(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), QueuedPrefetcher::notify(), ComputeUnit::sendRequest(), AlphaISA::TLB::translateData(), and AlphaISA::TLB::translateInst().

InstSeqNum Request::getReqInstSeqNum ( ) const

inline

Definition at line 752 of file request.hh.

References _reqInstSeqNum, privateFlags, and VALID_INST_SEQ_NUM.

Referenced by TraceCPU::ElasticDataGen::addToSortedReadyList(), TraceCPU::ElasticDataGen::completeMemAccess(), and TraceCPU::ElasticDataGen::execute().

unsigned Request::getSize ( ) const

inline

Definition at line 552 of file request.hh.

References _size, privateFlags, and VALID_SIZE.

Referenced by Minor::ForwardLineData::adoptPacketData(), TimingSimpleCPU::buildSplitPacket(), Minor::LSQ::StoreBuffer::canForwardDataToLoad(), MemTest::completeRequest(), Shader::doFunctionalAccess(), TraceCPU::ElasticDataGen::executeMemReq(), FetchUnit::fetch(), ElasticTrace::fetchReqTrace(), Minor::LSQ::StoreBuffer::forwardStoreData(), GarnetSyntheticTraffic::generatePkt(), BaseGen::getPacket(), DmaPort::handleResp(), Check::initiateAction(), Check::initiateCheck(), Check::initiateFlush(), Check::initiatePrefetch(), CacheBlk::Lock::intersects(), Minor::LSQ::SplitDataRequest::makeFragmentPackets(), CacheBlk::Lock::matches(), Packet::Packet(), FetchStage::processFetchReturn(), FetchUnit::processFetchReturn(), LSQUnit< Impl >::read(), Cache::recvTimingReq(), Minor::LSQ::SplitDataRequest::retireResponse(), TraceCPU::FixedRetryGen::send(), DmaPort::sendDma(), ComputeUnit::sendRequest(), BaseDynInst< Impl >::splitRequest(), ArmISA::Stage2LookUp::Stage2LookUp(), ArmISA::TLB::testTranslation(), X86ISA::TLB::translate(), PageTableBase::translate(), X86ISA::GpuTLB::translate(), RiscvISA::TLB::translateData(), AlphaISA::TLB::translateData(), SparcISA::TLB::translateData(), SparcISA::TLB::translateInst(), PowerISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), LSQUnit< Impl >::write(), and LSQUnit< Impl >::writebackStores().

Tick Request::getTranslateLatency ( ) const

inline

Definition at line 732 of file request.hh.

References translateDelta.

Addr Request::getVaddr ( ) const

inline

Definition at line 616 of file request.hh.

References _vaddr, privateFlags, and VALID_VADDR.

bool Request::hasAtomicOpFunctor ( )

inline

Accessor for atomic-op functor.

Definition at line 570 of file request.hh.

References atomicOpFunctor.

Referenced by ~Request().

bool Request::hasContextId ( ) const

inline

Definition at line 687 of file request.hh.

References privateFlags, and VALID_CONTEXT_ID.

Referenced by Sequencer::issueRequest(), GPUCoalescer::issueRequest(), GPUCoalescer::makeRequest(), Pl390::readCpu(), Pl390::writeCpu(), and Pl390::writeDistributor().

bool Request::hasInstSeqNum ( ) const

inline

Accessor for the sequence number of instruction that creates the request.

Definition at line 746 of file request.hh.

References privateFlags, and VALID_INST_SEQ_NUM.

bool Request::hasPaddr ( ) const

inline

Accessor for paddr.

Definition at line 513 of file request.hh.

References privateFlags, and VALID_PADDR.

Referenced by FetchUnit::fetch(), ArmISA::TLB::getResultTe(), Minor::Fetch1::handleTLBResponse(), Minor::LSQ::SplitDataRequest::makeFragmentPackets(), Packet::Packet(), X86ISA::GpuTLB::CpuSidePort::recvFunctional(), Cache::recvTimingReq(), ComputeUnit::sendRequest(), and ArmISA::TLB::translateComplete().

bool Request::hasPC ( ) const

inline

Definition at line 708 of file request.hh.

References privateFlags, and VALID_PC.

Referenced by StridePrefetcher::calculatePrefetch(), Sequencer::issueRequest(), GPUCoalescer::issueRequest(), and QueuedPrefetcher::notify().

bool Request::hasSize ( ) const

inline

Accessor for size.

Definition at line 546 of file request.hh.

References privateFlags, and VALID_SIZE.

Referenced by FetchUnit::fetch(), Packet::Packet(), ComputeUnit::sendRequest(), and ArmISA::TLB::testTranslation().

bool Request::hasVaddr ( ) const

inline

Accessor function for vaddr.

Definition at line 610 of file request.hh.

References privateFlags, and VALID_VADDR.

void Request::incAccessDepth ( ) const

inline

Increment/Get the depth at which this request is responded to.

This currently happens when the request misses in any cache level.

Definition at line 725 of file request.hh.

References depth.

Referenced by BaseCache::incMissCount().

bool Request::isAcquire ( ) const

inline

Definition at line 779 of file request.hh.

References _flags, ACQUIRE, and Flags< T >::isSet().

Referenced by ComputeUnit::injectGlobalMemFence(), VIPERCoalescer::makeRequest(), GPUCoalescer::makeRequest(), and ComputeUnit::DataPort::recvTimingResp().

bool Request::isArgSegment ( ) const

inline

Definition at line 868 of file request.hh.

References _memSpaceConfigFlags, and ARG_SEGMENT.

Referenced by isGlobalSegment(), and reqSegmentToHSASegment().

bool Request::isAtomic ( ) const

inline

Definition at line 786 of file request.hh.

References _flags, ATOMIC_NO_RETURN_OP, ATOMIC_RETURN_OP, and Flags< T >::isSet().

Referenced by Packet::isAtomicOp().

bool Request::isAtomicNoReturn ( ) const

inline

Definition at line 783 of file request.hh.

References _flags, ATOMIC_NO_RETURN_OP, and Flags< T >::isSet().

bool Request::isAtomicReturn ( ) const

inline

Definition at line 782 of file request.hh.

References _flags, ATOMIC_RETURN_OP, and Flags< T >::isSet().

bool Request::isCondSwap ( ) const

inline

Definition at line 775 of file request.hh.

References _flags, Flags< T >::isSet(), and MEM_SWAP_COND.

Referenced by AbstractMemory::access(), Cache::cmpAndSwap(), BaseDynInst< Impl >::finishTranslation(), TimingSimpleCPU::sendData(), and AtomicSimpleCPU::writeMem().

bool Request::isDeviceScope ( ) const

inline

Definition at line 815 of file request.hh.

References _memSpaceConfigFlags, DEVICE_SCOPE, and isScoped().

Referenced by reqScopeToHSAScope().

bool Request::isGlobalSegment ( ) const

inline

Definition at line 829 of file request.hh.

References _memSpaceConfigFlags, GLOBAL_SEGMENT, isArgSegment(), isGroupSegment(), isKernargSegment(), isPrivateSegment(), isReadonlySegment(), and isSpillSegment().

Referenced by reqSegmentToHSASegment().

bool Request::isGroupSegment ( ) const

inline

Definition at line 838 of file request.hh.

References _memSpaceConfigFlags, and GROUP_SEGMENT.

Referenced by isGlobalSegment(), and reqSegmentToHSASegment().

bool Request::isInstFetch ( ) const

inline

Definition at line 769 of file request.hh.

References _flags, INST_FETCH, and Flags< T >::isSet().

Referenced by AbstractMemory::access(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), BasePrefetcher::observeAccess(), and ArmISA::TLB::translateFs().

bool Request::isKernargSegment ( ) const

inline

Definition at line 850 of file request.hh.

References _memSpaceConfigFlags, and KERNARG_SEGMENT.

Referenced by isGlobalSegment(), and reqSegmentToHSASegment().

bool Request::isKernel ( ) const

inline

Definition at line 781 of file request.hh.

References _flags, Flags< T >::isSet(), and KERNEL.

Referenced by RubyPort::MemSlavePort::hitCallback(), VIPERCoalescer::makeRequest(), GPUCoalescer::makeRequest(), and ComputeUnit::DataPort::recvTimingResp().

bool Request::isLLSC ( ) const

inline

Definition at line 771 of file request.hh.

References _flags, Flags< T >::isSet(), and LLSC.

Referenced by TimingSimpleCPU::handleReadPacket(), TimingSimpleCPU::initiateMemRead(), Packet::makeReadCmd(), Packet::makeWriteCmd(), LSQUnit< Impl >::read(), AtomicSimpleCPU::readMem(), TimingSimpleCPU::sendData(), Minor::LSQ::tryToSendToTransfers(), AtomicSimpleCPU::writeMem(), and TimingSimpleCPU::writeMem().

bool Request::isLockedRMW ( ) const

inline

Definition at line 773 of file request.hh.

References _flags, Flags< T >::isSet(), and LOCKED_RMW.

Referenced by GPUCoalescer::insertRequest(), Sequencer::makeRequest(), GPUCoalescer::makeRequest(), AtomicSimpleCPU::readMem(), and AtomicSimpleCPU::writeMem().

bool Request::isMmappedIpr ( ) const

inline

Definition at line 776 of file request.hh.

References _flags, Flags< T >::isSet(), and MMAPPED_IPR.

Referenced by TimingSimpleCPU::buildSplitPacket(), BaseKvmCPU::doMMIOAccess(), TimingSimpleCPU::handleReadPacket(), TimingSimpleCPU::handleWritePacket(), LSQUnit< Impl >::read(), AtomicSimpleCPU::readMem(), CheckerCPU::readMem(), Minor::LSQ::tryToSend(), Minor::LSQ::tryToSendToTransfers(), LSQUnit< Impl >::writebackStores(), and AtomicSimpleCPU::writeMem().

bool Request::isPrefetch ( ) const

inline

Definition at line 770 of file request.hh.

References _flags, Flags< T >::isSet(), and PREFETCH.

Referenced by ArmISA::TLB::checkPermissions(), ArmISA::TLB::checkPermissions64(), ArmISA::TLB::getTE(), WholeTranslationState::isPrefetch(), Packet::makeReadCmd(), AtomicSimpleCPU::readMem(), CheckerCPU::readMem(), MemCheckerMonitor::recvTimingReq(), MemCheckerMonitor::recvTimingResp(), AtomicSimpleCPU::writeMem(), and CheckerCPU::writeMem().

bool Request::isPriv ( ) const

inline

Definition at line 772 of file request.hh.

References _flags, Flags< T >::isSet(), and PRIVILEGED.

bool Request::isPrivateSegment ( ) const

inline

Definition at line 844 of file request.hh.

References _memSpaceConfigFlags, and PRIVATE_SEGMENT.

Referenced by isGlobalSegment(), and reqSegmentToHSASegment().

bool Request::isPTWalk ( ) const

inline

Definition at line 778 of file request.hh.

References _flags, Flags< T >::isSet(), and PT_WALK.

Referenced by ArmISA::TLB::checkPermissions(), and ArmISA::TLB::checkPermissions64().

bool Request::isReadonlySegment ( ) const

inline

Definition at line 856 of file request.hh.

References _memSpaceConfigFlags, and READONLY_SEGMENT.

Referenced by isGlobalSegment(), and reqSegmentToHSASegment().

bool Request::isRelease ( ) const

inline

Definition at line 780 of file request.hh.

References _flags, Flags< T >::isSet(), and RELEASE.

Referenced by ComputeUnit::injectGlobalMemFence(), VIPERCoalescer::makeRequest(), GPUCoalescer::makeRequest(), and ComputeUnit::DataPort::recvTimingResp().

bool Request::isScoped ( ) const

inline

Accessor functions for the memory space configuration flags and used by GPU ISAs such as the Heterogeneous System Architecture (HSA).

Note that these are for testing only; setting extraFlags should be done via setMemSpaceConfigFlags().

Definition at line 798 of file request.hh.

References _memSpaceConfigFlags, and SCOPE_VALID.

Referenced by isDeviceScope(), isSystemScope(), isWavefrontScope(), isWorkgroupScope(), and reqScopeToHSAScope().

bool Request::isSecure ( ) const

inline

Definition at line 777 of file request.hh.

References _flags, Flags< T >::isSet(), and SECURE.

Referenced by Packet::Packet().

bool Request::isSpillSegment ( ) const

inline

Definition at line 862 of file request.hh.

References _memSpaceConfigFlags, and SPILL_SEGMENT.

Referenced by isGlobalSegment(), and reqSegmentToHSASegment().

bool Request::isStrictlyOrdered ( ) const

inline

Definition at line 768 of file request.hh.

References _flags, Flags< T >::isSet(), and STRICT_ORDER.

Referenced by WholeTranslationState::isStrictlyOrdered(), LSQUnit< Impl >::read(), and Minor::LSQ::tryToSendToTransfers().

bool Request::isSwap ( ) const

inline

Definition at line 774 of file request.hh.

References _flags, Flags< T >::isSet(), MEM_SWAP, and MEM_SWAP_COND.

Referenced by ArmISA::handleLockedWrite(), Sequencer::hitCallback(), TimingSimpleCPU::initiateMemRead(), Packet::makeWriteCmd(), Minor::LSQ::tryToSendToTransfers(), AtomicSimpleCPU::writeMem(), and TimingSimpleCPU::writeMem().

bool Request::isSystemScope ( ) const

inline

Definition at line 822 of file request.hh.

References _memSpaceConfigFlags, isScoped(), and SYSTEM_SCOPE.

Referenced by reqScopeToHSAScope().

bool Request::isUncacheable ( ) const

inline

Accessor functions for flags.

Note that these are for testing only; setting flags should be done via setFlags().

Definition at line 767 of file request.hh.

References _flags, Flags< T >::isSet(), and UNCACHEABLE.

Referenced by Cache::access(), WriteQueueEntry::allocate(), MSHR::allocate(), AlphaISA::TLB::checkCacheability(), Cache::createMissPacket(), Cache::doTimingSupplyResponse(), MipsISA::handleLockedWrite(), RiscvISA::handleLockedWrite(), AlphaISA::handleLockedWrite(), MSHR::handleSnoop(), Cache::handleSnoop(), SnoopFilter::lookupRequest(), SnoopFilter::lookupSnoop(), BasePrefetcher::observeAccess(), CheckerCPU::readMem(), Cache::recvAtomic(), Cache::recvTimingReq(), DmaPort::recvTimingResp(), FullO3CPU< Impl >::IcachePort::recvTimingResp(), Cache::recvTimingResp(), Cache::recvTimingSnoopReq(), SnoopFilter::updateResponse(), and SnoopFilter::updateSnoopResponse().

bool Request::isWavefrontScope ( ) const

inline

Definition at line 801 of file request.hh.

References _memSpaceConfigFlags, isScoped(), and WAVEFRONT_SCOPE.

Referenced by reqScopeToHSAScope().

bool Request::isWorkgroupScope ( ) const

inline

Definition at line 808 of file request.hh.

References _memSpaceConfigFlags, isScoped(), and WORKGROUP_SCOPE.

Referenced by reqScopeToHSAScope().

MasterID Request::masterId ( ) const

inline

Accesssor for the requestor id.

Definition at line 624 of file request.hh.

References _masterId.

Referenced by AbstractMemory::access(), StridePrefetcher::calculatePrefetch(), Cache::getNextQueueEntry(), BaseCache::incHitCount(), BaseCache::incMissCount(), BaseSetAssoc::insertBlock(), Cache::recvTimingReq(), Cache::recvTimingResp(), ComputeUnit::sendRequest(), and ArmISA::Stage2LookUp::Stage2LookUp().

void Request::setAccessLatency ( )

inline

Set/Get the time taken to complete this request's access, not including the time to successfully translate the request.

Definition at line 738 of file request.hh.

References _time, accessDelta, curTick(), and translateDelta.

Referenced by LSQUnit< Impl >::completeDataAccess(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), and DefaultFetch< Impl >::processCacheCompletion().

void Request::setAsid ( int asid )

inline

Accessor function for asid.

Definition at line 650 of file request.hh.

References _asid, and ArmISA::asid.

Referenced by ArmISA::TLB::translateFs().

void Request::setContext ( ContextID context_id )

inline

Set up Context numbers.

Definition at line 449 of file request.hh.

References _contextId, privateFlags, and VALID_CONTEXT_ID.

Referenced by BaseKvmCPU::doMMIOAccess(), TimingSimpleCPU::fetch(), Minor::Fetch1::fetchLine(), GarnetSyntheticTraffic::generatePkt(), X86KvmCPU::handleKvmExitIO(), AtomicSimpleCPU::init(), Check::initiateAction(), Check::initiateCheck(), Check::initiatePrefetch(), Minor::LSQ::SplitDataRequest::makeFragmentRequests(), Minor::LSQ::pushRequest(), Request(), TraceCPU::FixedRetryGen::send(), ArmISA::ISA::setMiscReg(), AtomicSimpleCPU::tick(), and MemTest::tick().

void Request::setExtraData ( uint64_t extraData )

inline

Accessor function for store conditional return value.

Definition at line 680 of file request.hh.

References _extraData, privateFlags, and VALID_EXTRA_DATA.

Referenced by Cache::access(), AbstractMemory::checkLockedAddrList(), CacheBlk::checkWrite(), BaseDynInst< Impl >::finishTranslation(), Sequencer::handleLlsc(), GPUCoalescer::handleLlsc(), MipsISA::handleLockedWrite(), RiscvISA::handleLockedWrite(), AlphaISA::handleLockedWrite(), ArmISA::handleLockedWrite(), Cache::recvTimingResp(), TimingSimpleCPU::sendData(), AtomicSimpleCPU::writeMem(), and AbstractMemory::writeOK().

void Request::setFlags ( Flags flags )

inline

Note that unlike other accessors, this function sets specific flags (ORs them in); it does not assign its argument to the _flags field.

Thus this method should rightly be called setFlags() and not just flags().

Definition at line 595 of file request.hh.

References _flags, privateFlags, Flags< T >::set(), VALID_PADDR, and VALID_VADDR.

Referenced by RiscvISA::TLB::checkCacheability(), MipsISA::TLB::checkCacheability(), AlphaISA::TLB::checkCacheability(), PowerISA::TLB::checkCacheability(), Cache::cleanEvictBlk(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomicAcq(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::execLdAcq(), X86ISA::TLB::finalizePhysical(), ArmISA::TLB::finalizePhysical(), WholeTranslationState::finish(), X86ISA::GpuTLB::handleFuncTranslationReturn(), X86ISA::GpuTLB::handleTranslationReturn(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::initiateAcc(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::initiateAcc(), ComputeUnit::injectGlobalMemFence(), QueuedPrefetcher::insert(), GPUDynInst::setRequestFlags(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), SparcISA::TLB::translateData(), ArmISA::TLB::translateFs(), AlphaISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), TLBCoalescer::updatePhysAddresses(), and Cache::writebackBlk().

void Request::setMemSpaceConfigFlags ( MemSpaceConfigFlags extraFlags )

inline

Definition at line 602 of file request.hh.

References _memSpaceConfigFlags, privateFlags, VALID_PADDR, and VALID_VADDR.

Referenced by GPUDynInst::setRequestFlags().

void Request::setPaddr ( Addr paddr )

inline

Set just the physical address.

This usually used to record the result of a translation. However, when using virtualized CPUs setPhys() is sometimes called to finalize a physical address without a virtual address, so we can't check if the virtual address is valid.

Definition at line 487 of file request.hh.

References _paddr, privateFlags, and VALID_PADDR.

Referenced by AlphaISA::TLB::checkCacheability(), TraceCPU::ElasticDataGen::executeMemReq(), X86ISA::TLB::finalizePhysical(), ArmISA::TLB::finalizePhysical(), WholeTranslationState::finish(), GarnetSyntheticTraffic::generatePkt(), X86ISA::GpuTLB::handleFuncTranslationReturn(), X86ISA::GpuTLB::handleTranslationReturn(), ComputeUnit::injectGlobalMemFence(), ComputeUnit::sendToLds(), X86ISA::TLB::translate(), PageTableBase::translate(), X86ISA::GpuTLB::translate(), AlphaISA::TLB::translateData(), SparcISA::TLB::translateData(), ArmISA::TLB::translateFs(), AlphaISA::TLB::translateInst(), SparcISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), ArmISA::TLB::translateSe(), and TLBCoalescer::updatePhysAddresses().

void Request::setPC ( Addr pc )

inline

Definition at line 701 of file request.hh.

References _pc, pc, privateFlags, and VALID_PC.

Referenced by TraceCPU::ElasticDataGen::executeMemReq(), BaseGen::getPacket(), QueuedPrefetcher::notify(), and TraceCPU::FixedRetryGen::send().

void Request::setPhys	(	Addr	paddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid,
		Tick	time
	)

inlineprivate

Set up a physical (e.g.

device) request in a previously allocated Request object.

Definition at line 276 of file request.hh.

References _flags, _masterId, _paddr, _size, _time, accessDelta, Flags< T >::clear(), depth, privateFlags, Flags< T >::set(), X86ISA::size(), STICKY_FLAGS, STICKY_PRIVATE_FLAGS, time(), VALID_PADDR, and VALID_SIZE.

Referenced by Request().

void Request::setReqInstSeqNum ( const InstSeqNum seq_num )

inline

Definition at line 759 of file request.hh.

References _reqInstSeqNum, privateFlags, and VALID_INST_SEQ_NUM.

Referenced by TraceCPU::ElasticDataGen::executeMemReq().

void Request::setTranslateLatency ( )

inline

Set/Get the time taken for this request to be successfully translated.

Definition at line 731 of file request.hh.

References _time, curTick(), and translateDelta.

Referenced by DataTranslation< ExecContextPtr >::finish().

void Request::setVirt	(	int	asid,
		Addr	vaddr,
		unsigned	size,
		Flags	flags,
		MasterID	mid,
		Addr	pc
	)

inline

Set up a virtual (e.g., CPU) request in a previously allocated Request object.

Definition at line 460 of file request.hh.

References _asid, _flags, _masterId, _pc, _size, _time, _vaddr, accessDelta, ArmISA::asid, Flags< T >::clear(), curTick(), depth, pc, privateFlags, Flags< T >::set(), X86ISA::size(), STICKY_FLAGS, STICKY_PRIVATE_FLAGS, translateDelta, MipsISA::vaddr, VALID_PC, VALID_SIZE, and VALID_VADDR.

Referenced by TraceCPU::ElasticDataGen::executeMemReq(), Minor::Fetch1::fetchLine(), Minor::LSQ::SplitDataRequest::makeFragmentRequests(), Minor::LSQ::pushRequest(), ArmISA::Stage2MMU::readDataUntimed(), AtomicSimpleCPU::readMem(), Request(), ComputeUnit::sendRequest(), ArmISA::ISA::setMiscReg(), BaseSimpleCPU::setupFetchRequest(), ArmISA::Stage2MMU::Stage2Translation::setVirt(), ArmISA::Stage2LookUp::Stage2LookUp(), Checker< Impl >::verify(), and AtomicSimpleCPU::writeMem().

void Request::splitOnVaddr	(	Addr	split_addr,
		RequestPtr &	req1,
		RequestPtr &	req2
	)

inline

Generate two requests as if this request had been split into two pieces.

The original request can't have been translated already.

Definition at line 497 of file request.hh.

References _size, _vaddr, privateFlags, Request(), VALID_PADDR, and VALID_VADDR.

Referenced by Shader::doFunctionalAccess(), TimingSimpleCPU::initiateMemRead(), BaseDynInst< Impl >::splitRequest(), and TimingSimpleCPU::writeMem().

uint32_t Request::taskId ( ) const

inline

Definition at line 630 of file request.hh.

References _taskId.

Referenced by DmaPort::dmaAction(), TimingSimpleCPU::fetch(), DefaultFetch< Impl >::fetchCacheLine(), ArmISA::TableWalker::fetchDescriptor(), TimingSimpleCPU::initiateMemRead(), BaseDynInst< Impl >::initiateMemRead(), QueuedPrefetcher::insert(), BaseSetAssoc::insertBlock(), AtomicSimpleCPU::readMem(), AtomicSimpleCPU::tick(), Cache::writebackBlk(), Cache::writebackVisitor(), AtomicSimpleCPU::writeMem(), TimingSimpleCPU::writeMem(), and BaseDynInst< Impl >::writeMem().

void Request::taskId ( uint32_t id )

inline

Definition at line 636 of file request.hh.

References _taskId, and SparcISA::id.

Tick Request::time ( ) const

inline

Accessor for time.

Definition at line 560 of file request.hh.

References _time, privateFlags, VALID_PADDR, and VALID_VADDR.

Referenced by setPhys().

Member Data Documentation

int Request::_asid

private

The address space ID.

Definition at line 331 of file request.hh.

Referenced by getAsid(), setAsid(), and setVirt().

ContextID Request::_contextId

private

The context ID (for statistics, locks, and wakeups).

Definition at line 342 of file request.hh.

Referenced by contextId(), and setContext().

uint64_t Request::_extraData

private

Extra data for the request, such as the return value of store conditional or the compare value for a CAS.

Definition at line 339 of file request.hh.

Referenced by getExtraData(), and setExtraData().

Flags Request::_flags

private

Flag structure for the request.

Definition at line 310 of file request.hh.

Referenced by getArchFlags(), getFlags(), isAcquire(), isAtomic(), isAtomicNoReturn(), isAtomicReturn(), isCondSwap(), isInstFetch(), isKernel(), isLLSC(), isLockedRMW(), isMmappedIpr(), isPrefetch(), isPriv(), isPTWalk(), isRelease(), isSecure(), isStrictlyOrdered(), isSwap(), isUncacheable(), setFlags(), setPhys(), and setVirt().

MasterID Request::_masterId

private

The requestor ID which is unique in the system for all ports that are capable of issuing a transaction.

Definition at line 307 of file request.hh.

Referenced by masterId(), setPhys(), and setVirt().

MemSpaceConfigFlags Request::_memSpaceConfigFlags

private

Memory space configuraiton flag structure for the request.

Definition at line 313 of file request.hh.

Referenced by isArgSegment(), isDeviceScope(), isGlobalSegment(), isGroupSegment(), isKernargSegment(), isPrivateSegment(), isReadonlySegment(), isScoped(), isSpillSegment(), isSystemScope(), isWavefrontScope(), isWorkgroupScope(), and setMemSpaceConfigFlags().

Addr Request::_paddr

private

The physical address of the request.

Valid only if validPaddr is set.

Definition at line 295 of file request.hh.

Referenced by getPaddr(), setPaddr(), and setPhys().

Addr Request::_pc

private

program counter of initiating access; for tracing/debugging

Definition at line 345 of file request.hh.

Referenced by getPC(), setPC(), and setVirt().

InstSeqNum Request::_reqInstSeqNum

private

Sequence number of the instruction that creates the request.

Definition at line 348 of file request.hh.

Referenced by getReqInstSeqNum(), and setReqInstSeqNum().

unsigned Request::_size

private

The size of the request.

This field must be set when vaddr or paddr is written via setVirt() or setPhys(), so it is always valid as long as one of the address fields is valid.

Definition at line 302 of file request.hh.

Referenced by getSize(), setPhys(), setVirt(), and splitOnVaddr().

uint32_t Request::_taskId

private

The task id associated with this request.

Definition at line 328 of file request.hh.

Referenced by taskId().

Tick Request::_time

private

The time this request was started.

Used to calculate latencies. This field is set to curTick() any time paddr or vaddr is written.

Definition at line 323 of file request.hh.