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stage2_lookup.hh
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37  * Authors: Ali Saidi
38  * Giacomo Gabrielli
39  */
40 
41 #ifndef __ARCH_ARM_STAGE2_LOOKUP_HH__
42 #define __ARCH_ARM_STAGE2_LOOKUP_HH__
43 
44 #include <list>
45 
46 #include "arch/arm/system.hh"
47 #include "arch/arm/table_walker.hh"
48 #include "arch/arm/tlb.hh"
49 #include "mem/request.hh"
50 
51 class ThreadContext;
52 
53 namespace ArmISA {
54 class Translation;
55 class TLB;
56 
57 
59 {
60  private:
65  TLB::Translation *transState;
67  bool timing;
68  bool functional;
73  bool complete;
74  bool selfDelete;
75 
76  public:
77  Stage2LookUp(TLB *s1Tlb, TLB *s2Tlb, TlbEntry s1Te, RequestPtr _req,
78  TLB::Translation *_transState, BaseTLB::Mode _mode, bool _timing,
79  bool _functional, TLB::ArmTranslationType _tranType) :
80  stage1Tlb(s1Tlb), stage2Tlb(s2Tlb), stage1Te(s1Te), s1Req(_req),
81  transState(_transState), mode(_mode), timing(_timing),
82  functional(_functional), tranType(_tranType), stage2Te(nullptr),
83  fault(NoFault), complete(false), selfDelete(false)
84  {
85  req.setVirt(0, s1Te.pAddr(s1Req->getVaddr()), s1Req->getSize(),
86  s1Req->getFlags(), s1Req->masterId(), 0);
87  }
88 
89  Fault getTe(ThreadContext *tc, TlbEntry *destTe);
90 
92 
93  void setSelfDelete() { selfDelete = true; }
94 
95  bool isComplete() const { return complete; }
96 
97  void markDelayed() {}
98 
99  void finish(const Fault &fault, RequestPtr req, ThreadContext *tc,
101 };
102 
103 
104 } // namespace ArmISA
105 
106 #endif //__ARCH_ARM_STAGE2_LOOKUP_HH__
107 
decltype(nullptr) constexpr NoFault
Definition: types.hh:189
void mergeTe(RequestPtr req, BaseTLB::Mode mode)
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
BaseTLB::Mode mode
ThreadContext is the external interface to all thread state for anything outside of the CPU...
bool isComplete() const
Fault getTe(ThreadContext *tc, TlbEntry *destTe)
void markDelayed()
Signal that the translation has been delayed due to a hw page table walk.
Addr pAddr(Addr va) const
Definition: pagetable.hh:224
Stage2LookUp(TLB *s1Tlb, TLB *s2Tlb, TlbEntry s1Te, RequestPtr _req, TLB::Translation *_transState, BaseTLB::Mode _mode, bool _timing, bool _functional, TLB::ArmTranslationType _tranType)
ArmTranslationType
Definition: tlb.hh:124
TLB::ArmTranslationType tranType
Flags getFlags()
Accessor for flags.
Definition: request.hh:584
Mode
Definition: tlb.hh:61
MasterID masterId() const
Accesssor for the requestor id.
Definition: request.hh:624
Addr getVaddr() const
Definition: request.hh:616
void setVirt(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid, Addr pc)
Set up a virtual (e.g., CPU) request in a previously allocated Request object.
Definition: request.hh:460
void finish(const Fault &fault, RequestPtr req, ThreadContext *tc, BaseTLB::Mode mode)
TLB::Translation * transState
unsigned getSize() const
Definition: request.hh:552
std::shared_ptr< FaultBase > Fault
Definition: types.hh:184

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