lsq.hh

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/*
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 * Copyright (c) 2013 Advanced Micro Devices, Inc.
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 * to a hardware implementation of the functionality of the software
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 * Authors: Korey Sewell
 */

#ifndef __CPU_O3_LSQ_HH__
#define __CPU_O3_LSQ_HH__

#include <map>
#include <queue>

#include "cpu/o3/lsq_unit.hh"
#include "cpu/inst_seq.hh"
#include "mem/port.hh"
#include "sim/sim_object.hh"

struct DerivO3CPUParams;

template <class Impl>
class LSQ {
  public:
    typedef typename Impl::O3CPU O3CPU;
    typedef typename Impl::DynInstPtr DynInstPtr;
    typedef typename Impl::CPUPol::IEW IEW;
    typedef typename Impl::CPUPol::LSQUnit LSQUnit;

    enum LSQPolicy {
        Dynamic,
        Partitioned,
        Threshold
    };

    LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params);
    ~LSQ() {
        if (thread) delete [] thread;
    }

    std::string name() const;

    void regStats();

    void setActiveThreads(std::list<ThreadID> *at_ptr);

    void drainSanityCheck() const;
    bool isDrained() const;
    void takeOverFrom();

    int entryAmount(ThreadID num_threads);
    void removeEntries(ThreadID tid);
    void resetEntries();
    void resizeEntries(unsigned size, ThreadID tid);

    void tick();
    void tick(ThreadID tid)
    { thread[tid].tick(); }

    void insertLoad(DynInstPtr &load_inst);
    void insertStore(DynInstPtr &store_inst);

    Fault executeLoad(DynInstPtr &inst);

    Fault executeStore(DynInstPtr &inst);

    void commitLoads(InstSeqNum &youngest_inst, ThreadID tid)
    { thread[tid].commitLoads(youngest_inst); }

    void commitStores(InstSeqNum &youngest_inst, ThreadID tid)
    { thread[tid].commitStores(youngest_inst); }

    void writebackStores();
    void writebackStores(ThreadID tid);

    void squash(const InstSeqNum &squashed_num, ThreadID tid)
    { thread[tid].squash(squashed_num); }

    bool violation();
    bool violation(ThreadID tid)
    { return thread[tid].violation(); }

    DynInstPtr getMemDepViolator(ThreadID tid)
    { return thread[tid].getMemDepViolator(); }

    int getLoadHead(ThreadID tid)
    { return thread[tid].getLoadHead(); }

    InstSeqNum getLoadHeadSeqNum(ThreadID tid)
    {
        return thread[tid].getLoadHeadSeqNum();
    }

    int getStoreHead(ThreadID tid)
    { return thread[tid].getStoreHead(); }

    InstSeqNum getStoreHeadSeqNum(ThreadID tid)
    {
        return thread[tid].getStoreHeadSeqNum();
    }

    int getCount();
    int getCount(ThreadID tid)
    { return thread[tid].getCount(); }

    int numLoads();
    int numLoads(ThreadID tid)
    { return thread[tid].numLoads(); }

    int numStores();
    int numStores(ThreadID tid)
    { return thread[tid].numStores(); }

    unsigned numFreeLoadEntries();

    unsigned numFreeStoreEntries();

    unsigned numFreeEntries(ThreadID tid);

    unsigned numFreeLoadEntries(ThreadID tid);

    unsigned numFreeStoreEntries(ThreadID tid);

    bool isFull();
    bool isFull(ThreadID tid);

    bool isEmpty() const;
    bool lqEmpty() const;
    bool sqEmpty() const;

    bool lqFull();
    bool lqFull(ThreadID tid);

    bool sqFull();
    bool sqFull(ThreadID tid);

    bool isStalled();
    bool isStalled(ThreadID tid);

    bool hasStoresToWB();

    bool hasStoresToWB(ThreadID tid)
    { return thread[tid].hasStoresToWB(); }

    int numStoresToWB(ThreadID tid)
    { return thread[tid].numStoresToWB(); }

    bool willWB();
    bool willWB(ThreadID tid)
    { return thread[tid].willWB(); }

    void dumpInsts() const;
    void dumpInsts(ThreadID tid) const
    { thread[tid].dumpInsts(); }

    Fault read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
               int load_idx);

    Fault write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
                uint8_t *data, int store_idx);

    void recvReqRetry();

    bool recvTimingResp(PacketPtr pkt);

    void recvTimingSnoopReq(PacketPtr pkt);

    O3CPU *cpu;

    IEW *iewStage;

  protected:
    LSQPolicy lsqPolicy;

    LSQUnit *thread;

    std::list<ThreadID> *activeThreads;

    unsigned LQEntries;
    unsigned SQEntries;

    unsigned maxLQEntries;

    unsigned maxSQEntries;

    ThreadID numThreads;
};

template <class Impl>
Fault
LSQ<Impl>::read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
                int load_idx)
{
    ThreadID tid = cpu->contextToThread(req->contextId());

    return thread[tid].read(req, sreqLow, sreqHigh, load_idx);
}

template <class Impl>
Fault
LSQ<Impl>::write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
                 uint8_t *data, int store_idx)
{
    ThreadID tid = cpu->contextToThread(req->contextId());

    return thread[tid].write(req, sreqLow, sreqHigh, data, store_idx);
}

#endif // __CPU_O3_LSQ_HH__