LSQUnit< Impl > Class Template Reference

Class that implements the actual LQ and SQ for each specific thread. More...

#include <lsq_unit.hh>

Classes
class	LSQSenderState
	Derived class to hold any sender state the LSQ needs. More...
struct	SQEntry
class	WritebackEvent
	Writeback event, specifically for when stores forward data to loads. More...

Public Types
typedef Impl::O3CPU	O3CPU
typedef Impl::DynInstPtr	DynInstPtr
typedef Impl::CPUPol::IEW	IEW
typedef Impl::CPUPol::LSQ	LSQ
typedef Impl::CPUPol::IssueStruct	IssueStruct

Public Member Functions
	LSQUnit ()
	Constructs an LSQ unit. More...
void	init (O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params, LSQ *lsq_ptr, unsigned maxLQEntries, unsigned maxSQEntries, unsigned id)
	Initializes the LSQ unit with the specified number of entries. More...
std::string	name () const
	Returns the name of the LSQ unit. More...
void	regStats ()
	Registers statistics. More...
void	setDcachePort (MasterPort *dcache_port)
	Sets the pointer to the dcache port. More...
void	drainSanityCheck () const
	Perform sanity checks after a drain. More...
void	takeOverFrom ()
	Takes over from another CPU's thread. More...
void	tick ()
	Ticks the LSQ unit, which in this case only resets the number of used cache ports. More...
void	insert (DynInstPtr &inst)
	Inserts an instruction. More...
void	insertLoad (DynInstPtr &load_inst)
	Inserts a load instruction. More...
void	insertStore (DynInstPtr &store_inst)
	Inserts a store instruction. More...
Fault	checkViolations (int load_idx, DynInstPtr &inst)
	Check for ordering violations in the LSQ. More...
void	checkSnoop (PacketPtr pkt)
	Check if an incoming invalidate hits in the lsq on a load that might have issued out of order wrt another load beacuse of the intermediate invalidate. More...
Fault	executeLoad (DynInstPtr &inst)
	Executes a load instruction. More...
Fault	executeLoad (int lq_idx)
Fault	executeStore (DynInstPtr &inst)
	Executes a store instruction. More...
void	commitLoad ()
	Commits the head load. More...
void	commitLoads (InstSeqNum &youngest_inst)
	Commits loads older than a specific sequence number. More...
void	commitStores (InstSeqNum &youngest_inst)
	Commits stores older than a specific sequence number. More...
void	writebackStores ()
	Writes back stores. More...
void	completeDataAccess (PacketPtr pkt)
	Completes the data access that has been returned from the memory system. More...
void	clearLQ ()
	Clears all the entries in the LQ. More...
void	clearSQ ()
	Clears all the entries in the SQ. More...
void	resizeLQ (unsigned size)
	Resizes the LQ to a given size. More...
void	resizeSQ (unsigned size)
	Resizes the SQ to a given size. More...
void	squash (const InstSeqNum &squashed_num)
	Squashes all instructions younger than a specific sequence number. More...
bool	violation ()
	Returns if there is a memory ordering violation. More...
DynInstPtr	getMemDepViolator ()
	Returns the memory ordering violator. More...
unsigned	numFreeLoadEntries ()
	Returns the number of free LQ entries. More...
unsigned	numFreeStoreEntries ()
	Returns the number of free SQ entries. More...
int	numLoads ()
	Returns the number of loads in the LQ. More...
int	numStores ()
	Returns the number of stores in the SQ. More...
bool	isFull ()
	Returns if either the LQ or SQ is full. More...
bool	isEmpty () const
	Returns if both the LQ and SQ are empty. More...
bool	lqFull ()
	Returns if the LQ is full. More...
bool	sqFull ()
	Returns if the SQ is full. More...
bool	lqEmpty () const
	Returns if the LQ is empty. More...
bool	sqEmpty () const
	Returns if the SQ is empty. More...
unsigned	getCount ()
	Returns the number of instructions in the LSQ. More...
bool	hasStoresToWB ()
	Returns if there are any stores to writeback. More...
int	numStoresToWB ()
	Returns the number of stores to writeback. More...
bool	willWB ()
	Returns if the LSQ unit will writeback on this cycle. More...
void	recvRetry ()
	Handles doing the retry. More...
void	dumpInsts () const
	Debugging function to dump instructions in the LSQ. More...
Fault	read (Request *req, Request *sreqLow, Request *sreqHigh, int load_idx)
	Executes the load at the given index. More...
Fault	write (Request *req, Request *sreqLow, Request *sreqHigh, uint8_t *data, int store_idx)
	Executes the store at the given index. More...
int	getLoadHead ()
	Returns the index of the head load instruction. More...
InstSeqNum	getLoadHeadSeqNum ()
	Returns the sequence number of the head load instruction. More...
int	getStoreHead ()
	Returns the index of the head store instruction. More...
InstSeqNum	getStoreHeadSeqNum ()
	Returns the sequence number of the head store instruction. More...
bool	isStalled ()
	Returns whether or not the LSQ unit is stalled. More...

Private Member Functions
void	resetState ()
	Reset the LSQ state. More...
void	writeback (DynInstPtr &inst, PacketPtr pkt)
	Writes back the instruction, sending it to IEW. More...
void	writebackPendingStore ()
	Writes back a store that couldn't be completed the previous cycle. More...
void	storePostSend (PacketPtr pkt)
	Handles completing the send of a store to memory. More...
void	completeStore (int store_idx)
	Completes the store at the specified index. More...
bool	sendStore (PacketPtr data_pkt)
	Attempts to send a store to the cache. More...
void	incrStIdx (int &store_idx) const
	Increments the given store index (circular queue). More...
void	decrStIdx (int &store_idx) const
	Decrements the given store index (circular queue). More...
void	incrLdIdx (int &load_idx) const
	Increments the given load index (circular queue). More...
void	decrLdIdx (int &load_idx) const
	Decrements the given load index (circular queue). More...

Private Attributes
O3CPU *	cpu
	Pointer to the CPU. More...
IEW *	iewStage
	Pointer to the IEW stage. More...
LSQ *	lsq
	Pointer to the LSQ. More...
MasterPort *	dcachePort
	Pointer to the dcache port. More...
ThreadID	lsqID
	The LSQUnit thread id. More...
std::vector< SQEntry >	storeQueue
	The store queue. More...
std::vector< DynInstPtr >	loadQueue
	The load queue. More...
unsigned	LQEntries
	The number of LQ entries, plus a sentinel entry (circular queue). More...
unsigned	SQEntries
	The number of SQ entries, plus a sentinel entry (circular queue). More...
unsigned	depCheckShift
	The number of places to shift addresses in the LSQ before checking for dependency violations. More...
bool	checkLoads
	Should loads be checked for dependency issues. More...
int	loads
	The number of load instructions in the LQ. More...
int	stores
	The number of store instructions in the SQ. More...
int	storesToWB
	The number of store instructions in the SQ waiting to writeback. More...
int	loadHead
	The index of the head instruction in the LQ. More...
int	loadTail
	The index of the tail instruction in the LQ. More...
int	storeHead
	The index of the head instruction in the SQ. More...
int	storeWBIdx
	The index of the first instruction that may be ready to be written back, and has not yet been written back. More...
int	storeTail
	The index of the tail instruction in the SQ. More...
int	cacheStorePorts
	The number of cache ports available each cycle (stores only). More...
int	usedStorePorts
	The number of used cache ports in this cycle by stores. More...
Addr	cacheBlockMask
	Address Mask for a cache block (e.g. More...
TimeBuffer< IssueStruct >::wire	fromIssue
	Wire to read information from the issue stage time queue. More...
bool	stalled
	Whether or not the LSQ is stalled. More...
InstSeqNum	stallingStoreIsn
	The store that causes the stall due to partial store to load forwarding. More...
int	stallingLoadIdx
	The index of the above store. More...
PacketPtr	retryPkt
	The packet that needs to be retried. More...
bool	isStoreBlocked
	Whehter or not a store is blocked due to the memory system. More...
bool	storeInFlight
	Whether or not a store is in flight. More...
DynInstPtr	memDepViolator
	The oldest load that caused a memory ordering violation. More...
bool	hasPendingPkt
	Whether or not there is a packet that couldn't be sent because of a lack of cache ports. More...
PacketPtr	pendingPkt
	The packet that is pending free cache ports. More...
bool	needsTSO
	Flag for memory model. More...
Stats::Scalar	lsqForwLoads
	Total number of loads forwaded from LSQ stores. More...
Stats::Scalar	invAddrLoads
	Total number of loads ignored due to invalid addresses. More...
Stats::Scalar	lsqSquashedLoads
	Total number of squashed loads. More...
Stats::Scalar	lsqIgnoredResponses
	Total number of responses from the memory system that are ignored due to the instruction already being squashed. More...
Stats::Scalar	lsqMemOrderViolation
	Tota number of memory ordering violations. More...
Stats::Scalar	lsqSquashedStores
	Total number of squashed stores. More...
Stats::Scalar	invAddrSwpfs
	Total number of software prefetches ignored due to invalid addresses. More...
Stats::Scalar	lsqBlockedLoads
	Ready loads blocked due to partial store-forwarding. More...
Stats::Scalar	lsqRescheduledLoads
	Number of loads that were rescheduled. More...
Stats::Scalar	lsqCacheBlocked
	Number of times the LSQ is blocked due to the cache. More...

Detailed Description

template<class Impl>
class LSQUnit< Impl >

Class that implements the actual LQ and SQ for each specific thread.

Both are circular queues; load entries are freed upon committing, while store entries are freed once they writeback. The LSQUnit tracks if there are memory ordering violations, and also detects partial load to store forwarding cases (a store only has part of a load's data) that requires the load to wait until the store writes back. In the former case it holds onto the instruction until the dependence unit looks at it, and in the latter it stalls the LSQ until the store writes back. At that point the load is replayed.

Definition at line 79 of file lsq_unit.hh.

Member Typedef Documentation

template<class Impl >

typedef Impl::DynInstPtr LSQUnit< Impl >::DynInstPtr

Definition at line 82 of file lsq_unit.hh.

template<class Impl >

typedef Impl::CPUPol::IEW LSQUnit< Impl >::IEW

Definition at line 83 of file lsq_unit.hh.

template<class Impl >

typedef Impl::CPUPol::IssueStruct LSQUnit< Impl >::IssueStruct

Definition at line 85 of file lsq_unit.hh.

template<class Impl >

typedef Impl::CPUPol::LSQ LSQUnit< Impl >::LSQ

Definition at line 84 of file lsq_unit.hh.

template<class Impl >

typedef Impl::O3CPU LSQUnit< Impl >::O3CPU

Definition at line 81 of file lsq_unit.hh.

Constructor & Destructor Documentation

template<class Impl >

LSQUnit< Impl >::LSQUnit

(

)

Constructs an LSQ unit.

init() must be called prior to use.

Definition at line 144 of file lsq_unit_impl.hh.

Member Function Documentation

template<class Impl >

void LSQUnit< Impl >::checkSnoop

(

PacketPtr

pkt

)

Check if an incoming invalidate hits in the lsq on a load that might have issued out of order wrt another load beacuse of the intermediate invalidate.

Definition at line 436 of file lsq_unit_impl.hh.

References DPRINTF, Packet::getAddr(), AlphaISA::handleLockedSnoop(), AlphaISA::handleLockedSnoopHit(), Packet::isInvalidate(), Request::LLSC, and X86ISA::x.

template<class Impl >

Fault LSQUnit< Impl >::checkViolations	(	int	load_idx,
		DynInstPtr &	inst
	)

Check for ordering violations in the LSQ.

For a store squash if we ever find a conflicting load. For a load, only squash if we an external snoop invalidate has been seen for that load address

Parameters

load_idx	index to start checking at
inst	the instruction to check

Todo:

in theory you only need to check an instruction that has executed however, there isn't a good way in the pipeline at the moment to check all instructions that will execute before the store writes back. Thus, like the implementation that came before it, we're overly conservative.

Definition at line 527 of file lsq_unit_impl.hh.

References DPRINTF, and NoFault.

template<class Impl >

void LSQUnit< Impl >::clearLQ

(

)

Clears all the entries in the LQ.

Definition at line 271 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::clearSQ

(

)

Clears all the entries in the SQ.

Definition at line 278 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::commitLoad

(

)

Commits the head load.

Definition at line 709 of file lsq_unit_impl.hh.

References DPRINTF.

template<class Impl >

void LSQUnit< Impl >::commitLoads

(

InstSeqNum &

youngest_inst

)

Commits loads older than a specific sequence number.

Definition at line 725 of file lsq_unit_impl.hh.

Referenced by LSQ< Impl >::commitLoads().

template<class Impl >

void LSQUnit< Impl >::commitStores

(

InstSeqNum &

youngest_inst

)

Commits stores older than a specific sequence number.

Definition at line 736 of file lsq_unit_impl.hh.

References DPRINTF.

Referenced by LSQ< Impl >::commitStores().

template<class Impl >

void LSQUnit< Impl >::completeDataAccess

(

PacketPtr

pkt

)

Completes the data access that has been returned from the memory system.

Definition at line 95 of file lsq_unit_impl.hh.

References LSQUnit< Impl >::LSQSenderState::cacheBlocked, LSQUnit< Impl >::LSQSenderState::complete(), LSQUnit< Impl >::completeStore(), LSQUnit< Impl >::cpu, DPRINTF, AlphaISA::HasUnalignedMemAcc, LSQUnit< Impl >::LSQSenderState::idx, LSQUnit< Impl >::LSQSenderState::inst, LSQUnit< Impl >::LSQSenderState::isLoad, LSQUnit< Impl >::LSQSenderState::isSplit, LSQUnit< Impl >::LSQSenderState::mainPkt, LSQUnit< Impl >::LSQSenderState::noWB, Packet::req, Packet::senderState, Request::setAccessLatency(), and LSQUnit< Impl >::writeback().

template<class Impl >

void LSQUnit< Impl >::completeStore ( int  store_idx )

private

Completes the store at the specified index.

Definition at line 1162 of file lsq_unit_impl.hh.

References curTick(), DPRINTF, and DTRACE.

Referenced by LSQUnit< Impl >::completeDataAccess().

template<class Impl >

void LSQUnit< Impl >::decrLdIdx ( int &  load_idx ) const

inlineprivate

Decrements the given load index (circular queue).

Definition at line 1295 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::decrStIdx ( int &  store_idx ) const

inlineprivate

Decrements the given store index (circular queue).

Definition at line 1279 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::drainSanityCheck

(

)

const

Perform sanity checks after a drain.

Definition at line 285 of file lsq_unit_impl.hh.

References ArmISA::i.

template<class Impl >

void LSQUnit< Impl >::dumpInsts

(

)

const

Debugging function to dump instructions in the LSQ.

Definition at line 1303 of file lsq_unit_impl.hh.

References cprintf().

Referenced by LSQ< Impl >::dumpInsts().

template<class Impl >

Fault LSQUnit< Impl >::executeLoad

(

DynInstPtr &

inst

)

Executes a load instruction.

Definition at line 607 of file lsq_unit_impl.hh.

References DPRINTF, and NoFault.

template<class Impl >

Fault LSQUnit< Impl >::executeLoad ( int  lq_idx )

inline

Definition at line 142 of file lsq_unit.hh.

References NoFault, and panic.

template<class Impl >

Fault LSQUnit< Impl >::executeStore

(

DynInstPtr &

inst

)

Executes a store instruction.

Definition at line 656 of file lsq_unit_impl.hh.

References DPRINTF, NoFault, and X86ISA::size().

template<class Impl >

unsigned LSQUnit< Impl >::getCount ( )

inline

Returns the number of instructions in the LSQ.

Definition at line 215 of file lsq_unit.hh.

References LSQUnit< Impl >::loads, and LSQUnit< Impl >::stores.

Referenced by LSQ< Impl >::getCount().

template<class Impl >

int LSQUnit< Impl >::getLoadHead ( )

inline

Returns the index of the head load instruction.

Definition at line 521 of file lsq_unit.hh.

References LSQUnit< Impl >::loadHead.

Referenced by LSQ< Impl >::getLoadHead().

template<class Impl >

InstSeqNum LSQUnit< Impl >::getLoadHeadSeqNum ( )

inline

Returns the sequence number of the head load instruction.

Definition at line 523 of file lsq_unit.hh.

References LSQUnit< Impl >::loadHead, and LSQUnit< Impl >::loadQueue.

Referenced by LSQ< Impl >::getLoadHeadSeqNum().

template<class Impl >

Impl::DynInstPtr LSQUnit< Impl >::getMemDepViolator

(

)

Returns the memory ordering violator.

Definition at line 404 of file lsq_unit_impl.hh.

Referenced by LSQ< Impl >::getMemDepViolator().

template<class Impl >

int LSQUnit< Impl >::getStoreHead ( )

inline

Returns the index of the head store instruction.

Definition at line 534 of file lsq_unit.hh.

References LSQUnit< Impl >::storeHead.

Referenced by LSQ< Impl >::getStoreHead().

template<class Impl >

InstSeqNum LSQUnit< Impl >::getStoreHeadSeqNum ( )

inline

Returns the sequence number of the head store instruction.

Definition at line 536 of file lsq_unit.hh.

References LSQUnit< Impl >::storeHead, and LSQUnit< Impl >::storeQueue.

Referenced by LSQ< Impl >::getStoreHeadSeqNum().

template<class Impl >

bool LSQUnit< Impl >::hasStoresToWB ( )

inline

Returns if there are any stores to writeback.

Definition at line 218 of file lsq_unit.hh.

References LSQUnit< Impl >::storesToWB.

Referenced by LSQ< Impl >::hasStoresToWB().

template<class Impl >

void LSQUnit< Impl >::incrLdIdx ( int &  load_idx ) const

inlineprivate

Increments the given load index (circular queue).

Definition at line 1287 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::incrStIdx ( int &  store_idx ) const

inlineprivate

Increments the given store index (circular queue).

Definition at line 1271 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::init	(	O3CPU *	cpu_ptr,
		IEW *	iew_ptr,
		DerivO3CPUParams *	params,
		LSQ *	lsq_ptr,
		unsigned	maxLQEntries,
		unsigned	maxSQEntries,
		unsigned	id
	)

Initializes the LSQ unit with the specified number of entries.

Definition at line 153 of file lsq_unit_impl.hh.

References DPRINTF, and SparcISA::id.

Referenced by LSQ< Impl >::LSQ().

template<class Impl >

void LSQUnit< Impl >::insert

(

DynInstPtr &

inst

)

Inserts an instruction.

Definition at line 341 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::insertLoad

(

DynInstPtr &

load_inst

)

Inserts a load instruction.

Definition at line 358 of file lsq_unit_impl.hh.

References DPRINTF.

template<class Impl >

void LSQUnit< Impl >::insertStore

(

DynInstPtr &

store_inst

)

Inserts a store instruction.

Definition at line 383 of file lsq_unit_impl.hh.

References DPRINTF.

template<class Impl >

bool LSQUnit< Impl >::isEmpty ( ) const

inline

Returns if both the LQ and SQ are empty.

Definition at line 200 of file lsq_unit.hh.

References LSQUnit< Impl >::lqEmpty(), and LSQUnit< Impl >::sqEmpty().

template<class Impl >

bool LSQUnit< Impl >::isFull ( )

inline

Returns if either the LQ or SQ is full.

Definition at line 197 of file lsq_unit.hh.

References LSQUnit< Impl >::lqFull(), and LSQUnit< Impl >::sqFull().

template<class Impl >

bool LSQUnit< Impl >::isStalled ( )

inline

Returns whether or not the LSQ unit is stalled.

Definition at line 547 of file lsq_unit.hh.

References LSQUnit< Impl >::stalled.

template<class Impl >

bool LSQUnit< Impl >::lqEmpty ( ) const

inline

Returns if the LQ is empty.

Definition at line 209 of file lsq_unit.hh.

References LSQUnit< Impl >::loads.

Referenced by LSQUnit< Impl >::isEmpty().

template<class Impl >

bool LSQUnit< Impl >::lqFull ( )

inline

Returns if the LQ is full.

Definition at line 203 of file lsq_unit.hh.

References LSQUnit< Impl >::loads, and LSQUnit< Impl >::LQEntries.

Referenced by LSQUnit< Impl >::isFull().

template<class Impl >

std::string LSQUnit< Impl >::name

(

)

const

Returns the name of the LSQ unit.

Definition at line 208 of file lsq_unit_impl.hh.

template<class Impl >

unsigned LSQUnit< Impl >::numFreeLoadEntries

(

)

Returns the number of free LQ entries.

Definition at line 415 of file lsq_unit_impl.hh.

References DPRINTF.

template<class Impl >

unsigned LSQUnit< Impl >::numFreeStoreEntries

(

)

Returns the number of free SQ entries.

Definition at line 425 of file lsq_unit_impl.hh.

References DPRINTF.

template<class Impl >

int LSQUnit< Impl >::numLoads ( )

inline

Returns the number of loads in the LQ.

Definition at line 191 of file lsq_unit.hh.

References LSQUnit< Impl >::loads.

Referenced by LSQ< Impl >::numLoads().

template<class Impl >

int LSQUnit< Impl >::numStores ( )

inline

Returns the number of stores in the SQ.

Definition at line 194 of file lsq_unit.hh.

References LSQUnit< Impl >::stores.

Referenced by LSQ< Impl >::numStores().

template<class Impl >

int LSQUnit< Impl >::numStoresToWB ( )

inline

Returns the number of stores to writeback.

Definition at line 221 of file lsq_unit.hh.

References LSQUnit< Impl >::storesToWB.

Referenced by LSQ< Impl >::numStoresToWB().

template<class Impl >

Fault LSQUnit< Impl >::read	(	Request *	req,
		Request *	sreqLow,
		Request *	sreqHigh,
		int	load_idx
	)

Executes the load at the given index.

Definition at line 552 of file lsq_unit.hh.

References LSQUnit< Impl >::LSQSenderState::cacheBlocked, LSQUnit< Impl >::LSQSenderState::complete(), Packet::createRead(), curTick(), Packet::dataStatic(), DPRINTF, Request::getPaddr(), Request::getSize(), Request::getVaddr(), GenericISA::handleIprRead(), AlphaISA::handleLockedRead(), AlphaISA::HasUnalignedMemAcc, LSQUnit< Impl >::LSQSenderState::idx, if(), LSQUnit< Impl >::LSQSenderState::inst, Request::isLLSC(), LSQUnit< Impl >::LSQSenderState::isLoad, Request::isMmappedIpr(), LSQUnit< Impl >::LSQSenderState::isSplit, Request::isStrictlyOrdered(), LSQUnit< Impl >::LSQSenderState::mainPkt, NoFault, LSQUnit< Impl >::LSQSenderState::outstanding, panic, MemCmd::ReadReq, and Packet::senderState.

template<class Impl >

void LSQUnit< Impl >::recvRetry

(

)

Handles doing the retry.

Definition at line 1236 of file lsq_unit_impl.hh.

References DPRINTF, AlphaISA::HasUnalignedMemAcc, LSQUnit< Impl >::LSQSenderState::pendingPacket, and LSQUnit< Impl >::LSQSenderState::pktToSend.

template<class Impl >

void LSQUnit< Impl >::regStats

(

)

Registers statistics.

Definition at line 219 of file lsq_unit_impl.hh.

References name().

template<class Impl >

void LSQUnit< Impl >::resetState ( )

private

Reset the LSQ state.

Definition at line 188 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::resizeLQ

(

unsigned

size

)

Resizes the LQ to a given size.

Definition at line 303 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::resizeSQ

(

unsigned

size

)

Resizes the SQ to a given size.

Definition at line 323 of file lsq_unit_impl.hh.

template<class Impl >

bool LSQUnit< Impl >::sendStore ( PacketPtr  data_pkt )

private

Attempts to send a store to the cache.

Definition at line 1221 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::setDcachePort

(

MasterPort *

dcache_port

)

Sets the pointer to the dcache port.

Definition at line 264 of file lsq_unit_impl.hh.

Referenced by LSQ< Impl >::LSQ().

template<class Impl >

bool LSQUnit< Impl >::sqEmpty ( ) const

inline

Returns if the SQ is empty.

Definition at line 212 of file lsq_unit.hh.

References LSQUnit< Impl >::stores.

Referenced by LSQUnit< Impl >::isEmpty().

template<class Impl >

bool LSQUnit< Impl >::sqFull ( )

inline

Returns if the SQ is full.

Definition at line 206 of file lsq_unit.hh.

References LSQUnit< Impl >::SQEntries, and LSQUnit< Impl >::stores.

Referenced by LSQUnit< Impl >::isFull().

template<class Impl >

void LSQUnit< Impl >::squash

(

const InstSeqNum &

squashed_num

)

Squashes all instructions younger than a specific sequence number.

Definition at line 999 of file lsq_unit_impl.hh.

References DPRINTF, AlphaISA::HasUnalignedMemAcc, and panic.

Referenced by LSQ< Impl >::squash().

template<class Impl >

void LSQUnit< Impl >::storePostSend ( PacketPtr  pkt )

private

Handles completing the send of a store to memory.

Definition at line 1089 of file lsq_unit_impl.hh.

References DPRINTF.

template<class Impl >

void LSQUnit< Impl >::takeOverFrom

(

)

Takes over from another CPU's thread.

Definition at line 296 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::tick ( )

inline

Ticks the LSQ unit, which in this case only resets the number of used cache ports.

Todo:

: Move the number of used ports up to the LSQ level so it can be shared by all LSQ units.

Definition at line 116 of file lsq_unit.hh.

References LSQUnit< Impl >::usedStorePorts.

Referenced by LSQ< Impl >::tick().

template<class Impl >

bool LSQUnit< Impl >::violation ( )

inline

Returns if there is a memory ordering violation.

Value is reset upon call to getMemDepViolator().

Definition at line 179 of file lsq_unit.hh.

References LSQUnit< Impl >::memDepViolator.

Referenced by LSQ< Impl >::violation().

template<class Impl >

bool LSQUnit< Impl >::willWB ( )

inline

Returns if the LSQ unit will writeback on this cycle.

Definition at line 224 of file lsq_unit.hh.

References LSQUnit< Impl >::isStoreBlocked, LSQUnit< Impl >::storeQueue, and LSQUnit< Impl >::storeWBIdx.

Referenced by LSQ< Impl >::willWB().

template<class Impl >

Fault LSQUnit< Impl >::write	(	Request *	req,
		Request *	sreqLow,
		Request *	sreqHigh,
		uint8_t *	data,
		int	store_idx
	)

Executes the store at the given index.

Definition at line 882 of file lsq_unit.hh.

References Request::CACHE_BLOCK_ZERO, DPRINTF, Request::getFlags(), Request::getPaddr(), Request::getSize(), AlphaISA::HasUnalignedMemAcc, NoFault, and X86ISA::size().

template<class Impl >

void LSQUnit< Impl >::writeback ( DynInstPtr &  inst, PacketPtr  pkt  )

private

Writes back the instruction, sending it to IEW.

Definition at line 1121 of file lsq_unit_impl.hh.

References DPRINTF, and NoFault.

Referenced by LSQUnit< Impl >::completeDataAccess().

template<class Impl >

void LSQUnit< Impl >::writebackPendingStore ( )

private

Writes back a store that couldn't be completed the previous cycle.

Definition at line 766 of file lsq_unit_impl.hh.

template<class Impl >

void LSQUnit< Impl >::writebackStores

(

)

Writes back stores.

Definition at line 782 of file lsq_unit_impl.hh.

References Packet::createWrite(), curTick(), Packet::dataStatic(), DPRINTF, Request::getPaddr(), Request::getSize(), GenericISA::handleIprWrite(), AlphaISA::handleLockedWrite(), AlphaISA::HasUnalignedMemAcc, LSQUnit< Impl >::LSQSenderState::idx, LSQUnit< Impl >::LSQSenderState::inst, LSQUnit< Impl >::LSQSenderState::isLoad, Request::isMmappedIpr(), LSQUnit< Impl >::LSQSenderState::isSplit, LSQUnit< Impl >::LSQSenderState::noWB, LSQUnit< Impl >::LSQSenderState::outstanding, LSQUnit< Impl >::LSQSenderState::pendingPacket, LSQUnit< Impl >::LSQSenderState::pktToSend, Packet::req, Packet::senderState, and X86ISA::size().

Member Data Documentation

template<class Impl >

Addr LSQUnit< Impl >::cacheBlockMask

private

Address Mask for a cache block (e.g.

~(cache_block_size-1))

Definition at line 441 of file lsq_unit.hh.

template<class Impl >

int LSQUnit< Impl >::cacheStorePorts

private

The number of cache ports available each cycle (stores only).

Todo:

Consider moving to a more advanced model with write vs read ports

Definition at line 433 of file lsq_unit.hh.

template<class Impl >

bool LSQUnit< Impl >::checkLoads

private

Should loads be checked for dependency issues.

Definition at line 408 of file lsq_unit.hh.

template<class Impl >

O3CPU* LSQUnit< Impl >::cpu

private

Pointer to the CPU.

Definition at line 265 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::completeDataAccess().

template<class Impl >

MasterPort* LSQUnit< Impl >::dcachePort

private

Pointer to the dcache port.

Used only for sending.

Definition at line 274 of file lsq_unit.hh.

template<class Impl >

unsigned LSQUnit< Impl >::depCheckShift

private

The number of places to shift addresses in the LSQ before checking for dependency violations.

Definition at line 405 of file lsq_unit.hh.

template<class Impl >

TimeBuffer<IssueStruct>::wire LSQUnit< Impl >::fromIssue

private

Wire to read information from the issue stage time queue.

Definition at line 444 of file lsq_unit.hh.

template<class Impl >

bool LSQUnit< Impl >::hasPendingPkt

private

Whether or not there is a packet that couldn't be sent because of a lack of cache ports.

Definition at line 469 of file lsq_unit.hh.

template<class Impl >

IEW* LSQUnit< Impl >::iewStage

private

Pointer to the IEW stage.

Definition at line 268 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::invAddrLoads

private

Total number of loads ignored due to invalid addresses.

Definition at line 484 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::invAddrSwpfs

private

Total number of software prefetches ignored due to invalid addresses.

Definition at line 500 of file lsq_unit.hh.

template<class Impl >

bool LSQUnit< Impl >::isStoreBlocked

private

Whehter or not a store is blocked due to the memory system.

Definition at line 459 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::willWB().

template<class Impl >

int LSQUnit< Impl >::loadHead

private

The index of the head instruction in the LQ.

Definition at line 418 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::getLoadHead(), and LSQUnit< Impl >::getLoadHeadSeqNum().

template<class Impl >

std::vector<DynInstPtr> LSQUnit< Impl >::loadQueue

private

The load queue.

Definition at line 391 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::getLoadHeadSeqNum().

template<class Impl >

int LSQUnit< Impl >::loads

private

The number of load instructions in the LQ.

Definition at line 411 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::getCount(), LSQUnit< Impl >::lqEmpty(), LSQUnit< Impl >::lqFull(), and LSQUnit< Impl >::numLoads().

template<class Impl >

int LSQUnit< Impl >::loadTail

private

The index of the tail instruction in the LQ.

Definition at line 420 of file lsq_unit.hh.

template<class Impl >

unsigned LSQUnit< Impl >::LQEntries

private

The number of LQ entries, plus a sentinel entry (circular queue).

Todo:

: Consider having var that records the true number of LQ entries.

Definition at line 396 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::lqFull().

template<class Impl >

LSQ* LSQUnit< Impl >::lsq

private

Pointer to the LSQ.

Definition at line 271 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqBlockedLoads

private

Ready loads blocked due to partial store-forwarding.

Definition at line 503 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqCacheBlocked

private

Number of times the LSQ is blocked due to the cache.

Definition at line 509 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqForwLoads

private

Total number of loads forwaded from LSQ stores.

Definition at line 481 of file lsq_unit.hh.

template<class Impl >

ThreadID LSQUnit< Impl >::lsqID

private

The LSQUnit thread id.

Definition at line 385 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqIgnoredResponses

private

Total number of responses from the memory system that are ignored due to the instruction already being squashed.

Definition at line 491 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqMemOrderViolation

private

Tota number of memory ordering violations.

Definition at line 494 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqRescheduledLoads

private

Number of loads that were rescheduled.

Definition at line 506 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqSquashedLoads

private

Total number of squashed loads.

Definition at line 487 of file lsq_unit.hh.

template<class Impl >

Stats::Scalar LSQUnit< Impl >::lsqSquashedStores

private

Total number of squashed stores.

Definition at line 497 of file lsq_unit.hh.

template<class Impl >

DynInstPtr LSQUnit< Impl >::memDepViolator

private

The oldest load that caused a memory ordering violation.

Definition at line 465 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::violation().

template<class Impl >

bool LSQUnit< Impl >::needsTSO

private

Flag for memory model.

Definition at line 475 of file lsq_unit.hh.

template<class Impl >

PacketPtr LSQUnit< Impl >::pendingPkt

private

The packet that is pending free cache ports.

Definition at line 472 of file lsq_unit.hh.

template<class Impl >

PacketPtr LSQUnit< Impl >::retryPkt

private

The packet that needs to be retried.

Definition at line 456 of file lsq_unit.hh.

template<class Impl >

unsigned LSQUnit< Impl >::SQEntries

private

The number of SQ entries, plus a sentinel entry (circular queue).

Todo:

: Consider having var that records the true number of SQ entries.

Definition at line 400 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::sqFull().

template<class Impl >

bool LSQUnit< Impl >::stalled

private

Whether or not the LSQ is stalled.

Definition at line 447 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::isStalled().

template<class Impl >

int LSQUnit< Impl >::stallingLoadIdx

private

The index of the above store.

Definition at line 453 of file lsq_unit.hh.

template<class Impl >

InstSeqNum LSQUnit< Impl >::stallingStoreIsn

private

The store that causes the stall due to partial store to load forwarding.

Definition at line 451 of file lsq_unit.hh.

template<class Impl >

int LSQUnit< Impl >::storeHead

private

The index of the head instruction in the SQ.

Definition at line 423 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::getStoreHead(), and LSQUnit< Impl >::getStoreHeadSeqNum().

template<class Impl >

bool LSQUnit< Impl >::storeInFlight

private

Whether or not a store is in flight.

Definition at line 462 of file lsq_unit.hh.

template<class Impl >

std::vector<SQEntry> LSQUnit< Impl >::storeQueue

private

The store queue.

Definition at line 388 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::getStoreHeadSeqNum(), and LSQUnit< Impl >::willWB().

template<class Impl >

int LSQUnit< Impl >::stores

private

The number of store instructions in the SQ.

Definition at line 413 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::getCount(), LSQUnit< Impl >::numStores(), LSQUnit< Impl >::sqEmpty(), and LSQUnit< Impl >::sqFull().

template<class Impl >

int LSQUnit< Impl >::storesToWB

private

The number of store instructions in the SQ waiting to writeback.

Definition at line 415 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::hasStoresToWB(), and LSQUnit< Impl >::numStoresToWB().

template<class Impl >

int LSQUnit< Impl >::storeTail

private

The index of the tail instruction in the SQ.

Definition at line 429 of file lsq_unit.hh.

template<class Impl >

int LSQUnit< Impl >::storeWBIdx

private

The index of the first instruction that may be ready to be written back, and has not yet been written back.

Definition at line 427 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::willWB().

template<class Impl >

int LSQUnit< Impl >::usedStorePorts

private

The number of used cache ports in this cycle by stores.

Definition at line 436 of file lsq_unit.hh.

Referenced by LSQUnit< Impl >::tick().

---

The documentation for this class was generated from the following files:

• cpu/o3/lsq_unit.hh
• cpu/o3/lsq_unit_impl.hh