A template-policy based cache. More...

#include <cache.hh>

Inheritance diagram for Cache:

Classes
class	CacheReqPacketQueue
	Override the default behaviour of sendDeferredPacket to enable the memory-side cache port to also send requests based on the current MSHR status. More...

class	CpuSidePort
	The CPU-side port extends the base cache slave port with access functions for functional, atomic and timing requests. More...

class	MemSidePort
	The memory-side port extends the base cache master port with access functions for functional, atomic and timing snoops. More...

Public Member Functions
	Cache (const CacheParams *p)
	Instantiates a basic cache object. More...

virtual	~Cache ()
	Non-default destructor is needed to deallocate memory. More...

void	regStats () override
	Register stats for this object. More...

bool	sendMSHRQueuePacket (MSHR *mshr)
	Take an MSHR, turn it into a suitable downstream packet, and send it out. More...

bool	sendWriteQueuePacket (WriteQueueEntry *wq_entry)
	Similar to sendMSHR, but for a write-queue entry instead. More...

void	serialize (CheckpointOut &cp) const override
	serialize the state of the caches We currently don't support checkpointing cache state, so this panics. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from BaseCache
	BaseCache (const BaseCacheParams *p, unsigned blk_size)

	~BaseCache ()

virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

virtual BaseMasterPort &	getMasterPort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a master port with a given name and index. More...

virtual BaseSlavePort &	getSlavePort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a slave port with a given name and index. More...

unsigned	getBlockSize () const
	Query block size of a cache. More...

const AddrRangeList &	getAddrRanges () const

MSHR *	allocateMissBuffer (PacketPtr pkt, Tick time, bool sched_send=true)

void	allocateWriteBuffer (PacketPtr pkt, Tick time)

bool	isBlocked () const
	Returns true if the cache is blocked for accesses. More...

void	setBlocked (BlockedCause cause)
	Marks the access path of the cache as blocked for the given cause. More...

void	clearBlocked (BlockedCause cause)
	Marks the cache as unblocked for the given cause. More...

void	schedMemSideSendEvent (Tick time)
	Schedule a send event for the memory-side port. More...

void	incMissCount (PacketPtr pkt)

void	incHitCount (PacketPtr pkt)

Public Member Functions inherited from MemObject
const Params *	params () const

	MemObject (const Params *params)

Public Member Functions inherited from ClockedObject
	ClockedObject (const ClockedObjectParams *p)

const Params *	params () const

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Enums::PwrState	pwrState () const

std::string	pwrStateName () const

std::vector< double >	pwrStateWeights () const
	Returns the percentage residency for each power state. More...

void	computeStats ()
	Record stats values like state residency by computing the time difference from previous update. More...

void	pwrState (Enums::PwrState)

void	regStats () override
	Register statistics for this object. More...

Public Member Functions inherited from SimObject
const Params *	params () const

	SimObject (const Params *_params)

virtual	~SimObject ()

virtual const std::string	name () const

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	resetStats ()
	Reset statistics associated with this object. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

virtual void	startup ()
	startup() is the final initialization call before simulation. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from EventManager
	EventManager (EventManager &em)

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick)-1)

void	setCurTick (Tick newVal)

Public Member Functions inherited from Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from Clocked
void	updateClockPeriod () const
	Update the tick to the current tick. More...

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge. More...

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Member Functions
void	promoteWholeLineWrites (PacketPtr pkt)
	Turn line-sized writes into WriteInvalidate transactions. More...

void	writebackTempBlockAtomic ()
	Send the outstanding tempBlock writeback. More...

bool	access (PacketPtr pkt, CacheBlk *&blk, Cycles &lat, PacketList &writebacks)
	Does all the processing necessary to perform the provided request. More...

void	cmpAndSwap (CacheBlk *blk, PacketPtr pkt)
	Handle doing the Compare and Swap function for SPARC. More...

CacheBlk *	allocateBlock (Addr addr, bool is_secure, PacketList &writebacks)
	Find a block frame for new block at address addr targeting the given security space, assuming that the block is not currently in the cache. More...

void	invalidateBlock (CacheBlk *blk)
	Invalidate a cache block. More...

void	maintainClusivity (bool from_cache, CacheBlk *blk)
	Maintain the clusivity of this cache by potentially invalidating a block. More...

CacheBlk *	handleFill (PacketPtr pkt, CacheBlk *blk, PacketList &writebacks, bool allocate)
	Populates a cache block and handles all outstanding requests for the satisfied fill request. More...

bool	allocOnFill (MemCmd cmd) const override
	Determine whether we should allocate on a fill or not. More...

bool	recvTimingReq (PacketPtr pkt)
	Performs the access specified by the request. More...

void	doWritebacks (PacketList &writebacks, Tick forward_time)
	Insert writebacks into the write buffer. More...

void	doWritebacksAtomic (PacketList &writebacks)
	Send writebacks down the memory hierarchy in atomic mode. More...

void	handleUncacheableWriteResp (PacketPtr pkt)
	Handling the special case of uncacheable write responses to make recvTimingResp less cluttered. More...

void	recvTimingResp (PacketPtr pkt)
	Handles a response (cache line fill/write ack) from the bus. More...

void	recvTimingSnoopReq (PacketPtr pkt)
	Snoops bus transactions to maintain coherence. More...

void	recvTimingSnoopResp (PacketPtr pkt)
	Handle a snoop response. More...

Tick	recvAtomic (PacketPtr pkt)
	Performs the access specified by the request. More...

Tick	recvAtomicSnoop (PacketPtr pkt)
	Snoop for the provided request in the cache and return the estimated time taken. More...

void	functionalAccess (PacketPtr pkt, bool fromCpuSide)
	Performs the access specified by the request. More...

void	satisfyRequest (PacketPtr pkt, CacheBlk *blk, bool deferred_response=false, bool pending_downgrade=false)
	Perform any necessary updates to the block and perform any data exchange between the packet and the block. More...

void	doTimingSupplyResponse (PacketPtr req_pkt, const uint8_t *blk_data, bool already_copied, bool pending_inval)

uint32_t	handleSnoop (PacketPtr pkt, CacheBlk *blk, bool is_timing, bool is_deferred, bool pending_inval)
	Perform an upward snoop if needed, and update the block state (possibly invalidating the block). More...

PacketPtr	writebackBlk (CacheBlk *blk)
	Create a writeback request for the given block. More...

PacketPtr	cleanEvictBlk (CacheBlk *blk)
	Create a CleanEvict request for the given block. More...

void	memWriteback () override
	Write back dirty blocks in the cache using functional accesses. More...

void	memInvalidate () override
	Invalidates all blocks in the cache. More...

bool	isDirty () const override
	Determine if there are any dirty blocks in the cache. More...

bool	writebackVisitor (CacheBlk &blk)
	Cache block visitor that writes back dirty cache blocks using functional writes. More...

bool	invalidateVisitor (CacheBlk &blk)
	Cache block visitor that invalidates all blocks in the cache. More...

PacketPtr	createMissPacket (PacketPtr cpu_pkt, CacheBlk *blk, bool needsWritable) const
	Create an appropriate downstream bus request packet for the given parameters. More...

QueueEntry *	getNextQueueEntry ()
	Return the next queue entry to service, either a pending miss from the MSHR queue, a buffered write from the write buffer, or something from the prefetcher. More...

bool	isCachedAbove (PacketPtr pkt, bool is_timing=true) const
	Send up a snoop request and find cached copies. More...

bool	outstandingMisses () const
	Return whether there are any outstanding misses. More...

CacheBlk *	findBlock (Addr addr, bool is_secure) const

bool	inCache (Addr addr, bool is_secure) const override

bool	inMissQueue (Addr addr, bool is_secure) const override

Tick	nextQueueReadyTime () const
	Find next request ready time from among possible sources. More...

Protected Member Functions inherited from BaseCache
void	markInService (MSHR *mshr, bool pending_modified_resp)
	Mark a request as in service (sent downstream in the memory system), effectively making this MSHR the ordering point. More...

void	markInService (WriteQueueEntry *entry)

bool	inRange (Addr addr) const
	Determine if an address is in the ranges covered by this cache. More...

Protected Member Functions inherited from Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain. More...

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Member Functions inherited from Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters. More...

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance. More...

void	resetClock () const
	Reset the object's clock using the current global tick value. More...

Protected Attributes
BaseTags *	tags
	Tag and data Storage. More...

BasePrefetcher *	prefetcher
	Prefetcher. More...

CacheBlk *	tempBlock
	Temporary cache block for occasional transitory use. More...

const bool	doFastWrites
	This cache should allocate a block on a line-sized write miss. More...

const bool	prefetchOnAccess
	Notify the prefetcher on every access, not just misses. More...

const Enums::Clusivity	clusivity
	Clusivity with respect to the upstream cache, determining if we fill into both this cache and the cache above on a miss. More...

const bool	writebackClean
	Determine if clean lines should be written back or not. More...

std::unique_ptr< Packet >	pendingDelete
	Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call. More...

PacketPtr	tempBlockWriteback
	Writebacks from the tempBlock, resulting on the response path in atomic mode, must happen after the call to recvAtomic has finished (for the right ordering of the packets). More...

EventWrapper< Cache,&Cache::writebackTempBlockAtomic >	writebackTempBlockAtomicEvent
	An event to writeback the tempBlock after recvAtomic finishes. More...

std::unordered_set< RequestPtr >	outstandingSnoop
	Store the outstanding requests that we are expecting snoop responses from so we can determine which snoop responses we generated and which ones were merely forwarded. More...

Protected Attributes inherited from BaseCache
CacheSlavePort *	cpuSidePort

CacheMasterPort *	memSidePort

MSHRQueue	mshrQueue
	Miss status registers. More...

WriteQueue	writeBuffer
	Write/writeback buffer. More...

const unsigned	blkSize
	Block size of this cache. More...

const Cycles	lookupLatency
	The latency of tag lookup of a cache. More...

const Cycles	dataLatency
	The latency of data access of a cache. More...

const Cycles	forwardLatency
	This is the forward latency of the cache. More...

const Cycles	fillLatency
	The latency to fill a cache block. More...

const Cycles	responseLatency
	The latency of sending reponse to its upper level cache/core on a linefill. More...

const int	numTarget
	The number of targets for each MSHR. More...

bool	forwardSnoops
	Do we forward snoops from mem side port through to cpu side port? More...

const bool	isReadOnly
	Is this cache read only, for example the instruction cache, or table-walker cache. More...

uint8_t	blocked
	Bit vector of the blocking reasons for the access path. More...

uint64_t	order
	Increasing order number assigned to each incoming request. More...

Cycles	blockedCycle
	Stores time the cache blocked for statistics. More...

MSHR *	noTargetMSHR
	Pointer to the MSHR that has no targets. More...

Counter	missCount
	The number of misses to trigger an exit event. More...

const AddrRangeList	addrRanges
	The address range to which the cache responds on the CPU side. More...

Protected Attributes inherited from ClockedObject
Enums::PwrState	_currPwrState
	To keep track of the current power state. More...

Tick	prvEvalTick

Stats::Scalar	numPwrStateTransitions

Stats::Distribution	pwrStateClkGateDist

Stats::Vector	pwrStateResidencyTicks

Protected Attributes inherited from SimObject
const SimObjectParams *	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Additional Inherited Members
Public Types inherited from BaseCache
enum	BlockedCause { Blocked_NoMSHRs = MSHRQueue_MSHRs, Blocked_NoWBBuffers = MSHRQueue_WriteBuffer, Blocked_NoTargets, NUM_BLOCKED_CAUSES }
	Reasons for caches to be blocked. More...

Public Types inherited from MemObject
typedef MemObjectParams	Params

Public Types inherited from ClockedObject
typedef ClockedObjectParams	Params
	Parameters of ClockedObject. More...

Public Types inherited from SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Get the fully-qualified name of the active section. More...

static void	serializeAll (const std::string &cpt_dir)

static void	unserializeGlobals (CheckpointIn &cp)

Public Attributes inherited from BaseCache
System *	system
	System we are currently operating in. More...

Stats::Vector	hits [MemCmd::NUM_MEM_CMDS]
	Number of hits per thread for each type of command. More...

Stats::Formula	demandHits
	Number of hits for demand accesses. More...

Stats::Formula	overallHits
	Number of hit for all accesses. More...

Stats::Vector	misses [MemCmd::NUM_MEM_CMDS]
	Number of misses per thread for each type of command. More...

Stats::Formula	demandMisses
	Number of misses for demand accesses. More...

Stats::Formula	overallMisses
	Number of misses for all accesses. More...

Stats::Vector	missLatency [MemCmd::NUM_MEM_CMDS]
	Total number of cycles per thread/command spent waiting for a miss. More...

Stats::Formula	demandMissLatency
	Total number of cycles spent waiting for demand misses. More...

Stats::Formula	overallMissLatency
	Total number of cycles spent waiting for all misses. More...

Stats::Formula	accesses [MemCmd::NUM_MEM_CMDS]
	The number of accesses per command and thread. More...

Stats::Formula	demandAccesses
	The number of demand accesses. More...

Stats::Formula	overallAccesses
	The number of overall accesses. More...

Stats::Formula	missRate [MemCmd::NUM_MEM_CMDS]
	The miss rate per command and thread. More...

Stats::Formula	demandMissRate
	The miss rate of all demand accesses. More...

Stats::Formula	overallMissRate
	The miss rate for all accesses. More...

Stats::Formula	avgMissLatency [MemCmd::NUM_MEM_CMDS]
	The average miss latency per command and thread. More...

Stats::Formula	demandAvgMissLatency
	The average miss latency for demand misses. More...

Stats::Formula	overallAvgMissLatency
	The average miss latency for all misses. More...

Stats::Vector	blocked_cycles
	The total number of cycles blocked for each blocked cause. More...

Stats::Vector	blocked_causes
	The number of times this cache blocked for each blocked cause. More...

Stats::Formula	avg_blocked
	The average number of cycles blocked for each blocked cause. More...

Stats::Scalar	unusedPrefetches
	The number of times a HW-prefetched block is evicted w/o reference. More...

Stats::Vector	writebacks
	Number of blocks written back per thread. More...

Stats::Vector	mshr_hits [MemCmd::NUM_MEM_CMDS]
	Number of misses that hit in the MSHRs per command and thread. More...

Stats::Formula	demandMshrHits
	Demand misses that hit in the MSHRs. More...

Stats::Formula	overallMshrHits
	Total number of misses that hit in the MSHRs. More...

Stats::Vector	mshr_misses [MemCmd::NUM_MEM_CMDS]
	Number of misses that miss in the MSHRs, per command and thread. More...

Stats::Formula	demandMshrMisses
	Demand misses that miss in the MSHRs. More...

Stats::Formula	overallMshrMisses
	Total number of misses that miss in the MSHRs. More...

Stats::Vector	mshr_uncacheable [MemCmd::NUM_MEM_CMDS]
	Number of misses that miss in the MSHRs, per command and thread. More...

Stats::Formula	overallMshrUncacheable
	Total number of misses that miss in the MSHRs. More...

Stats::Vector	mshr_miss_latency [MemCmd::NUM_MEM_CMDS]
	Total cycle latency of each MSHR miss, per command and thread. More...

Stats::Formula	demandMshrMissLatency
	Total cycle latency of demand MSHR misses. More...

Stats::Formula	overallMshrMissLatency
	Total cycle latency of overall MSHR misses. More...

Stats::Vector	mshr_uncacheable_lat [MemCmd::NUM_MEM_CMDS]
	Total cycle latency of each MSHR miss, per command and thread. More...

Stats::Formula	overallMshrUncacheableLatency
	Total cycle latency of overall MSHR misses. More...

Stats::Formula	mshrMissRate [MemCmd::NUM_MEM_CMDS]
	The miss rate in the MSHRs pre command and thread. More...

Stats::Formula	demandMshrMissRate
	The demand miss rate in the MSHRs. More...

Stats::Formula	overallMshrMissRate
	The overall miss rate in the MSHRs. More...

Stats::Formula	avgMshrMissLatency [MemCmd::NUM_MEM_CMDS]
	The average latency of an MSHR miss, per command and thread. More...

Stats::Formula	demandAvgMshrMissLatency
	The average latency of a demand MSHR miss. More...

Stats::Formula	overallAvgMshrMissLatency
	The average overall latency of an MSHR miss. More...

Stats::Formula	avgMshrUncacheableLatency [MemCmd::NUM_MEM_CMDS]
	The average latency of an MSHR miss, per command and thread. More...

Stats::Formula	overallAvgMshrUncacheableLatency
	The average overall latency of an MSHR miss. More...

Static Public Attributes inherited from Serializable
static int	ckptCount = 0

static int	ckptMaxCount = 0

static int	ckptPrevCount = -1

Protected Types inherited from BaseCache
enum	MSHRQueueIndex { MSHRQueue_MSHRs, MSHRQueue_WriteBuffer }
	Indexes to enumerate the MSHR queues. More...

Detailed Description

A template-policy based cache.

The behavior of the cache can be altered by supplying different template policies. TagStore handles all tag and data storage

See Also: TagStore, gem5 Memory System

Definition at line 74 of file cache.hh.

Constructor & Destructor Documentation

Cache::Cache ( const CacheParams * p )

Instantiates a basic cache object.

Definition at line 67 of file cache.cc.

References BaseCache::blkSize, BaseCache::cpuSidePort, CacheBlk::data, BaseCache::memSidePort, prefetcher, BasePrefetcher::setCache(), BaseTags::setCache(), tags, and tempBlock.

Cache::~Cache ( )

virtual

Non-default destructor is needed to deallocate memory.

Definition at line 92 of file cache.cc.

References BaseCache::cpuSidePort, CacheBlk::data, BaseCache::memSidePort, and tempBlock.

Member Function Documentation

bool Cache::access	(	PacketPtr	pkt,
		CacheBlk *&	blk,
		Cycles &	lat,
		PacketList &	writebacks
	)

protected

Does all the processing necessary to perform the provided request.

Parameters

pkt	The memory request to perform.
blk	The cache block to be updated.
lat	The latency of the access.
writebacks	List for any writebacks that need to be performed.

Returns: Boolean indicating whether the request was satisfied.

Definition at line 286 of file cache.cc.

References BaseTags::accessBlock(), allocateBlock(), BlkDirty, BlkReadable, BlkSecure, BaseCache::blkSize, BlkValid, BlkWritable, chatty_assert, MemCmd::CleanEvict, cleanEvictBlk(), Packet::clearBlockCached(), Packet::cmd, CacheBlk::data, DPRINTF, BaseTags::findBlock(), Queue< Entry >::findMatch(), Packet::fromCache(), Packet::getAddr(), Packet::getConstPtr(), WriteQueueEntry::getNumTargets(), Packet::getSize(), WriteQueueEntry::getTarget(), Packet::hasSharers(), BaseCache::incHitCount(), BaseCache::incMissCount(), BaseTags::insertBlock(), invalidateBlock(), Packet::isCleanEviction(), Packet::isEviction(), Packet::isLLSC(), CacheBlk::isReadable(), BaseCache::isReadOnly, Packet::isRequest(), Packet::isSecure(), Request::isUncacheable(), CacheBlk::isWritable(), Packet::isWrite(), Packet::isWriteback(), BaseCache::lookupLatency, maintainClusivity(), BaseCache::markInService(), BaseCache::mshrQueue, SimObject::name(), Packet::needsResponse(), Packet::needsWritable(), WriteQueueEntry::Target::pkt, CacheBlk::print(), Packet::print(), Packet::req, satisfyRequest(), Request::setExtraData(), CacheBlk::status, tags, writebackBlk(), MemCmd::WritebackClean, writebackClean, MemCmd::WritebackDirty, BaseCache::writebacks, and BaseCache::writeBuffer.

Referenced by recvAtomic(), and recvTimingReq().

CacheBlk * Cache::allocateBlock	(	Addr	addr,
		bool	is_secure,
		PacketList &	writebacks
	)

protected

Find a block frame for new block at address addr targeting the given security space, assuming that the block is not currently in the cache.

Append writebacks if any to provided packet list. Return free block frame. May return nullptr if there are no replaceable blocks at the moment.

Definition at line 1667 of file cache.cc.

References addr, cleanEvictBlk(), DPRINTF, Queue< Entry >::findMatch(), BaseTags::findVictim(), CacheBlk::isDirty(), CacheBlk::isSecure(), CacheBlk::isValid(), CacheBlk::isWritable(), BaseCache::mshrQueue, MSHR::needsWritable(), BaseTags::regenerateBlkAddr(), CacheBlk::set, CacheBlk::tag, tags, BaseCache::unusedPrefetches, CacheBlk::wasPrefetched(), writebackBlk(), and writebackClean.

Referenced by access(), and handleFill().

bool Cache::allocOnFill ( MemCmd cmd ) const

inlineoverrideprotectedvirtual

Determine whether we should allocate on a fill or not.

If this cache is mostly inclusive with regards to the upstream cache(s) we always allocate (for any non-forwarded and cacheable requests). In the case of a mostly exclusive cache, we allocate on fill if the packet did not come from a cache, thus if we: are dealing with a whole-line write (the latter behaves much like a writeback), the original target packet came from a non-caching source, or if we are performing a prefetch or LLSC.

Parameters

cmd	Command of the incoming requesting packet

Returns: Whether we should allocate on the fill

Implements BaseCache.

Definition at line 339 of file cache.hh.

References clusivity, MemCmd::isLLSC(), MemCmd::isPrefetch(), MemCmd::ReadReq, MemCmd::WriteLineReq, and MemCmd::WriteReq.

Referenced by recvAtomic(), and recvTimingReq().

PacketPtr Cache::cleanEvictBlk ( CacheBlk * blk )

protected

Create a CleanEvict request for the given block.

Parameters

blk	The block to evict.

Returns: The CleanEvict request for the block.

Definition at line 1582 of file cache.cc.

References Packet::allocate(), BaseCache::blkSize, MemCmd::CleanEvict, curTick(), DPRINTF, CacheBlk::isDirty(), CacheBlk::isSecure(), CacheBlk::isValid(), Packet::print(), BaseTags::regenerateBlkAddr(), Request::SECURE, CacheBlk::set, Request::setFlags(), CacheBlk::tag, tags, CacheBlk::task_id, CacheBlk::tickInserted, ContextSwitchTaskId::Unknown, Request::wbMasterId, and writebackClean.

Referenced by access(), allocateBlock(), recvAtomic(), and recvTimingResp().

void Cache::cmpAndSwap	(	CacheBlk *	blk,
		PacketPtr	pkt
	)

protected

Handle doing the Compare and Swap function for SPARC.

Definition at line 108 of file cache.cc.

References BlkDirty, CacheBlk::data, BaseTags::extractBlkOffset(), Packet::getAddr(), Request::getExtraData(), Packet::getSize(), Request::isCondSwap(), Packet::isRequest(), ArmISA::offset, panic, Packet::req, Packet::setData(), CacheBlk::status, tags, and Packet::writeData().

Referenced by satisfyRequest().

PacketPtr Cache::createMissPacket	(	PacketPtr	cpu_pkt,
		CacheBlk *	blk,
		bool	needsWritable
	)		const

protected

Create an appropriate downstream bus request packet for the given parameters.

Parameters

cpu_pkt	The miss that needs to be satisfied.
blk	The block currently in the cache corresponding to cpu_pkt (nullptr if none).
needsWritable	Indicates that the block must be writable even if the request in cpu_pkt doesn't indicate that.

Returns: A new Packet containing the request, or nullptr if the current request in cpu_pkt should just be forwarded on.

Definition at line 900 of file cache.cc.

References Packet::allocate(), BaseCache::blkSize, Packet::cmd, DPRINTF, Packet::getAddr(), Packet::getBlockAddr(), Packet::hasSharers(), MemCmd::InvalidateReq, Packet::isEviction(), Packet::isLLSC(), BaseCache::isReadOnly, Request::isUncacheable(), Packet::isUpgrade(), CacheBlk::isValid(), CacheBlk::isWritable(), Packet::needsResponse(), Packet::print(), MemCmd::ReadCleanReq, MemCmd::ReadExReq, MemCmd::ReadSharedReq, Packet::req, MemCmd::SCUpgradeFailReq, MemCmd::SCUpgradeReq, Packet::setHasSharers(), MemCmd::StoreCondFailReq, MemCmd::UpgradeReq, and MemCmd::WriteLineReq.

Referenced by recvAtomic(), and sendMSHRQueuePacket().

void Cache::doTimingSupplyResponse	(	PacketPtr	req_pkt,
		const uint8_t *	blk_data,
		bool	already_copied,
		bool	pending_inval
	)

protected

Definition at line 1839 of file cache.cc.

References BaseCache::blkSize, Clocked::clockEdge(), DPRINTF, BaseCache::forwardLatency, Packet::isInvalidate(), Packet::isRead(), Packet::isRequest(), Request::isUncacheable(), BaseCache::memSidePort, Packet::needsResponse(), Packet::print(), MemCmd::ReadResp, MemCmd::ReadRespWithInvalidate, Packet::req, and QueuedMasterPort::schedTimingSnoopResp().

Referenced by handleSnoop(), and recvTimingSnoopReq().

void Cache::doWritebacks	(	PacketList &	writebacks,
		Tick	forward_time
	)

protected

Insert writebacks into the write buffer.

Definition at line 461 of file cache.cc.

References BaseCache::allocateWriteBuffer(), MemCmd::CleanEvict, Packet::cmd, isCachedAbove(), Packet::setBlockCached(), MemCmd::WritebackClean, writebackClean, and MemCmd::WritebackDirty.

Referenced by recvTimingReq(), and recvTimingResp().

void Cache::doWritebacksAtomic ( PacketList & writebacks )

protected

Send writebacks down the memory hierarchy in atomic mode.

Definition at line 501 of file cache.cc.

References Packet::cmd, isCachedAbove(), BaseCache::memSidePort, MasterPort::sendAtomic(), and MemCmd::WritebackDirty.

Referenced by recvAtomic(), and writebackTempBlockAtomic().

CacheBlk* Cache::findBlock	(	Addr	addr,
		bool	is_secure
	)		const

inlineprotected

Definition at line 518 of file cache.hh.

References BaseTags::findBlock(), and tags.

void Cache::functionalAccess	(	PacketPtr	pkt,
		bool	fromCpuSide
	)

protected

Performs the access specified by the request.

Parameters

pkt	The request to perform.
fromCpuSide	from the CPU side port or the memory side port

Definition at line 1139 of file cache.cc.

References BaseCache::blkSize, System::bypassCaches(), QueuedSlavePort::checkFunctional(), QueuedMasterPort::checkFunctional(), Queue< Entry >::checkFunctional(), Packet::checkFunctional(), BaseCache::cpuSidePort, CacheBlk::data, DPRINTF, BaseTags::findBlock(), Queue< Entry >::findMatch(), Packet::getAddr(), Packet::getBlockAddr(), QueueEntry::inService, CacheBlk::isDirty(), MSHR::isPendingModified(), Packet::isSecure(), SlavePort::isSnooping(), CacheBlk::isValid(), Packet::makeResponse(), BaseCache::memSidePort, BaseCache::mshrQueue, SimObject::name(), Packet::popLabel(), Packet::print(), Packet::pushLabel(), MasterPort::sendFunctional(), SlavePort::sendFunctionalSnoop(), BaseCache::system, tags, and BaseCache::writeBuffer.

QueueEntry * Cache::getNextQueueEntry ( )

protected

Return the next queue entry to service, either a pending miss from the MSHR queue, a buffered write from the write buffer, or something from the prefetcher.

This function is responsible for prioritizing among those sources on the fly.

Definition at line 2226 of file cache.cc.

References BaseCache::allocateMissBuffer(), QueueEntry::blkAddr, BaseCache::blkSize, MSHRQueue::canPrefetch(), Packet::cmdToIndex(), curTick(), BaseTags::findBlock(), Queue< Entry >::findMatch(), Queue< Entry >::findPending(), Packet::getBlockAddr(), Queue< Entry >::getNext(), BasePrefetcher::getPacket(), Queue< Entry >::isFull(), QueueEntry::isSecure, Packet::isSecure(), Request::masterId(), System::maxMasters(), BaseCache::mshr_misses, BaseCache::mshrQueue, QueueEntry::order, prefetcher, Packet::req, BaseCache::system, tags, and BaseCache::writeBuffer.

CacheBlk * Cache::handleFill	(	PacketPtr	pkt,
		CacheBlk *	blk,
		PacketList &	writebacks,
		bool	allocate
	)

protected

Populates a cache block and handles all outstanding requests for the satisfied fill request.

This version takes two memory requests. One contains the fill data, the other is an optional target to satisfy.

Parameters

pkt	The memory request with the fill data.
blk	The cache block if it already exists.
writebacks	List for any writebacks that need to be performed.
allocate	Whether to allocate a block or use the temp block

Returns: Pointer to the new cache block.

Definition at line 1723 of file cache.cc.

References addr, allocateBlock(), BlkDirty, BlkReadable, BlkSecure, BaseCache::blkSize, BlkValid, BlkWritable, Packet::cacheResponding(), chatty_assert, Clocked::clockEdge(), Clocked::clockPeriod(), Packet::cmd, CacheBlk::data, DPRINTF, BaseTags::extractSet(), BaseTags::extractTag(), BaseCache::fillLatency, Queue< Entry >::findMatch(), Packet::getAddr(), Packet::getBlockAddr(), Packet::getConstPtr(), Packet::getSize(), Packet::hasData(), Packet::hasSharers(), BaseTags::insertBlock(), Packet::isRead(), BaseCache::isReadOnly, Packet::isResponse(), Packet::isSecure(), CacheBlk::isValid(), SimObject::name(), Packet::payloadDelay, CacheBlk::print(), CacheBlk::set, CacheBlk::status, CacheBlk::tag, tags, tempBlock, CacheBlk::whenReady, BaseCache::writeBuffer, and MemCmd::WriteLineReq.

Referenced by recvAtomic(), and recvTimingResp().

uint32_t Cache::handleSnoop	(	PacketPtr	pkt,
		CacheBlk *	blk,
		bool	is_timing,
		bool	is_deferred,
		bool	pending_inval
	)

protected

Perform an upward snoop if needed, and update the block state (possibly invalidating the block).

Also create a response if required.

Parameters

pkt	Snoop packet
blk	Cache block being snooped
is_timing	Timing or atomic for the response
is_deferred	Is this a deferred snoop or not?
pending_inval	Do we have a pending invalidation?

Returns: The snoop delay incurred by the upwards snoop

Definition at line 1884 of file cache.cc.

References BaseCache::blkSize, BlkWritable, Packet::cacheResponding(), chatty_assert, BaseCache::cpuSidePort, CacheBlk::data, doTimingSupplyResponse(), DPRINTF, BaseCache::forwardSnoops, Packet::getAddr(), Packet::hasData(), Packet::hasSharers(), Packet::headerDelay, invalidateBlock(), Packet::isBlockCached(), CacheBlk::isDirty(), Packet::isInvalidate(), Packet::isRead(), BaseCache::isReadOnly, Packet::isRequest(), Packet::isResponse(), Request::isUncacheable(), CacheBlk::isValid(), CacheBlk::isWritable(), M5_VAR_USED, Packet::makeAtomicResponse(), Packet::mustCheckAbove(), SimObject::name(), Packet::needsResponse(), Packet::needsWritable(), panic_if(), Packet::payloadDelay, CacheBlk::print(), Packet::print(), Packet::req, SlavePort::sendAtomicSnoop(), SlavePort::sendTimingSnoopReq(), Packet::setBlockCached(), Packet::setCacheResponding(), Packet::setDataFromBlock(), Packet::setExpressSnoop(), Packet::setHasSharers(), Packet::setResponderHadWritable(), and CacheBlk::status.

Referenced by recvAtomicSnoop(), recvTimingResp(), and recvTimingSnoopReq().

void Cache::handleUncacheableWriteResp ( PacketPtr pkt )

protected

Handling the special case of uncacheable write responses to make recvTimingResp less cluttered.

Definition at line 1214 of file cache.cc.

References Clocked::clockEdge(), BaseCache::cpuSidePort, Packet::headerDelay, Packet::payloadDelay, BaseCache::responseLatency, and QueuedSlavePort::schedTimingResp().

Referenced by recvTimingResp().

bool Cache::inCache	(	Addr	addr,
		bool	is_secure
	)		const

inlineoverrideprotectedvirtual

Implements BaseCache.

Definition at line 522 of file cache.hh.

References BaseTags::findBlock(), and tags.

bool Cache::inMissQueue	(	Addr	addr,
		bool	is_secure
	)		const

inlineoverrideprotectedvirtual

Implements BaseCache.

Definition at line 526 of file cache.hh.

References Queue< Entry >::findMatch(), and BaseCache::mshrQueue.

void Cache::invalidateBlock ( CacheBlk * blk )

protected

Invalidate a cache block.

Parameters

blk	Block to invalidate

Definition at line 1710 of file cache.cc.

References CacheBlk::invalidate(), BaseTags::invalidate(), tags, and tempBlock.

Referenced by access(), handleSnoop(), invalidateVisitor(), maintainClusivity(), recvAtomic(), recvTimingResp(), and satisfyRequest().

bool Cache::invalidateVisitor ( CacheBlk & blk )

protected

Cache block visitor that invalidates all blocks in the cache.

Dirty cache lines will not be written back to memory.

Returns: Always returns true.

Definition at line 1652 of file cache.cc.

References invalidateBlock(), CacheBlk::isDirty(), CacheBlk::isValid(), and warn_once.

Referenced by memInvalidate().

bool Cache::isCachedAbove	(	PacketPtr	pkt,
		bool	is_timing = `true`
	)		const

protected

Send up a snoop request and find cached copies.

If cached copies are found, set the BLOCK_CACHED flag in pkt.

Definition at line 2309 of file cache.cc.

References Packet::cacheResponding(), BaseCache::cpuSidePort, BaseCache::forwardSnoops, Packet::isBlockCached(), Packet::isEviction(), SlavePort::sendAtomicSnoop(), Packet::senderState, SlavePort::sendTimingSnoopReq(), and Packet::setExpressSnoop().

Referenced by doWritebacks(), doWritebacksAtomic(), and recvTimingResp().

bool Cache::isDirty ( ) const

overrideprotectedvirtual

Determine if there are any dirty blocks in the cache.

Returns: true if at least one block is dirty, false otherwise.

Implements BaseCache.

Definition at line 1619 of file cache.cc.

References BaseTags::forEachBlk(), CacheBlkIsDirtyVisitor::isDirty(), and tags.

Referenced by serialize().

void Cache::maintainClusivity	(	bool	from_cache,
		CacheBlk *	blk
	)

protected

Maintain the clusivity of this cache by potentially invalidating a block.

This method works in conjunction with satisfyRequest, but is separate to allow us to handle all MSHR targets before potentially dropping a block.

Parameters

from_cache	Whether we have dealt with a packet from a cache
blk	The block that should potentially be dropped

Definition at line 449 of file cache.cc.

References clusivity, invalidateBlock(), CacheBlk::isDirty(), and CacheBlk::isValid().

Referenced by access(), recvAtomic(), and recvTimingResp().

void Cache::memInvalidate ( )

overrideprotectedvirtual

Invalidates all blocks in the cache.

Dirty cache lines will not be written back to memory. Make sure to call functionalWriteback() first if you want the to write them to memory.

Implements BaseCache.

Definition at line 1612 of file cache.cc.

References BaseTags::forEachBlk(), invalidateVisitor(), and tags.

void Cache::memWriteback ( )

overrideprotectedvirtual

Write back dirty blocks in the cache using functional accesses.

Implements BaseCache.

Definition at line 1605 of file cache.cc.

References BaseTags::forEachBlk(), tags, and writebackVisitor().

Tick Cache::nextQueueReadyTime ( ) const

protected

Find next request ready time from among possible sources.

Definition at line 2337 of file cache.cc.

References MSHRQueue::canPrefetch(), BaseCache::mshrQueue, BasePrefetcher::nextPrefetchReadyTime(), Queue< Entry >::nextReadyTime(), prefetcher, and BaseCache::writeBuffer.

bool Cache::outstandingMisses ( ) const

inlineprotected

Return whether there are any outstanding misses.

Definition at line 513 of file cache.hh.

References Queue< Entry >::isEmpty(), and BaseCache::mshrQueue.

void Cache::promoteWholeLineWrites ( PacketPtr pkt )

protected

Turn line-sized writes into WriteInvalidate transactions.

Definition at line 572 of file cache.cc.

References BaseCache::blkSize, Packet::cmd, doFastWrites, DPRINTF, Packet::getOffset(), Packet::getSize(), MemCmd::WriteLineReq, and MemCmd::WriteReq.

Referenced by recvAtomic(), and recvTimingReq().

Tick Cache::recvAtomic ( PacketPtr pkt )

protected

Performs the access specified by the request.

Parameters

pkt	The request to perform.

Returns: The number of ticks required for the access.

Definition at line 974 of file cache.cc.

References access(), allocOnFill(), System::bypassCaches(), Packet::cacheResponding(), cleanEvictBlk(), Clocked::clockPeriod(), Packet::cmd, Packet::copyError(), createMissPacket(), curTick(), doWritebacksAtomic(), DPRINTF, Packet::fromCache(), handleFill(), invalidateBlock(), CacheBlk::isDirty(), Packet::isError(), Packet::isEviction(), Packet::isInvalidate(), Packet::isRead(), Packet::isResponse(), Request::isUncacheable(), CacheBlk::isValid(), Packet::isWrite(), BaseCache::lookupLatency, maintainClusivity(), Packet::makeAtomicResponse(), BaseCache::memSidePort, Packet::needsResponse(), Packet::needsWritable(), Packet::print(), promoteWholeLineWrites(), Packet::req, Packet::responderHadWritable(), satisfyRequest(), EventManager::schedule(), MasterPort::sendAtomic(), CacheBlk::status, BaseCache::system, tempBlock, tempBlockWriteback, Clocked::ticksToCycles(), MemCmd::UpgradeResp, writebackBlk(), writebackClean, BaseCache::writebacks, writebackTempBlockAtomic(), writebackTempBlockAtomicEvent, and MemCmd::WriteLineReq.

Tick Cache::recvAtomicSnoop ( PacketPtr pkt )

protected

Snoop for the provided request in the cache and return the estimated time taken.

Parameters

pkt	The memory request to snoop

Returns: The number of ticks required for the snoop.

Definition at line 2209 of file cache.cc.

References System::bypassCaches(), Clocked::clockPeriod(), BaseTags::findBlock(), Packet::getAddr(), handleSnoop(), BaseCache::inRange(), Packet::isSecure(), BaseCache::lookupLatency, BaseCache::system, and tags.

bool Cache::recvTimingReq ( PacketPtr pkt )

protected

Performs the access specified by the request.

Parameters

pkt	The request to perform.

Returns: The result of the access.

MSHR hit

Note: writebacks will be checked in getNextMSHR() for any conflicting requests to the same block

Definition at line 583 of file cache.cc.

References access(), BaseCache::allocateMissBuffer(), MSHR::allocateTarget(), BaseCache::allocateWriteBuffer(), allocOnFill(), BlkHWPrefetched, BlkReadable, BaseCache::blkSize, BaseCache::Blocked_NoTargets, System::bypassCaches(), Packet::cacheResponding(), MemCmd::CleanEvict, Clocked::clockEdge(), Packet::cmd, Packet::cmdToIndex(), BaseCache::cpuSidePort, doWritebacks(), DPRINTF, Queue< Entry >::findMatch(), BaseCache::forwardLatency, Packet::getAddr(), Packet::getBlockAddr(), Request::getFlags(), MSHR::getNumTargets(), Request::getPaddr(), Request::getSize(), Packet::getSize(), Request::hasPaddr(), Packet::headerDelay, Packet::isEviction(), Packet::isRequest(), Packet::isSecure(), MemCmd::isSWPrefetch(), Request::isUncacheable(), CacheBlk::isValid(), CacheBlk::isWritable(), Packet::isWrite(), Packet::isWriteback(), BaseCache::lookupLatency, M5_VAR_USED, Packet::makeTimingResponse(), Request::masterId(), System::maxMasters(), MaxTick, BaseCache::memSidePort, BaseCache::mshr_hits, BaseCache::mshr_misses, BaseCache::mshr_uncacheable, BaseCache::mshrQueue, Packet::needsResponse(), Packet::needsWritable(), BaseCache::noTargetMSHR, BasePrefetcher::notify(), BaseCache::numTarget, BaseCache::order, Packet::payloadDelay, pendingDelete, X86ISA::pf, prefetcher, prefetchOnAccess, BaseTags::print(), Packet::print(), promoteWholeLineWrites(), Packet::req, Packet::responderHadWritable(), BaseCache::schedMemSideSendEvent(), QueuedSlavePort::schedTimingResp(), MasterPort::sendTimingReq(), BaseCache::setBlocked(), CacheBlk::status, BaseCache::system, tags, CacheBlk::wasPrefetched(), and BaseCache::writebacks.

void Cache::recvTimingResp ( PacketPtr pkt )

protected

Handles a response (cache line fill/write ack) from the bus.

Parameters

pkt	The response packet

Definition at line 1226 of file cache.cc.

References BaseCache::allocateWriteBuffer(), MSHR::allocOnFill(), BlkHWPrefetched, BlkReadable, BaseCache::blkSize, BlkWritable, BaseCache::Blocked_NoMSHRs, BaseCache::Blocked_NoTargets, MSHRQueue::canPrefetch(), cleanEvictBlk(), BaseCache::clearBlocked(), Clocked::clockEdge(), Packet::cmd, Packet::cmdToIndex(), Packet::copyError(), BaseCache::cpuSidePort, curTick(), Queue< Entry >::deallocate(), doWritebacks(), DPRINTF, MSHR::extractServiceableTargets(), BaseTags::findBlock(), BaseCache::forwardLatency, Packet::fromCache(), MSHR::Target::FromCPU, MSHR::Target::FromPrefetcher, MSHR::Target::FromSnoop, Packet::getAddr(), Packet::getConstPtr(), Packet::getOffset(), Packet::getSize(), MSHR::getTarget(), handleFill(), handleSnoop(), handleUncacheableWriteResp(), MemCmd::HardPFReq, MemCmd::HardPFResp, MSHR::hasPostDowngrade(), MSHR::hasPostInvalidate(), Packet::hasSharers(), Packet::headerDelay, invalidateBlock(), MemCmd::InvalidateResp, isCachedAbove(), CacheBlk::isDirty(), Packet::isError(), MSHR::isForward, Queue< Entry >::isFull(), Packet::isInvalidate(), Packet::isRead(), Packet::isResponse(), Packet::isSecure(), MemCmd::isSWPrefetch(), Request::isUncacheable(), CacheBlk::isValid(), Packet::isWrite(), maintainClusivity(), Packet::makeTimingResponse(), MSHRQueue::markPending(), Request::masterId(), System::maxMasters(), MaxTick, BaseCache::missLatency, BaseCache::mshr_miss_latency, BaseCache::mshr_uncacheable_lat, BaseCache::mshrQueue, SimObject::name(), BasePrefetcher::nextPrefetchReadyTime(), BaseCache::noTargetMSHR, panic, panic_if(), Packet::payloadDelay, MSHR::Target::pkt, Packet::popSenderState(), prefetcher, Packet::print(), MSHR::promoteDeferredTargets(), MSHR::promoteWritable(), MemCmd::ReadResp, MemCmd::ReadRespWithInvalidate, MSHR::Target::recvTime, Packet::req, BaseCache::responseLatency, satisfyRequest(), BaseCache::schedMemSideSendEvent(), QueuedSlavePort::schedTimingResp(), MemCmd::SCUpgradeFailReq, Packet::setBlockCached(), Packet::setData(), Request::setExtraData(), CacheBlk::status, MemCmd::StoreCondFailReq, MemCmd::StoreCondReq, BaseCache::system, tags, tempBlock, MemCmd::UpgradeFailResp, MemCmd::UpgradeResp, writebackBlk(), writebackClean, BaseCache::writebacks, and MemCmd::WriteLineReq.

Referenced by recvTimingSnoopResp().

void Cache::recvTimingSnoopReq ( PacketPtr pkt )

protected

Snoops bus transactions to maintain coherence.

Parameters

pkt	The current bus transaction.

Definition at line 2080 of file cache.cc.

References BaseCache::blkSize, System::bypassCaches(), Clocked::clockPeriod(), doTimingSupplyResponse(), DPRINTF, BaseTags::findBlock(), Queue< Entry >::findMatch(), Packet::getAddr(), Packet::getBlockAddr(), Packet::getConstPtr(), WriteQueueEntry::getNumTargets(), MSHR::getNumTargets(), WriteQueueEntry::getTarget(), MSHR::handleSnoop(), handleSnoop(), BaseCache::inRange(), Packet::isEviction(), Packet::isInvalidate(), Packet::isRead(), Packet::isSecure(), QueueEntry::isUncacheable(), Request::isUncacheable(), BaseCache::lookupLatency, BaseCache::markInService(), BaseCache::mshrQueue, Packet::mustCheckAbove(), Packet::needsResponse(), Packet::needsWritable(), BaseCache::numTarget, BaseCache::order, WriteQueueEntry::Target::pkt, MSHR::print(), Packet::print(), Packet::req, Packet::setBlockCached(), Packet::setCacheResponding(), Packet::setHasSharers(), Packet::setResponderHadWritable(), Packet::snoopDelay, BaseCache::system, tags, warn, MemCmd::WritebackDirty, and BaseCache::writeBuffer.

void Cache::recvTimingSnoopResp ( PacketPtr pkt )

protected

Handle a snoop response.

Parameters

pkt	Snoop response packet

Definition at line 535 of file cache.cc.

References System::bypassCaches(), Clocked::clockEdge(), Packet::cmd, DPRINTF, BaseCache::forwardLatency, Packet::getAddr(), MemCmd::HardPFResp, Packet::headerDelay, Packet::isResponse(), Packet::isSecure(), BaseCache::memSidePort, outstandingSnoop, Packet::payloadDelay, Packet::print(), recvTimingResp(), Packet::req, QueuedMasterPort::schedTimingSnoopResp(), and BaseCache::system.

Referenced by Cache::CpuSidePort::recvTimingSnoopResp().

void Cache::regStats ( )

overridevirtual

Register stats for this object.

Reimplemented from BaseCache.

Definition at line 102 of file cache.cc.

References BaseCache::regStats().

void Cache::satisfyRequest	(	PacketPtr	pkt,
		CacheBlk *	blk,
		bool	deferred_response = `false`,
		bool	pending_downgrade = `false`
	)

protected

Perform any necessary updates to the block and perform any data exchange between the packet and the block.

The flags of the packet are also set accordingly.

Parameters

pkt	Request packet from upstream that hit a block
blk	Cache block that the packet hit
deferred_response	Whether this hit is to block that originally missed
pending_downgrade	Whether the writable flag is to be removed

Returns: True if the block is to be invalidated

Definition at line 149 of file cache.cc.

References BlkDirty, BaseCache::blkSize, CacheBlk::checkWrite(), Packet::cmd, cmpAndSwap(), CacheBlk::data, DPRINTF, Packet::fromCache(), Packet::getOffset(), Packet::getSize(), Packet::hasRespData(), Packet::hasSharers(), invalidateBlock(), CacheBlk::isDirty(), Packet::isInvalidate(), Packet::isLLSC(), Packet::isRead(), Packet::isRequest(), Packet::isUpgrade(), CacheBlk::isValid(), CacheBlk::isWritable(), Packet::isWrite(), Packet::needsWritable(), Packet::print(), MemCmd::ReadCleanReq, MemCmd::ReadExReq, MemCmd::SCUpgradeFailReq, Packet::setCacheResponding(), Packet::setDataFromBlock(), Packet::setHasSharers(), CacheBlk::status, MemCmd::SwapReq, CacheBlk::trackLoadLocked(), and Packet::writeDataToBlock().

Referenced by access(), recvAtomic(), and recvTimingResp().

bool Cache::sendMSHRQueuePacket ( MSHR * mshr )

Take an MSHR, turn it into a suitable downstream packet, and send it out.

This construct allows a queue entry to choose a suitable approach based on its type.

Parameters

mshr	The MSHR to turn into a packet and send

Returns: True if the port is waiting for a retry

Definition at line 2353 of file cache.cc.

References QueueEntry::blkAddr, BaseCache::Blocked_NoMSHRs, Packet::cacheResponding(), BaseCache::clearBlocked(), Packet::cmd, BaseCache::cpuSidePort, createMissPacket(), DPRINTF, BaseTags::findBlock(), MSHRQueue::forceDeallocateTarget(), BaseCache::forwardSnoops, Packet::getAddr(), MSHR::getTarget(), MemCmd::HardPFReq, Packet::hasSharers(), Packet::isBlockCached(), MSHR::isForward, QueueEntry::isSecure, Packet::isSecure(), Packet::isWrite(), M5_VAR_USED, BaseCache::markInService(), BaseCache::memSidePort, BaseCache::mshrQueue, MSHR::needsWritable(), outstandingSnoop, MSHR::Target::pkt, Packet::print(), Packet::pushSenderState(), MipsISA::r, Packet::req, Packet::senderState, MasterPort::sendTimingReq(), SlavePort::sendTimingSnoopReq(), Packet::setExpressSnoop(), and tags.

Referenced by MSHR::sendPacket().

bool Cache::sendWriteQueuePacket ( WriteQueueEntry * wq_entry )

Similar to sendMSHR, but for a write-queue entry instead.

Create the packet, and send it, and if successful also mark the entry in service.

Parameters

wq_entry The write-queue entry to turn into a packet and send

Returns: True if the port is waiting for a retry

Definition at line 2471 of file cache.cc.

References DPRINTF, WriteQueueEntry::getTarget(), BaseCache::markInService(), BaseCache::memSidePort, WriteQueueEntry::Target::pkt, Packet::print(), and MasterPort::sendTimingReq().

Referenced by WriteQueueEntry::sendPacket().

void Cache::serialize ( CheckpointOut & cp ) const

overridevirtual

serialize the state of the caches We currently don't support checkpointing cache state, so this panics.

Implements Serializable.

Definition at line 2495 of file cache.cc.

References isDirty(), SERIALIZE_SCALAR, and warn.

void Cache::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Implements Serializable.

Definition at line 2515 of file cache.cc.

References fatal, and UNSERIALIZE_SCALAR.

PacketPtr Cache::writebackBlk ( CacheBlk * blk )

protected

Create a writeback request for the given block.

Parameters

blk	The block to writeback.

Returns: The writeback request for the block.

Definition at line 1539 of file cache.cc.

References Packet::allocate(), BlkDirty, BaseCache::blkSize, BlkWritable, chatty_assert, curTick(), CacheBlk::data, DPRINTF, Packet::getPtr(), CacheBlk::isDirty(), BaseCache::isReadOnly, CacheBlk::isSecure(), CacheBlk::isValid(), CacheBlk::isWritable(), Packet::print(), BaseTags::regenerateBlkAddr(), Request::SECURE, CacheBlk::set, Request::setFlags(), Packet::setHasSharers(), CacheBlk::status, CacheBlk::tag, tags, CacheBlk::task_id, Request::taskId(), CacheBlk::tickInserted, ContextSwitchTaskId::Unknown, Request::wbMasterId, MemCmd::WritebackClean, writebackClean, MemCmd::WritebackDirty, and BaseCache::writebacks.

Referenced by access(), allocateBlock(), recvAtomic(), and recvTimingResp().

void Cache::writebackTempBlockAtomic ( )

inlineprotected

Send the outstanding tempBlock writeback.

To be called after recvAtomic finishes in cases where the block we filled is in fact the tempBlock, and now needs to be written back.

Definition at line 248 of file cache.hh.

References doWritebacksAtomic(), tempBlockWriteback, and BaseCache::writebacks.

Referenced by recvAtomic().

bool Cache::writebackVisitor ( CacheBlk & blk )

protected

Cache block visitor that writes back dirty cache blocks using functional writes.

Returns: Always returns true.

Definition at line 1628 of file cache.cc.

References BlkDirty, BaseCache::blkSize, CacheBlk::data, Packet::dataStatic(), Request::funcMasterId, CacheBlk::isDirty(), CacheBlk::isSecure(), CacheBlk::isValid(), BaseCache::memSidePort, BaseTags::regenerateBlkAddr(), Request::SECURE, MasterPort::sendFunctional(), CacheBlk::set, CacheBlk::status, CacheBlk::tag, tags, CacheBlk::task_id, Request::taskId(), and MemCmd::WriteReq.

Referenced by memWriteback().

Member Data Documentation

const Enums::Clusivity Cache::clusivity

protected

Clusivity with respect to the upstream cache, determining if we fill into both this cache and the cache above on a miss.

Note that we currently do not support strict clusivity policies.

Definition at line 217 of file cache.hh.

Referenced by allocOnFill(), and maintainClusivity().

const bool Cache::doFastWrites

protected

This cache should allocate a block on a line-sized write miss.

Definition at line 200 of file cache.hh.

Referenced by promoteWholeLineWrites().

std::unordered_set<RequestPtr> Cache::outstandingSnoop

protected

Store the outstanding requests that we are expecting snoop responses from so we can determine which snoop responses we generated and which ones were merely forwarded.

Definition at line 268 of file cache.hh.

Referenced by recvTimingSnoopResp(), and sendMSHRQueuePacket().

std::unique_ptr<Packet> Cache::pendingDelete

protected

Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call.

Definition at line 232 of file cache.hh.

Referenced by recvTimingReq().

BasePrefetcher* Cache::prefetcher

protected

Prefetcher.

Definition at line 192 of file cache.hh.

Referenced by Cache(), getNextQueueEntry(), nextQueueReadyTime(), recvTimingReq(), and recvTimingResp().

const bool Cache::prefetchOnAccess

protected

Notify the prefetcher on every access, not just misses.

Definition at line 210 of file cache.hh.

Referenced by recvTimingReq().

BaseTags* Cache::tags

protected

Tag and data Storage.

Definition at line 189 of file cache.hh.

Referenced by access(), allocateBlock(), Cache(), cleanEvictBlk(), cmpAndSwap(), findBlock(), functionalAccess(), getNextQueueEntry(), handleFill(), inCache(), invalidateBlock(), isDirty(), memInvalidate(), memWriteback(), recvAtomicSnoop(), recvTimingReq(), recvTimingResp(), recvTimingSnoopReq(), sendMSHRQueuePacket(), writebackBlk(), and writebackVisitor().

CacheBlk* Cache::tempBlock

protected

Temporary cache block for occasional transitory use.

Definition at line 195 of file cache.hh.

Referenced by Cache(), handleFill(), invalidateBlock(), recvAtomic(), recvTimingResp(), and ~Cache().

PacketPtr Cache::tempBlockWriteback

protected

Writebacks from the tempBlock, resulting on the response path in atomic mode, must happen after the call to recvAtomic has finished (for the right ordering of the packets).

We therefore need to hold on to the packets, and have a method and an event to send them.

Definition at line 241 of file cache.hh.

Referenced by recvAtomic(), and writebackTempBlockAtomic().

const bool Cache::writebackClean

protected

Determine if clean lines should be written back or not.

In cases where a downstream cache is mostly inclusive we likely want it to act as a victim cache also for lines that have not been modified. Hence, we cannot simply drop the line (or send a clean evict), but rather need to send the actual data.

Definition at line 226 of file cache.hh.

Referenced by access(), allocateBlock(), cleanEvictBlk(), doWritebacks(), recvAtomic(), recvTimingResp(), and writebackBlk().

EventWrapper<Cache, &Cache::writebackTempBlockAtomic> Cache::writebackTempBlockAtomicEvent

protected

An event to writeback the tempBlock after recvAtomic finishes.

To avoid other calls to recvAtomic getting in between, we create this event with a higher priority.

Definition at line 261 of file cache.hh.

Referenced by recvAtomic().

The documentation for this class was generated from the following files:

mem/cache/cache.hh
mem/cache/cache.cc

Classes

Public Member Functions

Protected Member Functions

Protected Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation