gem5
Main Page
Related Pages
Modules
Namespaces
Classes
Files
File List
File Members
All
Classes
Namespaces
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Friends
Macros
Groups
Pages
arch
generic
tlb.cc
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2001-2005 The Regents of The University of Michigan
3
* All rights reserved.
4
*
5
* Redistribution and use in source and binary forms, with or without
6
* modification, are permitted provided that the following conditions are
7
* met: redistributions of source code must retain the above copyright
8
* notice, this list of conditions and the following disclaimer;
9
* redistributions in binary form must reproduce the above copyright
10
* notice, this list of conditions and the following disclaimer in the
11
* documentation and/or other materials provided with the distribution;
12
* neither the name of the copyright holders nor the names of its
13
* contributors may be used to endorse or promote products derived from
14
* this software without specific prior written permission.
15
*
16
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
*
28
* Authors: Gabe Black
29
*/
30
31
#include "
arch/generic/tlb.hh
"
32
33
#include "
cpu/thread_context.hh
"
34
#include "
mem/page_table.hh
"
35
#include "
sim/faults.hh
"
36
#include "
sim/full_system.hh
"
37
#include "
sim/process.hh
"
38
39
Fault
40
GenericTLB::translateAtomic
(
RequestPtr
req,
ThreadContext
*tc,
Mode
)
41
{
42
if
(
FullSystem
)
43
panic
(
"Generic translation shouldn't be used in full system mode.\n"
);
44
45
Process
*
p
= tc->
getProcessPtr
();
46
47
Fault
fault = p->
pTable
->
translate
(req);
48
if
(fault !=
NoFault
)
49
return
fault;
50
51
return
NoFault
;
52
}
53
54
void
55
GenericTLB::translateTiming
(
RequestPtr
req,
ThreadContext
*tc,
56
Translation
*translation,
Mode
mode
)
57
{
58
assert(translation);
59
translation->
finish
(
translateAtomic
(req, tc, mode), req, tc, mode);
60
}
61
62
Fault
63
GenericTLB::finalizePhysical
(
RequestPtr
req,
ThreadContext
*tc,
Mode
mode
)
const
64
{
65
return
NoFault
;
66
}
67
68
void
69
GenericTLB::demapPage
(
Addr
vaddr
, uint64_t asn)
70
{
71
warn
(
"Demapping pages in the generic TLB is unnecessary.\n"
);
72
}
NoFault
decltype(nullptr) constexpr NoFault
Definition:
types.hh:189
panic
#define panic(...)
Definition:
misc.hh:153
FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition:
root.cc:146
ThreadContext::getProcessPtr
virtual Process * getProcessPtr()=0
thread_context.hh
ArmISA::mode
Bitfield< 4, 0 > mode
Definition:
miscregs.hh:1385
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition:
thread_context.hh:93
Request
Definition:
request.hh:87
warn
#define warn(...)
Definition:
misc.hh:219
process.hh
PageTableBase::translate
bool translate(Addr vaddr, Addr &paddr)
Translate function.
Definition:
page_table.cc:173
MipsISA::vaddr
vaddr
Definition:
pra_constants.hh:277
faults.hh
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
GenericTLB::finalizePhysical
Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const
Do post-translation physical address finalization.
Definition:
tlb.cc:63
GenericTLB::demapPage
void demapPage(Addr vaddr, uint64_t asn) override
Definition:
tlb.cc:69
Process::pTable
PageTableBase * pTable
Definition:
process.hh:178
BaseTLB::Mode
Mode
Definition:
tlb.hh:61
GenericTLB::translateTiming
void translateTiming(RequestPtr req, ThreadContext *tc, Translation *translation, Mode mode)
Definition:
tlb.cc:55
page_table.hh
Declarations of a non-full system Page Table.
GenericTLB::translateAtomic
Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode)
Definition:
tlb.cc:40
BaseTLB::Translation
Definition:
tlb.hh:89
Process
Definition:
process.hh:63
tlb.hh
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:325
BaseTLB::Translation::finish
virtual void finish(const Fault &fault, RequestPtr req, ThreadContext *tc, Mode mode)=0
Fault
std::shared_ptr< FaultBase > Fault
Definition:
types.hh:184
full_system.hh
Generated on Fri Jun 9 2017 13:03:36 for gem5 by
doxygen
1.8.6